[PATCH] asm-ppc/reg.h namespace pollution fixes

	asm-ppc/reg.h defines pollutes namespace like there's no tomorrow;
among other things there are
	LR
	SR0...SR15
	DEC
etc.

That breaks quite a few drivers that should otherwise work on ppc.  SR...
and LR were never used by ppc code; commented out in reg.h (note that
they are just aliases for SPRN_SR... and SPRN_LR).  RPA commented out and
its instances in ppc code (all four of them) replaced with SPRN_RPA.  Ditto
for DEC.  The rest of the offenders (DAR and PVR) are left alone for now and
#undef'ed in drivers in question.

We probably want to rip all these guys out of reg.h and convert ppc users
to SPRN_... forms - file ends up included in alot of places and namespace
pollution like that is a Bad Thing(tm).
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

arch/ppc/kernel/head.S

@@ -552,7 +552,7 @@ InstructionTLBMiss:
 	rlwimi	r3,r3,32-1,31,31	/* _PAGE_USER -> PP lsb */
 	ori	r1,r1,0xe14		/* clear out reserved bits and M */
 	andc	r1,r3,r1		/* PP = user? (rw&dirty? 2: 3): 0 */
-	mtspr	RPA,r1
+	mtspr	SPRN_RPA,r1
 	mfspr	r3,IMISS
 	tlbli	r3
 	mfspr	r3,SRR1		/* Need to restore CR0 */
@@ -626,7 +626,7 @@ DataLoadTLBMiss:
 	rlwimi	r3,r3,32-1,31,31	/* _PAGE_USER -> PP lsb */
 	ori	r1,r1,0xe14		/* clear out reserved bits and M */
 	andc	r1,r3,r1		/* PP = user? (rw&dirty? 2: 3): 0 */
-	mtspr	RPA,r1
+	mtspr	SPRN_RPA,r1
 	mfspr	r3,DMISS
 	tlbld	r3
 	mfspr	r3,SRR1		/* Need to restore CR0 */
@@ -694,7 +694,7 @@ DataStoreTLBMiss:
 	rlwimi	r3,r3,32-1,30,30	/* _PAGE_USER -> PP msb */
 	li	r1,0xe15		/* clear out reserved bits and M */
 	andc	r1,r3,r1		/* PP = user? 2: 0 */
-	mtspr	RPA,r1
+	mtspr	SPRN_RPA,r1
 	mfspr	r3,DMISS
 	tlbld	r3
 	mfspr	r3,SRR1		/* Need to restore CR0 */

arch/ppc64/kernel/head.S

@@ -683,7 +683,7 @@ Decrementer_Iseries_masked:
 	li	r11,1
 	stb	r11,PACALPPACA+LPPACADECRINT(r13)
 	lwz	r12,PACADEFAULTDECR(r13)
-	mtspr	DEC,r12
+	mtspr	SPRN_DEC,r12
 	/* fall through */
 
 	.globl HardwareInterrupt_Iseries_masked

drivers/char/pcmcia/synclink_cs.c

@@ -258,6 +258,11 @@ typedef struct _mgslpc_info {
 #define CHA     0x00   /* channel A offset */
 #define CHB     0x40   /* channel B offset */
 
+/*
+ *  FIXME: PPC has PVR defined in asm/reg.h.  For now we just undef it.
+ */
+#undef PVR
+    
 #define RXFIFO  0
 #define TXFIFO  0
 #define STAR    0x20

drivers/char/synclinkmp.c

@@ -361,6 +361,10 @@ typedef struct _synclinkmp_info {
 #define TMCS	0x64
 #define TEPR	0x65
 
+/*
+ *  FIXME: DAR here clashed with asm-ppc/reg.h and asm-sh/.../dma.h
+ */
+#undef DAR
 /* DMA Controller Register macros */
 #define DAR	0x80
 #define DARL	0x80

include/asm-ppc/reg.h

@@ -350,7 +350,7 @@
 #define DBAT6U	SPRN_DBAT6U	/* Data BAT 6 Upper Register */
 #define DBAT7L	SPRN_DBAT7L	/* Data BAT 7 Lower Register */
 #define DBAT7U	SPRN_DBAT7U	/* Data BAT 7 Upper Register */
-#define DEC	SPRN_DEC	/* Decrement Register */
+//#define DEC	SPRN_DEC	/* Decrement Register */
 #define DMISS	SPRN_DMISS	/* Data TLB Miss Register */
 #define DSISR	SPRN_DSISR	/* Data Storage Interrupt Status Register */
 #define EAR	SPRN_EAR	/* External Address Register */
@@ -380,9 +380,9 @@
 #define IMMR	SPRN_IMMR	/* PPC 860/821 Internal Memory Map Register */
 #define L2CR	SPRN_L2CR	/* Classic PPC L2 cache control register */
 #define L3CR	SPRN_L3CR	/* PPC 745x L3 cache control register */
-#define LR	SPRN_LR
+//#define LR	SPRN_LR
 #define PVR	SPRN_PVR	/* Processor Version */
-#define RPA	SPRN_RPA	/* Required Physical Address Register */
+//#define RPA	SPRN_RPA	/* Required Physical Address Register */
 #define SDR1	SPRN_SDR1	/* MMU hash base register */
 #define SPR0	SPRN_SPRG0	/* Supervisor Private Registers */
 #define SPR1	SPRN_SPRG1
@@ -489,6 +489,7 @@
 #define SVR_8555E	0x80790000
 #define SVR_8560	0x80700000
 
+#if 0
 /* Segment Registers */
 #define SR0	0
 #define SR1	1
@@ -506,6 +507,7 @@
 #define SR13	13
 #define SR14	14
 #define SR15	15
+#endif
 
 /* Macros for setting and retrieving special purpose registers */
 #ifndef __ASSEMBLY__

include/asm-ppc64/processor.h

@@ -348,7 +348,7 @@
 #define	PVR	SPRN_PVR	/* Processor Version */
 #define	PIR	SPRN_PIR	/* Processor ID */
 #define	PURR	SPRN_PURR	/* Processor Utilization of Resource Register */
-#define	RPA	SPRN_RPA	/* Required Physical Address Register */
+//#define	RPA	SPRN_RPA	/* Required Physical Address Register */
 #define	SDR1	SPRN_SDR1      	/* MMU hash base register */
 #define	SPR0	SPRN_SPRG0	/* Supervisor Private Registers */
 #define	SPR1	SPRN_SPRG1