Commit 33af6bcc authored by Patrick Ohly's avatar Patrick Ohly Committed by David S. Miller

igb: use timecompare to implement hardware time stamping

Both TX and RX hardware time stamping are implemented.  Due to
hardware limitations it is not possible to verify reliably which
packet was time stamped when multiple were pending for sending; this
could be solved by only allowing one packet marked for hardware time
stamping into the queue (not implemented yet).

RX time stamping relies on the flag in the packet descriptor which
marks packets that were time stamped. In "all packet" mode this flag
is not set. TODO: also support that mode (even though it'll suffer
from race conditions).
Signed-off-by: default avatarJohn Ronciak <john.ronciak@intel.com>
Signed-off-by: default avatarPatrick Ohly <patrick.ohly@intel.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent c6cb090b
...@@ -116,6 +116,7 @@ union e1000_adv_tx_desc { ...@@ -116,6 +116,7 @@ union e1000_adv_tx_desc {
}; };
/* Adv Transmit Descriptor Config Masks */ /* Adv Transmit Descriptor Config Masks */
#define E1000_ADVTXD_MAC_TSTAMP 0x00080000 /* IEEE1588 Timestamp packet */
#define E1000_ADVTXD_DTYP_CTXT 0x00200000 /* Advanced Context Descriptor */ #define E1000_ADVTXD_DTYP_CTXT 0x00200000 /* Advanced Context Descriptor */
#define E1000_ADVTXD_DTYP_DATA 0x00300000 /* Advanced Data Descriptor */ #define E1000_ADVTXD_DTYP_DATA 0x00300000 /* Advanced Data Descriptor */
#define E1000_ADVTXD_DCMD_IFCS 0x02000000 /* Insert FCS (Ethernet CRC) */ #define E1000_ADVTXD_DCMD_IFCS 0x02000000 /* Insert FCS (Ethernet CRC) */
......
...@@ -104,6 +104,7 @@ ...@@ -104,6 +104,7 @@
#define E1000_RXD_STAT_UDPCS 0x10 /* UDP xsum calculated */ #define E1000_RXD_STAT_UDPCS 0x10 /* UDP xsum calculated */
#define E1000_RXD_STAT_TCPCS 0x20 /* TCP xsum calculated */ #define E1000_RXD_STAT_TCPCS 0x20 /* TCP xsum calculated */
#define E1000_RXD_STAT_DYNINT 0x800 /* Pkt caused INT via DYNINT */ #define E1000_RXD_STAT_DYNINT 0x800 /* Pkt caused INT via DYNINT */
#define E1000_RXD_STAT_TS 0x10000 /* Pkt was time stamped */
#define E1000_RXD_ERR_CE 0x01 /* CRC Error */ #define E1000_RXD_ERR_CE 0x01 /* CRC Error */
#define E1000_RXD_ERR_SE 0x02 /* Symbol Error */ #define E1000_RXD_ERR_SE 0x02 /* Symbol Error */
#define E1000_RXD_ERR_SEQ 0x04 /* Sequence Error */ #define E1000_RXD_ERR_SEQ 0x04 /* Sequence Error */
......
...@@ -78,9 +78,37 @@ ...@@ -78,9 +78,37 @@
/* IEEE 1588 TIMESYNCH */ /* IEEE 1588 TIMESYNCH */
#define E1000_TSYNCTXCTL 0x0B614 #define E1000_TSYNCTXCTL 0x0B614
#define E1000_TSYNCTXCTL_VALID (1<<0)
#define E1000_TSYNCTXCTL_ENABLED (1<<4)
#define E1000_TSYNCRXCTL 0x0B620 #define E1000_TSYNCRXCTL 0x0B620
#define E1000_TSYNCRXCTL_VALID (1<<0)
#define E1000_TSYNCRXCTL_ENABLED (1<<4)
enum {
E1000_TSYNCRXCTL_TYPE_L2_V2 = 0,
E1000_TSYNCRXCTL_TYPE_L4_V1 = (1<<1),
E1000_TSYNCRXCTL_TYPE_L2_L4_V2 = (1<<2),
E1000_TSYNCRXCTL_TYPE_ALL = (1<<3),
E1000_TSYNCRXCTL_TYPE_EVENT_V2 = (1<<3) | (1<<1),
};
#define E1000_TSYNCRXCFG 0x05F50 #define E1000_TSYNCRXCFG 0x05F50
enum {
E1000_TSYNCRXCFG_PTP_V1_SYNC_MESSAGE = 0<<0,
E1000_TSYNCRXCFG_PTP_V1_DELAY_REQ_MESSAGE = 1<<0,
E1000_TSYNCRXCFG_PTP_V1_FOLLOWUP_MESSAGE = 2<<0,
E1000_TSYNCRXCFG_PTP_V1_DELAY_RESP_MESSAGE = 3<<0,
E1000_TSYNCRXCFG_PTP_V1_MANAGEMENT_MESSAGE = 4<<0,
E1000_TSYNCRXCFG_PTP_V2_SYNC_MESSAGE = 0<<8,
E1000_TSYNCRXCFG_PTP_V2_DELAY_REQ_MESSAGE = 1<<8,
E1000_TSYNCRXCFG_PTP_V2_PATH_DELAY_REQ_MESSAGE = 2<<8,
E1000_TSYNCRXCFG_PTP_V2_PATH_DELAY_RESP_MESSAGE = 3<<8,
E1000_TSYNCRXCFG_PTP_V2_FOLLOWUP_MESSAGE = 8<<8,
E1000_TSYNCRXCFG_PTP_V2_DELAY_RESP_MESSAGE = 9<<8,
E1000_TSYNCRXCFG_PTP_V2_PATH_DELAY_FOLLOWUP_MESSAGE = 0xA<<8,
E1000_TSYNCRXCFG_PTP_V2_ANNOUNCE_MESSAGE = 0xB<<8,
E1000_TSYNCRXCFG_PTP_V2_SIGNALLING_MESSAGE = 0xC<<8,
E1000_TSYNCRXCFG_PTP_V2_MANAGEMENT_MESSAGE = 0xD<<8,
};
#define E1000_SYSTIML 0x0B600 #define E1000_SYSTIML 0x0B600
#define E1000_SYSTIMH 0x0B604 #define E1000_SYSTIMH 0x0B604
#define E1000_TIMINCA 0x0B608 #define E1000_TIMINCA 0x0B608
...@@ -103,6 +131,18 @@ ...@@ -103,6 +131,18 @@
#define E1000_ETQF6 0x05CC8 #define E1000_ETQF6 0x05CC8
#define E1000_ETQF7 0x05CCC #define E1000_ETQF7 0x05CCC
/* Filtering Registers */
#define E1000_SAQF(_n) (0x5980 + 4 * (_n))
#define E1000_DAQF(_n) (0x59A0 + 4 * (_n))
#define E1000_SPQF(_n) (0x59C0 + 4 * (_n))
#define E1000_FTQF(_n) (0x59E0 + 4 * (_n))
#define E1000_SAQF0 E1000_SAQF(0)
#define E1000_DAQF0 E1000_DAQF(0)
#define E1000_SPQF0 E1000_SPQF(0)
#define E1000_FTQF0 E1000_FTQF(0)
#define E1000_SYNQF(_n) (0x055FC + (4 * (_n))) /* SYN Packet Queue Fltr */
#define E1000_ETQF(_n) (0x05CB0 + (4 * (_n))) /* EType Queue Fltr */
/* Split and Replication RX Control - RW */ /* Split and Replication RX Control - RW */
/* /*
* Convenience macros * Convenience macros
......
...@@ -35,6 +35,8 @@ ...@@ -35,6 +35,8 @@
#include "e1000_82575.h" #include "e1000_82575.h"
#include <linux/clocksource.h> #include <linux/clocksource.h>
#include <linux/timecompare.h>
#include <linux/net_tstamp.h>
struct igb_adapter; struct igb_adapter;
...@@ -255,6 +257,8 @@ struct igb_adapter { ...@@ -255,6 +257,8 @@ struct igb_adapter {
struct net_device_stats net_stats; struct net_device_stats net_stats;
struct cyclecounter cycles; struct cyclecounter cycles;
struct timecounter clock; struct timecounter clock;
struct timecompare compare;
struct hwtstamp_config hwtstamp_config;
/* structs defined in e1000_hw.h */ /* structs defined in e1000_hw.h */
struct e1000_hw hw; struct e1000_hw hw;
......
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