Commit 36c4bef3 authored by Paul Kocialkowski's avatar Paul Kocialkowski Committed by Maxime Ripard

ARM: dts: sun8i-h3: Add Video Engine and reserved memory nodes

This adds nodes for the Video Engine and the associated reserved memory
for the H3. Up to 96 MiB of memory are dedicated to the CMA pool.
Signed-off-by: default avatarPaul Kocialkowski <paul.kocialkowski@bootlin.com>
Acked-by: default avatarMaxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@bootlin.com>
parent 80c21c8c
...@@ -119,6 +119,20 @@ timer { ...@@ -119,6 +119,20 @@ timer {
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
}; };
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
cma_pool: cma@4a000000 {
compatible = "shared-dma-pool";
size = <0x6000000>;
alloc-ranges = <0x4a000000 0x6000000>;
reusable;
linux,cma-default;
};
};
soc { soc {
system-control@1c00000 { system-control@1c00000 {
compatible = "allwinner,sun8i-h3-system-control"; compatible = "allwinner,sun8i-h3-system-control";
...@@ -142,6 +156,17 @@ ve_sram: sram-section@0 { ...@@ -142,6 +156,17 @@ ve_sram: sram-section@0 {
}; };
}; };
video-codec@01c0e000 {
compatible = "allwinner,sun8i-h3-video-engine";
reg = <0x01c0e000 0x1000>;
clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
<&ccu CLK_DRAM_VE>;
clock-names = "ahb", "mod", "ram";
resets = <&ccu RST_BUS_VE>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
allwinner,sram = <&ve_sram 1>;
};
mali: gpu@1c40000 { mali: gpu@1c40000 {
compatible = "allwinner,sun8i-h3-mali", "arm,mali-400"; compatible = "allwinner,sun8i-h3-mali", "arm,mali-400";
reg = <0x01c40000 0x10000>; reg = <0x01c40000 0x10000>;
......
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