Commit 37733200 authored by Dave Jones's avatar Dave Jones Committed by Dave Jones

[AGP] Clean up capability pointer detection.

This has to be done differently on some chipsets, so I moved it back into the
chipset drivers for now. This cleanup also fixed a few bugs, which may also make
the hammer gart start working again.
parent fad84c43
......@@ -342,13 +342,18 @@ static int __init agp_lookup_host_bridge (struct pci_dev *pdev)
static int agp_ali_probe (struct pci_dev *dev, const struct pci_device_id *ent)
{
if (pci_find_capability(dev, PCI_CAP_ID_AGP)==0)
return -ENODEV;
u8 cap_ptr = 0;
agp_bridge.dev = dev;
cap_ptr = pci_find_capability(dev, PCI_CAP_ID_AGP);
if (cap_ptr == 0)
return -ENODEV;
/* probe for known chipsets */
if (agp_lookup_host_bridge (dev) != -ENODEV ) {
if (agp_lookup_host_bridge(dev) != -ENODEV) {
agp_bridge.dev = dev;
agp_bridge.capndx = cap_ptr;
/* Fill in the mode register */
pci_read_config_dword(agp_bridge.dev, agp_bridge.capndx+4, &agp_bridge.mode);
agp_register_driver(dev);
return 0;
}
......
......@@ -439,21 +439,19 @@ static int __init agp_lookup_host_bridge (struct pci_dev *pdev)
/* Supported Device Scanning routine */
static int __init agp_find_supported_device(struct pci_dev *dev)
static int agp_amdk7_probe (struct pci_dev *dev, const struct pci_device_id *ent)
{
agp_bridge.dev = dev;
u8 cap_ptr = 0;
if (pci_find_capability(dev, PCI_CAP_ID_AGP)==0)
cap_ptr = pci_find_capability(dev, PCI_CAP_ID_AGP);
if (cap_ptr == 0)
return -ENODEV;
/* probe for known chipsets */
return agp_lookup_host_bridge (dev);
}
static int agp_amdk7_probe (struct pci_dev *dev, const struct pci_device_id *ent)
{
if (agp_find_supported_device(dev) == 0) {
if (agp_lookup_host_bridge(dev) != -ENODEV) {
agp_bridge.dev = dev;
agp_bridge.capndx = cap_ptr;
/* Fill in the mode register */
pci_read_config_dword(agp_bridge.dev, agp_bridge.capndx+4, &agp_bridge.mode);
agp_register_driver(dev);
return 0;
}
......
......@@ -370,7 +370,7 @@ static void agp_x86_64_agp_enable(u32 mode)
}
pci_read_config_dword(agp_bridge.dev, agp_bridge.capndx + 4, &command);
pci_read_config_dword(agp_bridge.dev, agp_bridge.capndx+4, &command);
/*
* PASS2: go through all devices that claim to be
......@@ -429,7 +429,7 @@ static void agp_x86_64_agp_enable(u32 mode)
command |= 0x100;
pci_write_config_dword(agp_bridge.dev, agp_bridge.capndx + 8, command);
pci_write_config_dword(agp_bridge.dev, agp_bridge.capndx+8, command);
/*
* PASS4: Go through all AGP devices and update the
......@@ -477,9 +477,17 @@ static int __init amd_8151_setup (struct pci_dev *pdev)
static int agp_amdk8_probe (struct pci_dev *dev, const struct pci_device_id *ent)
{
if (pci_find_capability(dev, PCI_CAP_ID_AGP)==0)
u8 cap_ptr = 0;
cap_ptr = pci_find_capability(dev, PCI_CAP_ID_AGP);
if (cap_ptr == 0)
return -ENODEV;
agp_bridge.dev = dev;
agp_bridge.capndx = cap_ptr;
/* Fill in the mode register */
pci_read_config_dword(agp_bridge.dev, agp_bridge.capndx+4, &agp_bridge.mode);
amd_8151_setup(dev);
agp_register_driver(dev);
return 0;
......
......@@ -115,20 +115,10 @@ static struct agp_version agp_current_version =
static int __init agp_backend_initialize(struct pci_dev *dev)
{
int size_value, rc, got_gatt=0, got_keylist=0;
u8 cap_ptr = 0;
agp_bridge.max_memory_agp = agp_find_max();
agp_bridge.version = &agp_current_version;
cap_ptr = pci_find_capability(dev, PCI_CAP_ID_AGP);
if (cap_ptr == 0)
return -ENODEV;
agp_bridge.capndx = cap_ptr;
/* Fill in the mode register */
pci_read_config_dword(agp_bridge.dev, agp_bridge.capndx + 4, &agp_bridge.mode);
if (agp_bridge.needs_scratch_page == TRUE) {
void *addr;
addr = agp_bridge.agp_alloc_page();
......
......@@ -562,9 +562,14 @@ int __init intel_i460_setup (struct pci_dev *pdev __attribute__((unused)))
static int agp_intel_i460_probe (struct pci_dev *dev, const struct pci_device_id *ent)
{
if (pci_find_capability(dev, PCI_CAP_ID_AGP)==0)
u8 cap_ptr = 0;
cap_ptr = pci_find_capability(dev, PCI_CAP_ID_AGP);
if (cap_ptr == 0)
return -ENODEV;
agp_bridge.dev = dev;
agp_bridge.capndx = cap_ptr;
intel_i460_setup(dev);
agp_register_driver(dev);
return 0;
......
......@@ -166,27 +166,26 @@ static int __init agp_lookup_host_bridge (struct pci_dev *pdev)
}
static int __init agp_find_supported_device(struct pci_dev *dev)
static int agp_i7x05_probe (struct pci_dev *dev, const struct pci_device_id *ent)
{
agp_bridge.dev = dev;
u8 cap_ptr = 0;
if (pci_find_capability(dev, PCI_CAP_ID_AGP)==0)
cap_ptr = pci_find_capability(dev, PCI_CAP_ID_AGP);
if (cap_ptr == 0)
return -ENODEV;
/* probe for known chipsets */
return agp_lookup_host_bridge(dev);
}
static int agp_i7x05_probe (struct pci_dev *dev, const struct pci_device_id *ent)
{
if (agp_find_supported_device(dev) == 0) {
if (agp_lookup_host_bridge(dev) != -ENODEV) {
agp_bridge.dev = dev;
agp_bridge.capndx = cap_ptr;
/* Fill in the mode register */
pci_read_config_dword(agp_bridge.dev, agp_bridge.capndx+4, &agp_bridge.mode)
agp_register_driver(dev);
return 0;
}
return -ENODEV;
}
static struct pci_device_id agp_i7x05_pci_table[] __initdata = {
{
.class = (PCI_CLASS_BRIDGE_HOST << 8),
......
......@@ -1329,6 +1329,7 @@ static int __init agp_lookup_host_bridge (struct pci_dev *pdev)
static int __init agp_find_supported_device(struct pci_dev *dev)
{
struct pci_dev *i810_dev;
u8 cap_ptr = 0;
agp_bridge.dev = dev;
......@@ -1424,8 +1425,13 @@ static int __init agp_find_supported_device(struct pci_dev *dev)
break;
}
if (pci_find_capability(dev, PCI_CAP_ID_AGP)==0)
cap_ptr = pci_find_capability(dev, PCI_CAP_ID_AGP);
if (cap_ptr == 0)
return -ENODEV;
agp_bridge.capndx = cap_ptr;
/* Fill in the mode register */
pci_read_config_dword(agp_bridge.dev, agp_bridge.capndx+4, &agp_bridge.mode);
/* probe for known chipsets */
return agp_lookup_host_bridge(dev);
......@@ -1489,4 +1495,3 @@ module_exit(agp_intel_cleanup);
MODULE_PARM(agp_try_unsupported, "1i");
MODULE_AUTHOR("Dave Jones <davej@codemonkey.org.uk>");
MODULE_LICENSE("GPL and additional rights");
......@@ -223,21 +223,20 @@ static int __init agp_lookup_host_bridge (struct pci_dev *pdev)
}
static int __init agp_find_supported_device(struct pci_dev *dev)
static int agp_sis_probe (struct pci_dev *dev, const struct pci_device_id *ent)
{
agp_bridge.dev = dev;
u8 cap_ptr = 0;
if (pci_find_capability(dev, PCI_CAP_ID_AGP)==0)
cap_ptr = pci_find_capability(dev, PCI_CAP_ID_AGP);
if (cap_ptr == 0)
return -ENODEV;
/* probe for known chipsets */
return agp_lookup_host_bridge (dev);
}
static int agp_sis_probe (struct pci_dev *dev, const struct pci_device_id *ent)
{
if (agp_find_supported_device(dev) == 0) {
if (agp_lookup_host_bridge(dev) != -ENODEV) {
agp_bridge.dev = dev;
agp_bridge.capndx = cap_ptr;
/* Fill in the mode register */
pci_read_config_dword(agp_bridge.dev, agp_bridge.capndx+4, &agp_bridge.mode);
agp_register_driver(dev);
return 0;
}
......
......@@ -169,9 +169,7 @@ static int serverworks_create_gatt_table(void)
* used to program the agp master not the cpu
*/
pci_read_config_dword(agp_bridge.dev,
serverworks_private.gart_addr_ofs,
&temp);
pci_read_config_dword(agp_bridge.dev,serverworks_private.gart_addr_ofs,&temp);
agp_bridge.gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
/* Calculate the agp offset */
......@@ -206,18 +204,11 @@ static int serverworks_fetch_size(void)
struct aper_size_info_lvl2 *values;
values = A_SIZE_LVL2(agp_bridge.aperture_sizes);
pci_read_config_dword(agp_bridge.dev,
serverworks_private.gart_addr_ofs,
&temp);
pci_write_config_dword(agp_bridge.dev,
serverworks_private.gart_addr_ofs,
pci_read_config_dword(agp_bridge.dev,serverworks_private.gart_addr_ofs,&temp);
pci_write_config_dword(agp_bridge.dev,serverworks_private.gart_addr_ofs,
SVWRKS_SIZE_MASK);
pci_read_config_dword(agp_bridge.dev,
serverworks_private.gart_addr_ofs,
&temp2);
pci_write_config_dword(agp_bridge.dev,
serverworks_private.gart_addr_ofs,
temp);
pci_read_config_dword(agp_bridge.dev,serverworks_private.gart_addr_ofs,&temp2);
pci_write_config_dword(agp_bridge.dev,serverworks_private.gart_addr_ofs,temp);
temp2 &= SVWRKS_SIZE_MASK;
for (i = 0; i < agp_bridge.num_aperture_sizes; i++) {
......@@ -245,9 +236,7 @@ static int serverworks_configure(void)
current_size = A_SIZE_LVL2(agp_bridge.current_size);
/* Get the memory mapped registers */
pci_read_config_dword(agp_bridge.dev,
serverworks_private.mm_addr_ofs,
&temp);
pci_read_config_dword(agp_bridge.dev, serverworks_private.mm_addr_ofs, &temp);
temp = (temp & PCI_BASE_ADDRESS_MEM_MASK);
serverworks_private.registers = (volatile u8 *) ioremap(temp, 4096);
......@@ -269,7 +258,7 @@ static int serverworks_configure(void)
agp_bridge.tlb_flush(NULL);
pci_read_config_byte(serverworks_private.svrwrks_dev, 0x34, &cap_ptr);
if (cap_ptr != 0x00) {
if (cap_ptr != 0) {
do {
pci_read_config_dword(serverworks_private.svrwrks_dev,
cap_ptr, &cap_id);
......@@ -277,30 +266,21 @@ static int serverworks_configure(void)
if ((cap_id & 0xff) != 0x02)
cap_ptr = (cap_id >> 8) & 0xff;
}
while (((cap_id & 0xff) != 0x02) && (cap_ptr != 0x00));
while (((cap_id & 0xff) != 0x02) && (cap_ptr != 0));
}
agp_bridge.capndx = cap_ptr;
/* Fill in the mode register */
pci_read_config_dword(serverworks_private.svrwrks_dev,
agp_bridge.capndx + 4,
&agp_bridge.mode);
agp_bridge.capndx+4, &agp_bridge.mode);
pci_read_config_byte(agp_bridge.dev,
SVWRKS_CACHING,
&enable_reg);
pci_read_config_byte(agp_bridge.dev, SVWRKS_CACHING, &enable_reg);
enable_reg &= ~0x3;
pci_write_config_byte(agp_bridge.dev,
SVWRKS_CACHING,
enable_reg);
pci_write_config_byte(agp_bridge.dev, SVWRKS_CACHING, enable_reg);
pci_read_config_byte(agp_bridge.dev,
SVWRKS_FEATURE,
&enable_reg);
pci_read_config_byte(agp_bridge.dev, SVWRKS_FEATURE, &enable_reg);
enable_reg |= (1<<6);
pci_write_config_byte(agp_bridge.dev,
SVWRKS_FEATURE,
enable_reg);
pci_write_config_byte(agp_bridge.dev,SVWRKS_FEATURE, enable_reg);
return 0;
}
......@@ -606,7 +586,6 @@ int __init serverworks_setup (struct pci_dev *pdev)
static int __init agp_find_supported_device(struct pci_dev *dev)
{
struct pci_dev *bridge_dev;
agp_bridge.dev = dev;
/* Everything is on func 1 here so we are hardcoding function one */
bridge_dev = pci_find_slot ((unsigned int)dev->bus->number, PCI_DEVFN(0, 1));
......@@ -641,6 +620,7 @@ static int __init agp_find_supported_device(struct pci_dev *dev)
static int agp_serverworks_probe (struct pci_dev *dev, const struct pci_device_id *ent)
{
if (agp_find_supported_device(dev) == 0) {
agp_bridge.dev = dev;
agp_register_driver(dev);
return 0;
}
......
......@@ -280,13 +280,18 @@ static int __init agp_lookup_host_bridge (struct pci_dev *pdev)
static int agp_via_probe (struct pci_dev *dev, const struct pci_device_id *ent)
{
if (pci_find_capability(dev, PCI_CAP_ID_AGP)==0)
return -ENODEV;
u8 cap_ptr = 0;
agp_bridge.dev = dev;
cap_ptr = pci_find_capability(dev, PCI_CAP_ID_AGP);
if (cap_ptr == 0)
return -ENODEV;
/* probe for known chipsets */
if (agp_lookup_host_bridge (dev) != -ENODEV) {
agp_bridge.dev = dev;
agp_bridge.capndx = cap_ptr;
/* Fill in the mode register */
pci_read_config_dword(agp_bridge.dev, agp_bridge.capndx+4, &agp_bridge.mode);
agp_register_driver(dev);
return 0;
}
......
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