Commit 37969581 authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'for-2.6.25' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc

* 'for-2.6.25' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (69 commits)
  [POWERPC] Add SPE registers to core dumps
  [POWERPC] Use regset code for compat PTRACE_*REGS* calls
  [POWERPC] Use generic compat_sys_ptrace
  [POWERPC] Use generic compat_ptrace_request
  [POWERPC] Use generic ptrace peekdata/pokedata
  [POWERPC] Use regset code for PTRACE_*REGS* requests
  [POWERPC] Switch to generic compat_binfmt_elf code
  [POWERPC] Switch to using user_regset-based core dumps
  [POWERPC] Add user_regset compat support
  [POWERPC] Add user_regset_view definitions
  [POWERPC] Use user_regset accessors for GPRs
  [POWERPC] ptrace accessors for special regs MSR and TRAP
  [POWERPC] Use user_regset accessors for SPE regs
  [POWERPC] Use user_regset accessors for altivec regs
  [POWERPC] Use user_regset accessors for FP regs
  [POWERPC] mpc52xx: fix compile error introduce when rebasing patch
  [POWERPC] 4xx: PCIe indirect DCR spinlock fix.
  [POWERPC] Add missing native dcr dcr_ind_lock spinlock
  [POWERPC] 4xx: Fix offset value on Warp board
  [POWERPC] 4xx: Add 440EPx Sequoia ehci dts entry
  ...
parents 80ff8a80 24f1a849
......@@ -57,6 +57,7 @@ Table of Contents
n) 4xx/Axon EMAC ethernet nodes
o) Xilinx IP cores
p) Freescale Synchronous Serial Interface
q) USB EHCI controllers
VII - Specifying interrupt information for devices
1) interrupts property
......@@ -2577,6 +2578,20 @@ platforms are moved over to use the flattened-device-tree model.
Requred properties:
- current-speed : Baud rate of uartlite
v) Xilinx hwicap
Xilinx hwicap devices provide access to the configuration logic
of the FPGA through the Internal Configuration Access Port
(ICAP). The ICAP enables partial reconfiguration of the FPGA,
readback of the configuration information, and some control over
'warm boots' of the FPGA fabric.
Required properties:
- xlnx,family : The family of the FPGA, necessary since the
capabilities of the underlying ICAP hardware
differ between different families. May be
'virtex2p', 'virtex4', or 'virtex5'.
p) Freescale Synchronous Serial Interface
The SSI is a serial device that communicates with audio codecs. It can
......@@ -2775,6 +2790,33 @@ platforms are moved over to use the flattened-device-tree model.
interrupt-parent = < &ipic >;
};
q) USB EHCI controllers
Required properties:
- compatible : should be "usb-ehci".
- reg : should contain at least address and length of the standard EHCI
register set for the device. Optional platform-dependent registers
(debug-port or other) can be also specified here, but only after
definition of standard EHCI registers.
- interrupts : one EHCI interrupt should be described here.
If device registers are implemented in big endian mode, the device
node should have "big-endian-regs" property.
If controller implementation operates with big endian descriptors,
"big-endian-desc" property should be specified.
If both big endian registers and descriptors are used by the controller
implementation, "big-endian" property can be specified instead of having
both "big-endian-regs" and "big-endian-desc".
Example (Sequoia 440EPx):
ehci@e0000300 {
compatible = "ibm,usb-ehci-440epx", "usb-ehci";
interrupt-parent = <&UIC0>;
interrupts = <1a 4>;
reg = <0 e0000300 90 0 e0000390 70>;
big-endian;
};
More devices will be defined as this spec matures.
VII - Specifying interrupt information for devices
......
......@@ -97,6 +97,7 @@ config EARLY_PRINTK
config COMPAT
bool
default y if PPC64
select COMPAT_BINFMT_ELF
config SYSVIPC_COMPAT
bool
......@@ -438,25 +439,6 @@ config WANT_DEVICE_TREE
bool
default n
config DEVICE_TREE
string "Static device tree source file"
depends on WANT_DEVICE_TREE
help
This specifies the device tree source (.dts) file to be
compiled and included when building the bootwrapper. If a
relative filename is given, then it will be relative to
arch/powerpc/boot/dts. If you are not using the bootwrapper,
or do not need to build a dts into the bootwrapper, this
field is ignored.
For example, this is required when building a cuImage target
for an older U-Boot, which cannot pass a device tree itself.
Such a kernel will not work with a newer U-Boot that tries to
pass a device tree (unless you tell it not to). If your U-Boot
does not mention a device tree in "help bootm", then use the
cuImage target and specify a device tree here. Otherwise, use
the uImage target and leave this field blank.
endmenu
config ISA_DMA_API
......@@ -512,7 +494,7 @@ config PCI
bool "PCI support" if 40x || CPM2 || PPC_83xx || PPC_85xx || PPC_86xx \
|| PPC_MPC52xx || (EMBEDDED && (PPC_PSERIES || PPC_ISERIES)) \
|| PPC_PS3 || 44x
default y if !40x && !CPM2 && !8xx && !PPC_83xx \
default y if !40x && !CPM2 && !8xx && !PPC_MPC512x && !PPC_83xx \
&& !PPC_85xx && !PPC_86xx
default PCI_PERMEDIA if !4xx && !CPM2 && !8xx
default PCI_QSPAN if !4xx && !CPM2 && 8xx
......
......@@ -151,14 +151,11 @@ core-$(CONFIG_XMON) += arch/powerpc/xmon/
drivers-$(CONFIG_OPROFILE) += arch/powerpc/oprofile/
# Default to zImage, override when needed
defaultimage-y := zImage
defaultimage-$(CONFIG_DEFAULT_UIMAGE) := uImage
KBUILD_IMAGE := $(defaultimage-y)
all: $(KBUILD_IMAGE)
all: zImage
CPPFLAGS_vmlinux.lds := -Upowerpc
BOOT_TARGETS = zImage zImage.initrd uImage
BOOT_TARGETS = zImage zImage.initrd uImage treeImage.% cuImage.%
PHONY += $(BOOT_TARGETS)
......@@ -180,7 +177,7 @@ define archhelp
endef
install: vdso_install
$(Q)$(MAKE) $(build)=$(boot) BOOTIMAGE=$(KBUILD_IMAGE) install
$(Q)$(MAKE) $(build)=$(boot) install
vdso_install:
ifeq ($(CONFIG_PPC64),y)
......
......@@ -60,8 +60,9 @@ src-wlib := string.S crt0.S stdio.c main.c \
src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c \
cuboot-ebony.c treeboot-ebony.c prpmc2800.c \
ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \
cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c cuboot-bamboo.c \
fixed-head.S ep88xc.c cuboot-hpc2.c ep405.c cuboot-taishan.c \
cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c \
cuboot-bamboo.c cuboot-mpc7448hpc2.c cuboot-taishan.c \
fixed-head.S ep88xc.c ep405.c \
cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
cuboot-warp.c cuboot-85xx-cpm2.c
src-boot := $(src-wlib) $(src-plat) empty.c
......@@ -123,6 +124,8 @@ targets += $(patsubst $(obj)/%,%,$(obj-boot) wrapper.a)
extra-y := $(obj)/wrapper.a $(obj-plat) $(obj)/empty.o \
$(obj)/zImage.lds $(obj)/zImage.coff.lds $(obj)/zImage.ps3.lds
dtstree := $(srctree)/$(src)/dts
wrapper :=$(srctree)/$(src)/wrapper
wrapperbits := $(extra-y) $(addprefix $(obj)/,addnote hack-coff mktree dtc) \
$(wrapper) FORCE
......@@ -181,7 +184,7 @@ quiet_cmd_wrap = WRAP $@
image-$(CONFIG_PPC_PSERIES) += zImage.pseries
image-$(CONFIG_PPC_MAPLE) += zImage.pseries
image-$(CONFIG_PPC_IBM_CELL_BLADE) += zImage.pseries
image-$(CONFIG_PPC_PS3) += zImage.ps3
image-$(CONFIG_PPC_PS3) += zImage-dtb.ps3
image-$(CONFIG_PPC_CELLEB) += zImage.pseries
image-$(CONFIG_PPC_CHRP) += zImage.chrp
image-$(CONFIG_PPC_EFIKA) += zImage.chrp
......@@ -191,33 +194,69 @@ image-$(CONFIG_PPC_PRPMC2800) += zImage.prpmc2800
image-$(CONFIG_PPC_ISERIES) += zImage.iseries
image-$(CONFIG_DEFAULT_UIMAGE) += uImage
ifneq ($(CONFIG_DEVICE_TREE),"")
image-$(CONFIG_PPC_8xx) += cuImage.8xx
image-$(CONFIG_PPC_EP88XC) += zImage.ep88xc
image-$(CONFIG_EP405) += zImage.ep405
image-$(CONFIG_8260) += cuImage.pq2
image-$(CONFIG_EP8248E) += zImage.ep8248e
image-$(CONFIG_PPC_MPC52xx) += cuImage.52xx
image-$(CONFIG_STORCENTER) += cuImage.824x
image-$(CONFIG_PPC_83xx) += cuImage.83xx
image-$(CONFIG_PPC_85xx) += cuImage.85xx
ifeq ($(CONFIG_CPM2),y)
image-$(CONFIG_PPC_85xx) += cuImage.85xx-cpm2
endif
image-$(CONFIG_MPC7448HPC2) += cuImage.hpc2
#
# Targets which embed a device tree blob
#
# Theses are default targets to build images which embed device tree blobs.
# They are only required on boards which do not have FDT support in firmware.
# Boards with newish u-boot firmare can use the uImage target above
#
# Board ports in arch/powerpc/platform/40x/Kconfig
image-$(CONFIG_EP405) += zImage-dtb.ep405
image-$(CONFIG_WALNUT) += treeImage.walnut
# Board ports in arch/powerpc/platform/44x/Kconfig
image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
image-$(CONFIG_BAMBOO) += treeImage.bamboo cuImage.bamboo
image-$(CONFIG_SEQUOIA) += cuImage.sequoia
image-$(CONFIG_RAINIER) += cuImage.rainier
image-$(CONFIG_WALNUT) += treeImage.walnut
image-$(CONFIG_TAISHAN) += cuImage.taishan
image-$(CONFIG_KATMAI) += cuImage.katmai
image-$(CONFIG_WARP) += cuImage.warp
endif
ifneq ($(CONFIG_REDBOOT),"")
image-$(CONFIG_PPC_8xx) += zImage.redboot-8xx
endif
# Board ports in arch/powerpc/platform/8xx/Kconfig
image-$(CONFIG_PPC_MPC86XADS) += cuImage.mpc866ads
image-$(CONFIG_PPC_MPC885ADS) += cuImage.mpc885ads
image-$(CONFIG_PPC_EP88XC) += zImage-dtb.ep88xc
image-$(CONFIG_PPC_ADDER875) += cuImage.adder875-uboot \
zImage-dtb.adder875-redboot
# Board ports in arch/powerpc/platform/52xx/Kconfig
image-$(CONFIG_PPC_LITE5200) += cuImage.lite5200 cuImage.lite5200b
# Board ports in arch/powerpc/platform/82xx/Kconfig
image-$(CONFIG_MPC8272_ADS) += cuImage.mpc8272ads
image-$(CONFIG_PQ2FADS) += cuImage.pq2fads
image-$(CONFIG_EP8248E) += zImage-dtb.ep8248e
# Board ports in arch/powerpc/platform/83xx/Kconfig
image-$(CONFIG_MPC832x_MDS) += cuImage.mpc832x_mds
image-$(CONFIG_MPC832x_RDB) += cuImage.mpc832x_rdb
image-$(CONFIG_MPC834x_ITX) += cuImage.mpc8349emitx \
cuImage.mpc8349emitxgp
image-$(CONFIG_MPC834x_MDS) += cuImage.mpc834x_mds
image-$(CONFIG_MPC836x_MDS) += cuImage.mpc836x_mds
# Board ports in arch/powerpc/platform/85xx/Kconfig
image-$(CONFIG_MPC8540_ADS) += cuImage.mpc8540ads
image-$(CONFIG_MPC8560_ADS) += cuImage.mpc8560ads
image-$(CONFIG_MPC85xx_CDS) += cuImage.mpc8541cds \
cuImage.mpc8548cds \
cuImage.mpc8555cds
image-$(CONFIG_MPC85xx_MDS) += cuImage.mpc8568mds
image-$(CONFIG_MPC85xx_DS) += cuImage.mpc8544ds \
cuImage.mpc8572ds
image-$(CONFIG_TQM8540) += cuImage.tqm8540
image-$(CONFIG_TQM8541) += cuImage.tqm8541
image-$(CONFIG_TQM8555) += cuImage.tqm8555
image-$(CONFIG_TQM8560) += cuImage.tqm8560
image-$(CONFIG_SBC8548) += cuImage.tqm8548
image-$(CONFIG_SBC8560) += cuImage.tqm8560
# Board ports in arch/powerpc/platform/embedded6xx/Kconfig
image-$(CONFIG_STORCENTER) += cuImage.storcenter
image-$(CONFIG_MPC7448HPC2) += cuImage.mpc7448hpc2
# For 32-bit powermacs, build the COFF and miboot images
# as well as the ELF images.
......@@ -233,24 +272,20 @@ targets += $(image-y) $(initrd-y)
$(addprefix $(obj)/, $(initrd-y)): $(obj)/ramdisk.image.gz
# If CONFIG_WANT_DEVICE_TREE is set and CONFIG_DEVICE_TREE isn't an
# empty string, define 'dts' to be path to the dts
# CONFIG_DEVICE_TREE will have "" around it, make sure to strip them
ifeq ($(CONFIG_WANT_DEVICE_TREE),y)
ifneq ($(CONFIG_DEVICE_TREE),"")
dts = $(if $(shell echo $(CONFIG_DEVICE_TREE) | grep '^/'),\
,$(srctree)/$(src)/dts/)$(CONFIG_DEVICE_TREE:"%"=%)
endif
endif
# Don't put the ramdisk on the pattern rule; when its missing make will try
# the pattern rule with less dependencies that also matches (even with the
# hard dependency listed).
$(obj)/zImage.initrd.%: vmlinux $(wrapperbits) $(dts)
$(call if_changed,wrap,$*,$(dts),,$(obj)/ramdisk.image.gz)
$(obj)/zImage.initrd.%: vmlinux $(wrapperbits)
$(call if_changed,wrap,$*,,,$(obj)/ramdisk.image.gz)
$(obj)/zImage.%: vmlinux $(wrapperbits) $(dts)
$(call if_changed,wrap,$*,$(dts))
$(obj)/zImage.%: vmlinux $(wrapperbits)
$(call if_changed,wrap,$*)
$(obj)/zImage-dtb.initrd.%: vmlinux $(wrapperbits) $(dtstree)/%.dts
$(call if_changed,wrap,$*,$(dtstree)/$*.dts,,$(obj)/ramdisk.image.gz)
$(obj)/zImage-dtb.%: vmlinux $(wrapperbits) $(dtstree)/%.dts
$(call if_changed,wrap,$*,$(dtstree)/$*.dts)
# This cannot be in the root of $(src) as the zImage rule always adds a $(obj)
# prefix
......@@ -260,24 +295,17 @@ $(obj)/vmlinux.strip: vmlinux
$(obj)/zImage.iseries: vmlinux
$(STRIP) -s -R .comment $< -o $@
$(obj)/zImage.ps3: vmlinux $(wrapper) $(wrapperbits) $(srctree)/$(src)/dts/ps3.dts
$(STRIP) -s -R .comment $< -o vmlinux.strip
$(call cmd,wrap,ps3,$(srctree)/$(src)/dts/ps3.dts,,)
$(obj)/zImage.initrd.ps3: vmlinux $(wrapper) $(wrapperbits) $(srctree)/$(src)/dts/ps3.dts $(obj)/ramdisk.image.gz
$(call cmd,wrap,ps3,$(srctree)/$(src)/dts/ps3.dts,,$(obj)/ramdisk.image.gz)
$(obj)/uImage: vmlinux $(wrapperbits)
$(call if_changed,wrap,uboot)
$(obj)/cuImage.%: vmlinux $(dts) $(wrapperbits)
$(call if_changed,wrap,cuboot-$*,$(dts))
$(obj)/cuImage.%: vmlinux $(dtstree)/%.dts $(wrapperbits)
$(call if_changed,wrap,cuboot-$*,$(dtstree)/$*.dts)
$(obj)/treeImage.initrd.%: vmlinux $(dts) $(wrapperbits)
$(call if_changed,wrap,treeboot-$*,$(dts),,$(obj)/ramdisk.image.gz)
$(obj)/treeImage.initrd.%: vmlinux $(dtstree)/%.dts $(wrapperbits)
$(call if_changed,wrap,treeboot-$*,$(dtstree)/$*.dts,,$(obj)/ramdisk.image.gz)
$(obj)/treeImage.%: vmlinux $(dts) $(wrapperbits)
$(call if_changed,wrap,treeboot-$*,$(dts))
$(obj)/treeImage.%: vmlinux $(dtstree)/%.dts $(wrapperbits)
$(call if_changed,wrap,treeboot-$*,$(dtstree)/$*.dts)
# If there isn't a platform selected then just strip the vmlinux.
ifeq (,$(image-y))
......
......@@ -151,6 +151,7 @@ brg@9f0 {
compatible = "fsl,mpc875-brg",
"fsl,cpm1-brg",
"fsl,cpm-brg";
clock-frequency = <50000000>;
reg = <0x9f0 0x10>;
};
......
......@@ -150,6 +150,7 @@ brg@9f0 {
compatible = "fsl,mpc875-brg",
"fsl,cpm1-brg",
"fsl,cpm-brg";
clock-frequency = <50000000>;
reg = <0x9f0 0x10>;
};
......
/*
* MPC5121E MDS Device Tree Source
*
* Copyright 2007 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/dts-v1/;
/ {
model = "mpc5121ads";
compatible = "fsl,mpc5121ads";
#address-cells = <1>;
#size-cells = <1>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
PowerPC,5121@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <0x20>; // 32 bytes
i-cache-line-size = <0x20>; // 32 bytes
d-cache-size = <0x8000>; // L1, 32K
i-cache-size = <0x8000>; // L1, 32K
timebase-frequency = <49500000>;// 49.5 MHz (csb/4)
bus-frequency = <198000000>; // 198 MHz csb bus
clock-frequency = <396000000>; // 396 MHz ppc core
};
};
memory {
device_type = "memory";
reg = <0x00000000 0x10000000>; // 256MB at 0
};
localbus@80000020 {
compatible = "fsl,mpc5121ads-localbus";
#address-cells = <2>;
#size-cells = <1>;
reg = <0x80000020 0x40>;
ranges = <0x0 0x0 0xfc000000 0x04000000
0x2 0x0 0x82000000 0x00008000>;
flash@0,0 {
compatible = "cfi-flash";
reg = <0 0x0 0x4000000>;
bank-width = <4>;
device-width = <1>;
};
board-control@2,0 {
compatible = "fsl,mpc5121ads-cpld";
reg = <0x2 0x0 0x8000>;
};
};
soc@80000000 {
compatible = "fsl,mpc5121-immr";
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <2>;
ranges = <0x0 0x80000000 0x400000>;
reg = <0x80000000 0x400000>;
bus-frequency = <66000000>; // 66 MHz ips bus
// IPIC
// interrupts cell = <intr #, sense>
// sense values match linux IORESOURCE_IRQ_* defines:
// sense == 8: Level, low assertion
// sense == 2: Edge, high-to-low change
//
ipic: interrupt-controller@c00 {
compatible = "fsl,mpc5121-ipic", "fsl,ipic";
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0xc00 0x100>;
};
// 512x PSCs are not 52xx PSCs compatible
// PSC3 serial port A aka ttyPSC0
serial@11300 {
device_type = "serial";
compatible = "fsl,mpc5121-psc-uart";
// Logical port assignment needed until driver
// learns to use aliases
port-number = <0>;
cell-index = <3>;
reg = <0x11300 0x100>;
interrupts = <0x28 0x8>; // actually the fifo irq
interrupt-parent = < &ipic >;
};
// PSC4 serial port B aka ttyPSC1
serial@11400 {
device_type = "serial";
compatible = "fsl,mpc5121-psc-uart";
// Logical port assignment needed until driver
// learns to use aliases
port-number = <1>;
cell-index = <4>;
reg = <0x11400 0x100>;
interrupts = <0x28 0x8>; // actually the fifo irq
interrupt-parent = < &ipic >;
};
pscsfifo@11f00 {
compatible = "fsl,mpc5121-psc-fifo";
reg = <0x11f00 0x100>;
interrupts = <0x28 0x8>;
interrupt-parent = < &ipic >;
};
};
};
......@@ -118,6 +118,10 @@ i2c@3000 {
interrupts = <14 0x8>;
interrupt-parent = <&ipic>;
dfsrr;
rtc@68 {
compatible = "dallas,ds1339";
reg = <0x68>;
};
};
i2c@3100 {
......
......@@ -96,7 +96,7 @@ immr@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
compatible = "simple-bus";
compatible = "fsl,mpc8315-immr", "simple-bus";
ranges = <0 0xe0000000 0x00100000>;
reg = <0xe0000000 0x00000200>;
bus-frequency = <0>;
......
......@@ -332,7 +332,7 @@ pci1: pci@e0008600 {
0xc000 0x0 0x0 0x3 &ipic 23 0x8
0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
interrupt-parent = <&ipic>;
interrupts = <66 0x8>;
interrupts = <67 0x8>;
bus-range = <0 0>;
ranges = <0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
......
......@@ -42,6 +42,18 @@ PowerPC,8572@0 {
bus-frequency = <0>;
clock-frequency = <0>;
};
PowerPC,8572@1 {
device_type = "cpu";
reg = <1>;
d-cache-line-size = <20>; // 32 bytes
i-cache-line-size = <20>; // 32 bytes
d-cache-size = <8000>; // L1, 32K
i-cache-size = <8000>; // L1, 32K
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
};
};
memory {
......
......@@ -166,6 +166,7 @@ brg@9f0 {
compatible = "fsl,mpc885-brg",
"fsl,cpm1-brg",
"fsl,cpm-brg";
clock-frequency = <0>;
reg = <9f0 10>;
};
......
......@@ -138,6 +138,14 @@ USB1: usb@e0000400 {
interrupts = <15 8>;
};
USB0: ehci@e0000300 {
compatible = "ibm,usb-ehci-440epx", "usb-ehci";
interrupt-parent = <&UIC0>;
interrupts = <1a 4>;
reg = <0 e0000300 90 0 e0000390 70>;
big-endian;
};
POB0: opb {
compatible = "ibm,opb-440epx", "ibm,opb";
#address-cells = <1>;
......
......@@ -15,7 +15,7 @@
/ {
model = "StorCenter";
compatible = "storcenter";
compatible = "iomega,storcenter";
#address-cells = <1>;
#size-cells = <1>;
......@@ -62,12 +62,12 @@ i2c@3000 {
#size-cells = <0>;
compatible = "fsl-i2c";
reg = <0x3000 0x100>;
interrupts = <5 2>;
interrupts = <17 2>;
interrupt-parent = <&mpic>;
rtc@68 {
compatible = "dallas,ds1337";
reg = <68>;
reg = <0x68>;
};
};
......@@ -78,7 +78,7 @@ serial0: serial@4500 {
reg = <0x4500 0x20>;
clock-frequency = <97553800>; /* Hz */
current-speed = <115200>;
interrupts = <9 2>;
interrupts = <25 2>;
interrupt-parent = <&mpic>;
};
......@@ -89,7 +89,7 @@ serial1: serial@4600 {
reg = <0x4600 0x20>;
clock-frequency = <97553800>; /* Hz */
current-speed = <9600>;
interrupts = <10 2>;
interrupts = <26 2>;
interrupt-parent = <&mpic>;
};
......@@ -136,6 +136,6 @@ pci0: pci@fe800000 {
};
chosen {
linux,stdout-path = "/soc/serial@4500";
linux,stdout-path = &serial0;
};
};
......@@ -158,6 +158,29 @@ miboot|uboot)
cuboot*)
binary=y
gzip=
case "$platform" in
*-mpc885ads|*-adder875*|*-ep88xc)
platformo=$object/cuboot-8xx.o
;;
*5200*|*-motionpro)
platformo=$object/cuboot-52xx.o
;;
*-pq2fads|*-ep8248e|*-mpc8272*|*-storcenter)
platformo=$object/cuboot-pq2.o
;;
*-mpc824*)
platformo=$object/cuboot-824x.o
;;
*-mpc83*)
platformo=$object/cuboot-83xx.o
;;
*-tqm8541|*-mpc8560*|*-tqm8560|*-tqm8555*)
platformo=$object/cuboot-85xx-cpm2.o
;;
*-mpc85*)
platformo=$object/cuboot-85xx.o
;;
esac
;;
ps3)
platformo="$object/ps3-head.o $object/ps3-hvcall.o $object/ps3.o"
......
......@@ -186,7 +186,7 @@ CONFIG_PREEMPT_NONE=y
# CONFIG_PREEMPT is not set
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
# CONFIG_MATH_EMULATION is not set
CONFIG_MATH_EMULATION=y
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
CONFIG_ARCH_FLATMEM_ENABLE=y
CONFIG_ARCH_POPULATES_NODE_MAP=y
......@@ -416,14 +416,14 @@ CONFIG_PHYLIB=y
# MII PHY device drivers
#
CONFIG_MARVELL_PHY=y
# CONFIG_DAVICOM_PHY is not set
CONFIG_DAVICOM_PHY=y
# CONFIG_QSEMI_PHY is not set
# CONFIG_LXT_PHY is not set
# CONFIG_CICADA_PHY is not set
# CONFIG_VITESSE_PHY is not set
CONFIG_VITESSE_PHY=y
# CONFIG_SMSC_PHY is not set
# CONFIG_BROADCOM_PHY is not set
# CONFIG_ICPLUS_PHY is not set
CONFIG_ICPLUS_PHY=y
# CONFIG_FIXED_PHY is not set
# CONFIG_MDIO_BITBANG is not set
CONFIG_NET_ETHERNET=y
......@@ -436,7 +436,7 @@ CONFIG_MII=y
CONFIG_NETDEV_1000=y
CONFIG_GIANFAR=y
# CONFIG_GFAR_NAPI is not set
# CONFIG_UCC_GETH is not set
CONFIG_UCC_GETH=y
CONFIG_NETDEV_10000=y
#
......
......@@ -2,6 +2,8 @@
# Makefile for the linux kernel.
#
CFLAGS_ptrace.o += -DUTS_MACHINE='"$(UTS_MACHINE)"'
ifeq ($(CONFIG_PPC64),y)
CFLAGS_prom_init.o += -mno-minimal-toc
endif
......@@ -15,7 +17,7 @@ obj-y := semaphore.o cputable.o ptrace.o syscalls.o \
init_task.o process.o systbl.o idle.o \
signal.o
obj-y += vdso32/
obj-$(CONFIG_PPC64) += setup_64.o binfmt_elf32.o sys_ppc32.o \
obj-$(CONFIG_PPC64) += setup_64.o sys_ppc32.o \
signal_64.o ptrace32.o \
paca.o cpu_setup_ppc970.o \
cpu_setup_pa6t.o \
......
......@@ -22,6 +22,7 @@
#include <linux/mman.h>
#include <linux/mm.h>
#include <linux/suspend.h>
#include <linux/hrtimer.h>
#ifdef CONFIG_PPC64
#include <linux/time.h>
#include <linux/hardirq.h>
......@@ -312,7 +313,7 @@ int main(void)
DEFINE(CLOCK_REALTIME, CLOCK_REALTIME);
DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC);
DEFINE(NSEC_PER_SEC, NSEC_PER_SEC);
DEFINE(CLOCK_REALTIME_RES, TICK_NSEC);
DEFINE(CLOCK_REALTIME_RES, (KTIME_MONOTONIC_RES).tv64);
#ifdef CONFIG_BUG
DEFINE(BUG_ENTRY_SIZE, sizeof(struct bug_entry));
......
/*
* binfmt_elf32.c: Support 32-bit PPC ELF binaries on Power3 and followons.
* based on the SPARC64 version.
* Copyright (C) 1995, 1996, 1997, 1998 David S. Miller (davem@redhat.com)
* Copyright (C) 1995, 1996, 1997, 1998 Jakub Jelinek (jj@ultra.linux.cz)
*
* Copyright (C) 2000,2001 Ken Aaker (kdaaker@rchland.vnet.ibm.com), IBM Corp
* Copyright (C) 2001 Anton Blanchard (anton@au.ibm.com), IBM
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <asm/processor.h>
#include <linux/module.h>
#include <linux/compat.h>
#include <linux/elfcore-compat.h>
#undef ELF_ARCH
#undef ELF_CLASS
#define ELF_CLASS ELFCLASS32
#define ELF_ARCH EM_PPC
#undef elfhdr
#undef elf_phdr
#undef elf_note
#undef elf_addr_t
#define elfhdr elf32_hdr
#define elf_phdr elf32_phdr
#define elf_note elf32_note
#define elf_addr_t Elf32_Off
#define elf_prstatus compat_elf_prstatus
#define elf_prpsinfo compat_elf_prpsinfo
#define elf_core_copy_regs compat_elf_core_copy_regs
static inline void compat_elf_core_copy_regs(compat_elf_gregset_t *elf_regs,
struct pt_regs *regs)
{
PPC_ELF_CORE_COPY_REGS((*elf_regs), regs);
}
#define elf_core_copy_task_regs compat_elf_core_copy_task_regs
static int compat_elf_core_copy_task_regs(struct task_struct *tsk,
compat_elf_gregset_t *elf_regs)
{
struct pt_regs *regs = tsk->thread.regs;
if (regs)
compat_elf_core_copy_regs(elf_regs, regs);
return 1;
}
#include <linux/time.h>
#undef cputime_to_timeval
#define cputime_to_timeval cputime_to_compat_timeval
static __inline__ void
cputime_to_compat_timeval(const cputime_t cputime, struct compat_timeval *value)
{
unsigned long jiffies = cputime_to_jiffies(cputime);
value->tv_usec = (jiffies % HZ) * (1000000L / HZ);
value->tv_sec = jiffies / HZ;
}
#define init_elf_binfmt init_elf32_binfmt
#include "../../../fs/binfmt_elf.c"
......@@ -959,6 +959,9 @@ static struct cpu_spec __initdata cpu_specs[] = {
.icache_bsize = 32,
.dcache_bsize = 32,
.cpu_setup = __setup_cpu_603,
.num_pmcs = 4,
.oprofile_cpu_type = "ppc/e300",
.oprofile_type = PPC_OPROFILE_FSL_EMB,
.platform = "ppc603",
},
{ /* e300c4 (e300c1, plus one IU) */
......@@ -971,6 +974,9 @@ static struct cpu_spec __initdata cpu_specs[] = {
.dcache_bsize = 32,
.cpu_setup = __setup_cpu_603,
.machine_check = machine_check_generic,
.num_pmcs = 4,
.oprofile_cpu_type = "ppc/e300",
.oprofile_type = PPC_OPROFILE_FSL_EMB,
.platform = "ppc603",
},
{ /* default match, we assume split I/D cache & TB (non-601)... */
......@@ -1435,7 +1441,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
.dcache_bsize = 32,
.num_pmcs = 4,
.oprofile_cpu_type = "ppc/e500",
.oprofile_type = PPC_OPROFILE_BOOKE,
.oprofile_type = PPC_OPROFILE_FSL_EMB,
.machine_check = machine_check_e500,
.platform = "ppc8540",
},
......@@ -1453,7 +1459,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
.dcache_bsize = 32,
.num_pmcs = 4,
.oprofile_cpu_type = "ppc/e500",
.oprofile_type = PPC_OPROFILE_BOOKE,
.oprofile_type = PPC_OPROFILE_FSL_EMB,
.machine_check = machine_check_e500,
.platform = "ppc8548",
},
......
......@@ -36,7 +36,8 @@ static struct legacy_serial_info {
static struct __initdata of_device_id parents[] = {
{.type = "soc",},
{.type = "tsi-bridge",},
{.type = "opb", .compatible = "ibm,opb",},
{.type = "opb", },
{.compatible = "ibm,opb",},
{.compatible = "simple-bus",},
{.compatible = "wrs,epld-localbus",},
};
......
......@@ -26,7 +26,7 @@
static void dummy_perf(struct pt_regs *regs)
{
#if defined(CONFIG_FSL_BOOKE) && !defined(CONFIG_E200)
#if defined(CONFIG_FSL_EMB_PERFMON)
mtpmr(PMRN_PMGC0, mfpmr(PMRN_PMGC0) & ~PMGC0_PMIE);
#elif defined(CONFIG_PPC64) || defined(CONFIG_6xx)
if (cur_cpu_spec->pmc_type == PPC_PMC_IBM)
......
This diff is collapsed.
......@@ -24,9 +24,11 @@
#include <linux/smp_lock.h>
#include <linux/errno.h>
#include <linux/ptrace.h>
#include <linux/regset.h>
#include <linux/user.h>
#include <linux/security.h>
#include <linux/signal.h>
#include <linux/compat.h>
#include <asm/uaccess.h>
#include <asm/page.h>
......@@ -45,87 +47,31 @@
static long compat_ptrace_old(struct task_struct *child, long request,
long addr, long data)
{
int ret = -EPERM;
switch(request) {
case PPC_PTRACE_GETREGS: { /* Get GPRs 0 - 31. */
int i;
unsigned long *reg = &((unsigned long *)child->thread.regs)[0];
unsigned int __user *tmp = (unsigned int __user *)addr;
CHECK_FULL_REGS(child->thread.regs);
for (i = 0; i < 32; i++) {
ret = put_user(*reg, tmp);
if (ret)
break;
reg++;
tmp++;
}
break;
}
case PPC_PTRACE_SETREGS: { /* Set GPRs 0 - 31. */
int i;
unsigned long *reg = &((unsigned long *)child->thread.regs)[0];
unsigned int __user *tmp = (unsigned int __user *)addr;
switch (request) {
case PPC_PTRACE_GETREGS: /* Get GPRs 0 - 31. */
return copy_regset_to_user(child,
task_user_regset_view(current), 0,
0, 32 * sizeof(compat_long_t),
compat_ptr(data));
CHECK_FULL_REGS(child->thread.regs);
for (i = 0; i < 32; i++) {
ret = get_user(*reg, tmp);
if (ret)
break;
reg++;
tmp++;
}
break;
case PPC_PTRACE_SETREGS: /* Set GPRs 0 - 31. */
return copy_regset_from_user(child,
task_user_regset_view(current), 0,
0, 32 * sizeof(compat_long_t),
compat_ptr(data));
}
}
return ret;
return -EPERM;
}
long compat_sys_ptrace(int request, int pid, unsigned long addr,
unsigned long data)
long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
compat_ulong_t caddr, compat_ulong_t cdata)
{
struct task_struct *child;
unsigned long addr = caddr;
unsigned long data = cdata;
int ret;
lock_kernel();
if (request == PTRACE_TRACEME) {
ret = ptrace_traceme();
goto out;
}
child = ptrace_get_task_struct(pid);
if (IS_ERR(child)) {
ret = PTR_ERR(child);
goto out;
}
if (request == PTRACE_ATTACH) {
ret = ptrace_attach(child);
goto out_tsk;
}
ret = ptrace_check_attach(child, request == PTRACE_KILL);
if (ret < 0)
goto out_tsk;
switch (request) {
/* when I and D space are separate, these will need to be fixed. */
case PTRACE_PEEKTEXT: /* read word at location addr. */
case PTRACE_PEEKDATA: {
unsigned int tmp;
int copied;
copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
ret = -EIO;
if (copied != sizeof(tmp))
break;
ret = put_user(tmp, (u32 __user *)data);
break;
}
/*
* Read 4 bytes of the other process' storage
* data is a pointer specifying where the user wants the
......@@ -225,19 +171,6 @@ long compat_sys_ptrace(int request, int pid, unsigned long addr,
break;
}
/* If I and D space are separate, this will have to be fixed. */
case PTRACE_POKETEXT: /* write the word at location addr. */
case PTRACE_POKEDATA: {
unsigned int tmp;
tmp = data;
ret = 0;
if (access_process_vm(child, addr, &tmp, sizeof(tmp), 1)
== sizeof(tmp))
break;
ret = -EIO;
break;
}
/*
* Write 4 bytes into the other process' storage
* data is the 4 bytes that the user wants written
......@@ -337,46 +270,17 @@ long compat_sys_ptrace(int request, int pid, unsigned long addr,
break;
}
case PTRACE_GETEVENTMSG:
ret = put_user(child->ptrace_message, (unsigned int __user *) data);
break;
case PTRACE_GETREGS: { /* Get all pt_regs from the child. */
int ui;
if (!access_ok(VERIFY_WRITE, (void __user *)data,
PT_REGS_COUNT * sizeof(int))) {
ret = -EIO;
break;
}
CHECK_FULL_REGS(child->thread.regs);
ret = 0;
for (ui = 0; ui < PT_REGS_COUNT; ui ++) {
ret |= __put_user(ptrace_get_reg(child, ui),
(unsigned int __user *) data);
data += sizeof(int);
}
break;
}
case PTRACE_GETREGS: /* Get all pt_regs from the child. */
return copy_regset_to_user(
child, task_user_regset_view(current), 0,
0, PT_REGS_COUNT * sizeof(compat_long_t),
compat_ptr(data));
case PTRACE_SETREGS: { /* Set all gp regs in the child. */
unsigned long tmp;
int ui;
if (!access_ok(VERIFY_READ, (void __user *)data,
PT_REGS_COUNT * sizeof(int))) {
ret = -EIO;
break;
}
CHECK_FULL_REGS(child->thread.regs);
ret = 0;
for (ui = 0; ui < PT_REGS_COUNT; ui ++) {
ret = __get_user(tmp, (unsigned int __user *) data);
if (ret)
break;
ptrace_put_reg(child, ui, tmp);
data += sizeof(int);
}
break;
}
case PTRACE_SETREGS: /* Set all gp regs in the child. */
return copy_regset_from_user(
child, task_user_regset_view(current), 0,
0, PT_REGS_COUNT * sizeof(compat_long_t),
compat_ptr(data));
case PTRACE_GETFPREGS:
case PTRACE_SETFPREGS:
......@@ -402,12 +306,9 @@ long compat_sys_ptrace(int request, int pid, unsigned long addr,
break;
default:
ret = ptrace_request(child, request, addr, data);
ret = compat_ptrace_request(child, request, addr, data);
break;
}
out_tsk:
put_task_struct(child);
out:
unlock_kernel();
return ret;
}
......@@ -54,7 +54,7 @@
#endif
#include <asm/kexec.h>
#ifdef CONFIG_DEBUGGER
#if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
int (*__debugger)(struct pt_regs *regs);
int (*__debugger_ipi)(struct pt_regs *regs);
int (*__debugger_bpt)(struct pt_regs *regs);
......
......@@ -176,7 +176,7 @@ static void __devinit vio_dev_release(struct device *dev)
* Returns a pointer to the created vio_dev or NULL if node has
* NULL device_type or compatible fields.
*/
struct vio_dev * __devinit vio_register_device_node(struct device_node *of_node)
struct vio_dev *vio_register_device_node(struct device_node *of_node)
{
struct vio_dev *viodev;
const unsigned int *unit_address;
......
......@@ -485,7 +485,12 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
*/
_tlbie(address, 0 /* 8xx doesn't care about PID */);
#endif
if (!PageReserved(page)
/* The _PAGE_USER test should really be _PAGE_EXEC, but
* older glibc versions execute some code from no-exec
* pages, which for now we are supporting. If exec-only
* pages are ever implemented, this will have to change.
*/
if (!PageReserved(page) && (pte_val(pte) & _PAGE_USER)
&& !test_bit(PG_arch_1, &page->flags)) {
if (vma->vm_mm == current->active_mm) {
__flush_dcache_icache((void *) address);
......
......@@ -24,6 +24,8 @@
static int numa_enabled = 1;
static char *cmdline __initdata;
static int numa_debug;
#define dbg(args...) if (numa_debug) { printk(KERN_INFO args); }
......@@ -39,6 +41,53 @@ static bootmem_data_t __initdata plat_node_bdata[MAX_NUMNODES];
static int min_common_depth;
static int n_mem_addr_cells, n_mem_size_cells;
static int __cpuinit fake_numa_create_new_node(unsigned long end_pfn,
unsigned int *nid)
{
unsigned long long mem;
char *p = cmdline;
static unsigned int fake_nid;
static unsigned long long curr_boundary;
/*
* Modify node id, iff we started creating NUMA nodes
* We want to continue from where we left of the last time
*/
if (fake_nid)
*nid = fake_nid;
/*
* In case there are no more arguments to parse, the
* node_id should be the same as the last fake node id
* (we've handled this above).
*/
if (!p)
return 0;
mem = memparse(p, &p);
if (!mem)
return 0;
if (mem < curr_boundary)
return 0;
curr_boundary = mem;
if ((end_pfn << PAGE_SHIFT) > mem) {
/*
* Skip commas and spaces
*/
while (*p == ',' || *p == ' ' || *p == '\t')
p++;
cmdline = p;
fake_nid++;
*nid = fake_nid;
dbg("created new fake_node with id %d\n", fake_nid);
return 1;
}
return 0;
}
static void __cpuinit map_cpu_to_node(int cpu, int node)
{
numa_cpu_lookup_table[cpu] = node;
......@@ -344,6 +393,9 @@ static void __init parse_drconf_memory(struct device_node *memory)
if (nid == 0xffff || nid >= MAX_NUMNODES)
nid = default_nid;
}
fake_numa_create_new_node(((start + lmb_size) >> PAGE_SHIFT),
&nid);
node_set_online(nid);
size = numa_enforce_memory_limit(start, lmb_size);
......@@ -429,6 +481,8 @@ static int __init parse_numa_properties(void)
nid = of_node_to_nid_single(memory);
if (nid < 0)
nid = default_nid;
fake_numa_create_new_node(((start + size) >> PAGE_SHIFT), &nid);
node_set_online(nid);
if (!(size = numa_enforce_memory_limit(start, size))) {
......@@ -461,7 +515,7 @@ static void __init setup_nonnuma(void)
unsigned long top_of_ram = lmb_end_of_DRAM();
unsigned long total_ram = lmb_phys_mem_size();
unsigned long start_pfn, end_pfn;
unsigned int i;
unsigned int i, nid = 0;
printk(KERN_DEBUG "Top of RAM: 0x%lx, Total RAM: 0x%lx\n",
top_of_ram, total_ram);
......@@ -471,9 +525,11 @@ static void __init setup_nonnuma(void)
for (i = 0; i < lmb.memory.cnt; ++i) {
start_pfn = lmb.memory.region[i].base >> PAGE_SHIFT;
end_pfn = start_pfn + lmb_size_pages(&lmb.memory, i);
add_active_range(0, start_pfn, end_pfn);
fake_numa_create_new_node(end_pfn, &nid);
add_active_range(nid, start_pfn, end_pfn);
node_set_online(nid);
}
node_set_online(0);
}
void __init dump_numa_cpu_topology(void)
......@@ -702,6 +758,10 @@ static int __init early_numa(char *p)
if (strstr(p, "debug"))
numa_debug = 1;
p = strstr(p, "fake=");
if (p)
cmdline = p + strlen("fake=");
return 0;
}
early_param("numa", early_numa);
......
......@@ -15,5 +15,5 @@ oprofile-$(CONFIG_OPROFILE_CELL) += op_model_cell.o \
cell/spu_profiler.o cell/vma_map.o \
cell/spu_task_sync.o
oprofile-$(CONFIG_PPC64) += op_model_rs64.o op_model_power4.o op_model_pa6t.o
oprofile-$(CONFIG_FSL_BOOKE) += op_model_fsl_booke.o
oprofile-$(CONFIG_FSL_EMB_PERFMON) += op_model_fsl_emb.o
oprofile-$(CONFIG_6xx) += op_model_7450.o
......@@ -202,9 +202,9 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
model = &op_model_7450;
break;
#endif
#ifdef CONFIG_FSL_BOOKE
case PPC_OPROFILE_BOOKE:
model = &op_model_fsl_booke;
#if defined(CONFIG_FSL_EMB_PERFMON)
case PPC_OPROFILE_FSL_EMB:
model = &op_model_fsl_emb;
break;
#endif
default:
......
/*
* arch/powerpc/oprofile/op_model_fsl_booke.c
*
* Freescale Book-E oprofile support, based on ppc64 oprofile support
* Freescale Embedded oprofile support, based on ppc64 oprofile support
* Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
*
* Copyright (c) 2004 Freescale Semiconductor, Inc
......@@ -22,7 +20,7 @@
#include <asm/system.h>
#include <asm/processor.h>
#include <asm/cputable.h>
#include <asm/reg_booke.h>
#include <asm/reg_fsl_emb.h>
#include <asm/page.h>
#include <asm/pmc.h>
#include <asm/oprofile_impl.h>
......@@ -244,7 +242,7 @@ static void dump_pmcs(void)
mfpmr(PMRN_PMLCA3), mfpmr(PMRN_PMLCB3));
}
static int fsl_booke_cpu_setup(struct op_counter_config *ctr)
static int fsl_emb_cpu_setup(struct op_counter_config *ctr)
{
int i;
......@@ -262,7 +260,7 @@ static int fsl_booke_cpu_setup(struct op_counter_config *ctr)
return 0;
}
static int fsl_booke_reg_setup(struct op_counter_config *ctr,
static int fsl_emb_reg_setup(struct op_counter_config *ctr,
struct op_system_config *sys,
int num_ctrs)
{
......@@ -281,7 +279,7 @@ static int fsl_booke_reg_setup(struct op_counter_config *ctr,
return 0;
}
static int fsl_booke_start(struct op_counter_config *ctr)
static int fsl_emb_start(struct op_counter_config *ctr)
{
int i;
......@@ -315,7 +313,7 @@ static int fsl_booke_start(struct op_counter_config *ctr)
return 0;
}
static void fsl_booke_stop(void)
static void fsl_emb_stop(void)
{
/* freeze counters */
pmc_stop_ctrs();
......@@ -329,7 +327,7 @@ static void fsl_booke_stop(void)
}
static void fsl_booke_handle_interrupt(struct pt_regs *regs,
static void fsl_emb_handle_interrupt(struct pt_regs *regs,
struct op_counter_config *ctr)
{
unsigned long pc;
......@@ -362,10 +360,10 @@ static void fsl_booke_handle_interrupt(struct pt_regs *regs,
pmc_start_ctrs(1);
}
struct op_powerpc_model op_model_fsl_booke = {
.reg_setup = fsl_booke_reg_setup,
.cpu_setup = fsl_booke_cpu_setup,
.start = fsl_booke_start,
.stop = fsl_booke_stop,
.handle_interrupt = fsl_booke_handle_interrupt,
struct op_powerpc_model op_model_fsl_emb = {
.reg_setup = fsl_emb_reg_setup,
.cpu_setup = fsl_emb_cpu_setup,
.start = fsl_emb_start,
.stop = fsl_emb_stop,
.handle_interrupt = fsl_emb_handle_interrupt,
};
......@@ -72,6 +72,7 @@ config WALNUT
default y
select 405GP
select PCI
select OF_RTC
help
This option enables support for the IBM PPC405GP evaluation board.
......
......@@ -37,7 +37,7 @@ static int __init virtex_probe(void)
{
unsigned long root = of_get_flat_dt_root();
if (!of_flat_dt_is_compatible(root, "xilinx,virtex"))
if (!of_flat_dt_is_compatible(root, "xlnx,virtex"))
return 0;
return 1;
......
......@@ -18,6 +18,7 @@
#include <linux/init.h>
#include <linux/of_platform.h>
#include <linux/rtc.h>
#include <asm/machdep.h>
#include <asm/prom.h>
......
......@@ -137,7 +137,7 @@ static int __init pika_dtm_start(void)
}
of_node_put(np);
fpga = ioremap(res.start + 0x20, 4);
fpga = ioremap(res.start, 0x24);
if (fpga == NULL)
return -ENOENT;
......
config PPC_MPC512x
bool
select FSL_SOC
select IPIC
default n
config PPC_MPC5121
bool
select PPC_MPC512x
default n
config MPC5121_ADS
bool "Freescale MPC5121E ADS"
depends on PPC_MULTIPLATFORM && PPC32
select DEFAULT_UIMAGE
select WANT_DEVICE_TREE
select PPC_MPC5121
help
This option enables support for the MPC5121E ADS board.
default n
#
# Makefile for the Freescale PowerPC 512x linux kernel.
#
obj-$(CONFIG_MPC5121_ADS) += mpc5121_ads.o
/*
* Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
*
* Author: John Rigby, <jrigby@freescale.com>, Thur Mar 29 2007
*
* Description:
* MPC5121 ADS board setup
*
* This is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*/
#include <linux/kernel.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/of_platform.h>
#include <asm/machdep.h>
#include <asm/ipic.h>
#include <asm/prom.h>
#include <asm/time.h>
/**
* mpc512x_find_ips_freq - Find the IPS bus frequency for a device
* @node: device node
*
* Returns IPS bus frequency, or 0 if the bus frequency cannot be found.
*/
unsigned long
mpc512x_find_ips_freq(struct device_node *node)
{
struct device_node *np;
const unsigned int *p_ips_freq = NULL;
of_node_get(node);
while (node) {
p_ips_freq = of_get_property(node, "bus-frequency", NULL);
if (p_ips_freq)
break;
np = of_get_parent(node);
of_node_put(node);
node = np;
}
if (node)
of_node_put(node);
return p_ips_freq ? *p_ips_freq : 0;
}
EXPORT_SYMBOL(mpc512x_find_ips_freq);
static struct of_device_id __initdata of_bus_ids[] = {
{ .name = "soc", },
{ .name = "localbus", },
{},
};
static void __init mpc5121_ads_declare_of_platform_devices(void)
{
/* Find every child of the SOC node and add it to of_platform */
if (of_platform_bus_probe(NULL, of_bus_ids, NULL))
printk(KERN_ERR __FILE__ ": "
"Error while probing of_platform bus\n");
}
static void __init mpc5121_ads_init_IRQ(void)
{
struct device_node *np;
np = of_find_compatible_node(NULL, NULL, "fsl,ipic");
if (!np)
return;
ipic_init(np, 0);
of_node_put(np);
/*
* Initialize the default interrupt mapping priorities,
* in case the boot rom changed something on us.
*/
ipic_set_default_priority();
}
/*
* Called very early, MMU is off, device-tree isn't unflattened
*/
static int __init mpc5121_ads_probe(void)
{
unsigned long root = of_get_flat_dt_root();
return of_flat_dt_is_compatible(root, "fsl,mpc5121ads");
}
define_machine(mpc5121_ads) {
.name = "MPC5121 ADS",
.probe = mpc5121_ads_probe,
.init = mpc5121_ads_declare_of_platform_devices,
.init_IRQ = mpc5121_ads_init_IRQ,
.get_irq = ipic_get_irq,
.calibrate_decr = generic_calibrate_decr,
};
......@@ -134,13 +134,12 @@ static void __init mpc8272_ads_setup_arch(void)
}
bcsr = of_iomap(np, 0);
of_node_put(np);
if (!bcsr) {
printk(KERN_ERR "Cannot map BCSR registers\n");
return;
}
of_node_put(np);
clrbits32(&bcsr[1], BCSR1_RS232_EN1 | BCSR1_RS232_EN2 | BCSR1_FETHIEN);
setbits32(&bcsr[1], BCSR1_FETH_RST);
......
......@@ -130,13 +130,12 @@ static void __init pq2fads_setup_arch(void)
}
bcsr = of_iomap(np, 0);
of_node_put(np);
if (!bcsr) {
printk(KERN_ERR "Cannot map BCSR registers\n");
return;
}
of_node_put(np);
/* Enable the serial and ethernet ports */
clrbits32(&bcsr[1], BCSR1_RS232_EN1 | BCSR1_RS232_EN2 | BCSR1_FETHIEN);
......
......@@ -101,7 +101,7 @@ static void __init mpc832x_rdb_setup_arch(void)
#ifdef CONFIG_QUICC_ENGINE
qe_reset();
if ((np = of_find_node_by_name(np, "par_io")) != NULL) {
if ((np = of_find_node_by_name(NULL, "par_io")) != NULL) {
par_io_init(np);
of_node_put(np);
......
......@@ -14,6 +14,8 @@
#define MPC83XX_SCCR_USB_DRCM_11 0x00300000
#define MPC83XX_SCCR_USB_DRCM_01 0x00100000
#define MPC83XX_SCCR_USB_DRCM_10 0x00200000
#define MPC8315_SCCR_USB_MASK 0x00c00000
#define MPC8315_SCCR_USB_DRCM_11 0x00c00000
#define MPC837X_SCCR_USB_DRCM_11 0x00c00000
/* system i/o configuration register low */
......
......@@ -104,6 +104,7 @@ int mpc831x_usb_cfg(void)
u32 temp;
void __iomem *immap, *usb_regs;
struct device_node *np = NULL;
struct device_node *immr_node = NULL;
const void *prop;
struct resource res;
int ret = 0;
......@@ -124,10 +125,15 @@ int mpc831x_usb_cfg(void)
}
/* Configure clock */
temp = in_be32(immap + MPC83XX_SCCR_OFFS);
temp &= ~MPC83XX_SCCR_USB_MASK;
temp |= MPC83XX_SCCR_USB_DRCM_11; /* 1:3 */
out_be32(immap + MPC83XX_SCCR_OFFS, temp);
immr_node = of_get_parent(np);
if (immr_node && of_device_is_compatible(immr_node, "fsl,mpc8315-immr"))
clrsetbits_be32(immap + MPC83XX_SCCR_OFFS,
MPC8315_SCCR_USB_MASK,
MPC8315_SCCR_USB_DRCM_11);
else
clrsetbits_be32(immap + MPC83XX_SCCR_OFFS,
MPC83XX_SCCR_USB_MASK,
MPC83XX_SCCR_USB_DRCM_11);
/* Configure pin mux for ULPI. There is no pin mux for UTMI */
if (prop && !strcmp(prop, "ulpi")) {
......@@ -144,6 +150,9 @@ int mpc831x_usb_cfg(void)
iounmap(immap);
if (immr_node)
of_node_put(immr_node);
/* Map USB SOC space */
ret = of_address_to_resource(np, 0, &res);
if (ret) {
......
......@@ -15,12 +15,12 @@
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/commproc.h>
#include <asm/cpm1.h>
#include <asm/fs_pd.h>
#include <asm/udbg.h>
#include <asm/prom.h>
#include <sysdev/commproc.h>
#include "mpc8xx.h"
struct cpm_pin {
int port, pin, flags;
......@@ -108,7 +108,7 @@ define_machine(adder875) {
.name = "Adder MPC875",
.probe = adder875_probe,
.setup_arch = adder875_setup,
.init_IRQ = m8xx_pic_init,
.init_IRQ = mpc8xx_pics_init,
.get_irq = mpc8xx_get_irq,
.restart = mpc8xx_restart,
.calibrate_decr = generic_calibrate_decr,
......
......@@ -15,7 +15,6 @@
#include <asm/machdep.h>
#include <asm/io.h>
#include <asm/udbg.h>
#include <asm/commproc.h>
#include <asm/cpm1.h>
#include "mpc8xx.h"
......
......@@ -24,6 +24,7 @@ config PPC_83xx
select MPC83xx
select IPIC
select WANT_DEVICE_TREE
select FSL_EMB_PERFMON
config PPC_86xx
bool "Freescale 86xx"
......@@ -41,6 +42,7 @@ config CLASSIC32
source "arch/powerpc/platforms/pseries/Kconfig"
source "arch/powerpc/platforms/iseries/Kconfig"
source "arch/powerpc/platforms/chrp/Kconfig"
source "arch/powerpc/platforms/512x/Kconfig"
source "arch/powerpc/platforms/52xx/Kconfig"
source "arch/powerpc/platforms/powermac/Kconfig"
source "arch/powerpc/platforms/prep/Kconfig"
......
......@@ -14,7 +14,7 @@ choice
There are five families of 32 bit PowerPC chips supported.
The most common ones are the desktop and server CPUs (601, 603,
604, 740, 750, 74xx) CPUs from Freescale and IBM, with their
embedded 52xx/82xx/83xx/86xx counterparts.
embedded 512x/52xx/82xx/83xx/86xx counterparts.
The other embeeded parts, namely 4xx, 8xx, e200 (55xx) and e500
(85xx) each form a family of their own that is not compatible
with the others.
......@@ -22,7 +22,7 @@ choice
If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx.
config 6xx
bool "52xx/6xx/7xx/74xx/82xx/83xx/86xx"
bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx"
select PPC_FPU
config PPC_85xx
......@@ -94,6 +94,7 @@ config 8xx
bool
config E500
select FSL_EMB_PERFMON
bool
config PPC_FPU
......@@ -115,6 +116,9 @@ config FSL_BOOKE
depends on E200 || E500
default y
config FSL_EMB_PERFMON
bool
config PTE_64BIT
bool
depends on 44x || E500
......@@ -221,7 +225,7 @@ config NR_CPUS
config NOT_COHERENT_CACHE
bool
depends on 4xx || 8xx || E200
depends on 4xx || 8xx || E200 || PPC_MPC512x
default y
config CHECK_CACHE_COHERENCY
......
......@@ -11,6 +11,7 @@ endif
obj-$(CONFIG_PPC_CHRP) += chrp/
obj-$(CONFIG_40x) += 40x/
obj-$(CONFIG_44x) += 44x/
obj-$(CONFIG_PPC_MPC512x) += 512x/
obj-$(CONFIG_PPC_MPC52xx) += 52xx/
obj-$(CONFIG_PPC_8xx) += 8xx/
obj-$(CONFIG_PPC_82xx) += 82xx/
......
......@@ -54,6 +54,13 @@ config SPU_FS_64K_LS
uses 4K pages. This can improve performances of applications
using multiple SPEs by lowering the TLB pressure on them.
config SPU_TRACE
tristate "SPU event tracing support"
depends on SPU_FS && MARKERS
help
This option allows reading a trace of spu-related events through
the sputrace file in procfs.
config SPU_BASE
bool
default n
......
......@@ -13,7 +13,7 @@
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/msi.h>
#include <linux/reboot.h>
#include <linux/of_platform.h>
#include <asm/dcr.h>
#include <asm/machdep.h>
......@@ -65,14 +65,12 @@
struct axon_msic {
struct irq_host *irq_host;
__le32 *fifo;
__le32 *fifo_virt;
dma_addr_t fifo_phys;
dcr_host_t dcr_host;
struct list_head list;
u32 read_offset;
};
static LIST_HEAD(axon_msic_list);
static void msic_dcr_write(struct axon_msic *msic, unsigned int dcr_n, u32 val)
{
pr_debug("axon_msi: dcr_write(0x%x, 0x%x)\n", val, dcr_n);
......@@ -94,7 +92,7 @@ static void axon_msi_cascade(unsigned int irq, struct irq_desc *desc)
while (msic->read_offset != write_offset) {
idx = msic->read_offset / sizeof(__le32);
msi = le32_to_cpu(msic->fifo[idx]);
msi = le32_to_cpu(msic->fifo_virt[idx]);
msi &= 0xFFFF;
pr_debug("axon_msi: woff %x roff %x msi %x\n",
......@@ -139,6 +137,7 @@ static struct axon_msic *find_msi_translator(struct pci_dev *dev)
tmp = dn;
dn = of_find_node_by_phandle(*ph);
of_node_put(tmp);
if (!dn) {
dev_dbg(&dev->dev,
"axon_msi: msi-translator doesn't point to a node\n");
......@@ -156,7 +155,6 @@ static struct axon_msic *find_msi_translator(struct pci_dev *dev)
out_error:
of_node_put(dn);
of_node_put(tmp);
return msic;
}
......@@ -292,30 +290,24 @@ static struct irq_host_ops msic_host_ops = {
.map = msic_host_map,
};
static int axon_msi_notify_reboot(struct notifier_block *nb,
unsigned long code, void *data)
static int axon_msi_shutdown(struct of_device *device)
{
struct axon_msic *msic;
struct axon_msic *msic = device->dev.platform_data;
u32 tmp;
list_for_each_entry(msic, &axon_msic_list, list) {
pr_debug("axon_msi: disabling %s\n",
msic->irq_host->of_node->full_name);
tmp = dcr_read(msic->dcr_host, MSIC_CTRL_REG);
tmp &= ~MSIC_CTRL_ENABLE & ~MSIC_CTRL_IRQ_ENABLE;
msic_dcr_write(msic, MSIC_CTRL_REG, tmp);
}
return 0;
}
static struct notifier_block axon_msi_reboot_notifier = {
.notifier_call = axon_msi_notify_reboot
};
static int axon_msi_setup_one(struct device_node *dn)
static int axon_msi_probe(struct of_device *device,
const struct of_device_id *device_id)
{
struct page *page;
struct device_node *dn = device->node;
struct axon_msic *msic;
unsigned int virq;
int dcr_base, dcr_len;
......@@ -346,16 +338,14 @@ static int axon_msi_setup_one(struct device_node *dn)
goto out_free_msic;
}
page = alloc_pages_node(of_node_to_nid(dn), GFP_KERNEL,
get_order(MSIC_FIFO_SIZE_BYTES));
if (!page) {
msic->fifo_virt = dma_alloc_coherent(&device->dev, MSIC_FIFO_SIZE_BYTES,
&msic->fifo_phys, GFP_KERNEL);
if (!msic->fifo_virt) {
printk(KERN_ERR "axon_msi: couldn't allocate fifo for %s\n",
dn->full_name);
goto out_free_msic;
}
msic->fifo = page_address(page);
msic->irq_host = irq_alloc_host(of_node_get(dn), IRQ_HOST_MAP_NOMAP,
NR_IRQS, &msic_host_ops, 0);
if (!msic->irq_host) {
......@@ -378,14 +368,18 @@ static int axon_msi_setup_one(struct device_node *dn)
pr_debug("axon_msi: irq 0x%x setup for axon_msi\n", virq);
/* Enable the MSIC hardware */
msic_dcr_write(msic, MSIC_BASE_ADDR_HI_REG, (u64)msic->fifo >> 32);
msic_dcr_write(msic, MSIC_BASE_ADDR_HI_REG, msic->fifo_phys >> 32);
msic_dcr_write(msic, MSIC_BASE_ADDR_LO_REG,
(u64)msic->fifo & 0xFFFFFFFF);
msic->fifo_phys & 0xFFFFFFFF);
msic_dcr_write(msic, MSIC_CTRL_REG,
MSIC_CTRL_IRQ_ENABLE | MSIC_CTRL_ENABLE |
MSIC_CTRL_FIFO_SIZE);
list_add(&msic->list, &axon_msic_list);
device->dev.platform_data = msic;
ppc_md.setup_msi_irqs = axon_msi_setup_msi_irqs;
ppc_md.teardown_msi_irqs = axon_msi_teardown_msi_irqs;
ppc_md.msi_check_device = axon_msi_check_device;
printk(KERN_DEBUG "axon_msi: setup MSIC on %s\n", dn->full_name);
......@@ -394,7 +388,8 @@ static int axon_msi_setup_one(struct device_node *dn)
out_free_host:
kfree(msic->irq_host);
out_free_fifo:
__free_pages(virt_to_page(msic->fifo), get_order(MSIC_FIFO_SIZE_BYTES));
dma_free_coherent(&device->dev, MSIC_FIFO_SIZE_BYTES, msic->fifo_virt,
msic->fifo_phys);
out_free_msic:
kfree(msic);
out:
......@@ -402,28 +397,24 @@ static int axon_msi_setup_one(struct device_node *dn)
return -1;
}
static int axon_msi_init(void)
{
struct device_node *dn;
int found = 0;
pr_debug("axon_msi: initialising ...\n");
for_each_compatible_node(dn, NULL, "ibm,axon-msic") {
if (axon_msi_setup_one(dn) == 0)
found++;
}
if (found) {
ppc_md.setup_msi_irqs = axon_msi_setup_msi_irqs;
ppc_md.teardown_msi_irqs = axon_msi_teardown_msi_irqs;
ppc_md.msi_check_device = axon_msi_check_device;
register_reboot_notifier(&axon_msi_reboot_notifier);
static const struct of_device_id axon_msi_device_id[] = {
{
.compatible = "ibm,axon-msic"
},
{}
};
pr_debug("axon_msi: registered callbacks!\n");
}
static struct of_platform_driver axon_msi_driver = {
.match_table = axon_msi_device_id,
.probe = axon_msi_probe,
.shutdown = axon_msi_shutdown,
.driver = {
.name = "axon-msi"
},
};
return 0;
static int __init axon_msi_init(void)
{
return of_register_platform_driver(&axon_msi_driver);
}
arch_initcall(axon_msi_init);
subsys_initcall(axon_msi_init);
......@@ -98,7 +98,7 @@ static int __init cell_publish_devices(void)
}
return 0;
}
machine_device_initcall(cell, cell_publish_devices);
machine_subsys_initcall(cell, cell_publish_devices);
static void cell_mpic_cascade(unsigned int irq, struct irq_desc *desc)
{
......
......@@ -4,6 +4,8 @@ spufs-y += inode.o file.o context.o syscalls.o coredump.o
spufs-y += sched.o backing_ops.o hw_ops.o run.o gang.o
spufs-y += switch.o fault.o lscsa_alloc.o
obj-$(CONFIG_SPU_TRACE) += sputrace.o
# Rules to build switch.o with the help of SPU tool chain
SPU_CROSS := spu-
SPU_CC := $(SPU_CROSS)gcc
......
......@@ -29,6 +29,7 @@
#include <linux/poll.h>
#include <linux/ptrace.h>
#include <linux/seq_file.h>
#include <linux/marker.h>
#include <asm/io.h>
#include <asm/semaphore.h>
......@@ -358,6 +359,8 @@ static unsigned long spufs_ps_nopfn(struct vm_area_struct *vma,
struct spu_context *ctx = vma->vm_file->private_data;
unsigned long area, offset = address - vma->vm_start;
spu_context_nospu_trace(spufs_ps_nopfn__enter, ctx);
offset += vma->vm_pgoff << PAGE_SHIFT;
if (offset >= ps_size)
return NOPFN_SIGBUS;
......@@ -375,11 +378,14 @@ static unsigned long spufs_ps_nopfn(struct vm_area_struct *vma,
if (ctx->state == SPU_STATE_SAVED) {
up_read(&current->mm->mmap_sem);
spu_context_nospu_trace(spufs_ps_nopfn__sleep, ctx);
spufs_wait(ctx->run_wq, ctx->state == SPU_STATE_RUNNABLE);
spu_context_trace(spufs_ps_nopfn__wake, ctx, ctx->spu);
down_read(&current->mm->mmap_sem);
} else {
area = ctx->spu->problem_phys + ps_offs;
vm_insert_pfn(vma, address, (area + offset) >> PAGE_SHIFT);
spu_context_trace(spufs_ps_nopfn__insert, ctx, ctx->spu);
}
spu_release(ctx);
......
......@@ -322,7 +322,7 @@ static struct spu_context *
spufs_assert_affinity(unsigned int flags, struct spu_gang *gang,
struct file *filp)
{
struct spu_context *tmp, *neighbor;
struct spu_context *tmp, *neighbor, *err;
int count, node;
int aff_supp;
......@@ -354,11 +354,15 @@ spufs_assert_affinity(unsigned int flags, struct spu_gang *gang,
if (!list_empty(&neighbor->aff_list) && !(neighbor->aff_head) &&
!list_is_last(&neighbor->aff_list, &gang->aff_list_head) &&
!list_entry(neighbor->aff_list.next, struct spu_context,
aff_list)->aff_head)
return ERR_PTR(-EEXIST);
aff_list)->aff_head) {
err = ERR_PTR(-EEXIST);
goto out_put_neighbor;
}
if (gang != neighbor->gang)
return ERR_PTR(-EINVAL);
if (gang != neighbor->gang) {
err = ERR_PTR(-EINVAL);
goto out_put_neighbor;
}
count = 1;
list_for_each_entry(tmp, &gang->aff_list_head, aff_list)
......@@ -372,11 +376,17 @@ spufs_assert_affinity(unsigned int flags, struct spu_gang *gang,
break;
}
if (node == MAX_NUMNODES)
return ERR_PTR(-EEXIST);
if (node == MAX_NUMNODES) {
err = ERR_PTR(-EEXIST);
goto out_put_neighbor;
}
}
return neighbor;
out_put_neighbor:
put_spu_context(neighbor);
return err;
}
static void
......@@ -454,9 +464,12 @@ spufs_create_context(struct inode *inode, struct dentry *dentry,
if (ret)
goto out_aff_unlock;
if (affinity)
if (affinity) {
spufs_set_affinity(flags, SPUFS_I(dentry->d_inode)->i_ctx,
neighbor);
if (neighbor)
put_spu_context(neighbor);
}
/*
* get references for dget and mntget, will be released
......
......@@ -410,8 +410,11 @@ long spufs_run_spu(struct spu_context *ctx, u32 *npc, u32 *event)
* since we have TIF_SINGLESTEP set, thus the kernel will do
* it upon return from the syscall anyawy
*/
if ((status & SPU_STATUS_STOPPED_BY_STOP)
&& (status >> SPU_STOP_STATUS_SHIFT) == 0x3fff) {
if (unlikely(status & SPU_STATUS_SINGLE_STEP))
ret = -ERESTARTSYS;
else if (unlikely((status & SPU_STATUS_STOPPED_BY_STOP)
&& (status >> SPU_STOP_STATUS_SHIFT) == 0x3fff)) {
force_sig(SIGTRAP, current);
ret = -ERESTARTSYS;
}
......
......@@ -39,6 +39,7 @@
#include <linux/pid_namespace.h>
#include <linux/proc_fs.h>
#include <linux/seq_file.h>
#include <linux/marker.h>
#include <asm/io.h>
#include <asm/mmu_context.h>
......@@ -216,8 +217,8 @@ void do_notify_spus_active(void)
*/
static void spu_bind_context(struct spu *spu, struct spu_context *ctx)
{
pr_debug("%s: pid=%d SPU=%d NODE=%d\n", __FUNCTION__, current->pid,
spu->number, spu->node);
spu_context_trace(spu_bind_context__enter, ctx, spu);
spuctx_switch_state(ctx, SPU_UTIL_SYSTEM);
if (ctx->flags & SPU_CREATE_NOSCHED)
......@@ -399,8 +400,8 @@ static int has_affinity(struct spu_context *ctx)
*/
static void spu_unbind_context(struct spu *spu, struct spu_context *ctx)
{
pr_debug("%s: unbind pid=%d SPU=%d NODE=%d\n", __FUNCTION__,
spu->pid, spu->number, spu->node);
spu_context_trace(spu_unbind_context__enter, ctx, spu);
spuctx_switch_state(ctx, SPU_UTIL_SYSTEM);
if (spu->ctx->flags & SPU_CREATE_NOSCHED)
......@@ -528,6 +529,8 @@ static struct spu *spu_get_idle(struct spu_context *ctx)
struct spu *spu, *aff_ref_spu;
int node, n;
spu_context_nospu_trace(spu_get_idle__enter, ctx);
if (ctx->gang) {
mutex_lock(&ctx->gang->aff_mutex);
if (has_affinity(ctx)) {
......@@ -546,8 +549,7 @@ static struct spu *spu_get_idle(struct spu_context *ctx)
if (atomic_dec_and_test(&ctx->gang->aff_sched_count))
ctx->gang->aff_ref_spu = NULL;
mutex_unlock(&ctx->gang->aff_mutex);
return NULL;
goto not_found;
}
mutex_unlock(&ctx->gang->aff_mutex);
}
......@@ -565,12 +567,14 @@ static struct spu *spu_get_idle(struct spu_context *ctx)
mutex_unlock(&cbe_spu_info[node].list_mutex);
}
not_found:
spu_context_nospu_trace(spu_get_idle__not_found, ctx);
return NULL;
found:
spu->alloc_state = SPU_USED;
mutex_unlock(&cbe_spu_info[node].list_mutex);
pr_debug("Got SPU %d %d\n", spu->number, spu->node);
spu_context_trace(spu_get_idle__found, ctx, spu);
spu_init_channels(spu);
return spu;
}
......@@ -587,6 +591,8 @@ static struct spu *find_victim(struct spu_context *ctx)
struct spu *spu;
int node, n;
spu_context_nospu_trace(spu_find_vitim__enter, ctx);
/*
* Look for a possible preemption candidate on the local node first.
* If there is no candidate look at the other nodes. This isn't
......@@ -640,6 +646,8 @@ static struct spu *find_victim(struct spu_context *ctx)
goto restart;
}
spu_context_trace(__spu_deactivate__unload, ctx, spu);
mutex_lock(&cbe_spu_info[node].list_mutex);
cbe_spu_info[node].nr_active--;
spu_unbind_context(spu, victim);
......@@ -822,6 +830,7 @@ static int __spu_deactivate(struct spu_context *ctx, int force, int max_prio)
*/
void spu_deactivate(struct spu_context *ctx)
{
spu_context_nospu_trace(spu_deactivate__enter, ctx);
__spu_deactivate(ctx, 1, MAX_PRIO);
}
......@@ -835,6 +844,7 @@ void spu_deactivate(struct spu_context *ctx)
*/
void spu_yield(struct spu_context *ctx)
{
spu_context_nospu_trace(spu_yield__enter, ctx);
if (!(ctx->flags & SPU_CREATE_NOSCHED)) {
mutex_lock(&ctx->state_mutex);
__spu_deactivate(ctx, 0, MAX_PRIO);
......@@ -864,11 +874,15 @@ static noinline void spusched_tick(struct spu_context *ctx)
goto out;
spu = ctx->spu;
spu_context_trace(spusched_tick__preempt, ctx, spu);
new = grab_runnable_context(ctx->prio + 1, spu->node);
if (new) {
spu_unschedule(spu, ctx);
spu_add_to_rq(ctx);
} else {
spu_context_nospu_trace(spusched_tick__newslice, ctx);
ctx->time_slice++;
}
out:
......
......@@ -325,4 +325,9 @@ extern void spu_free_lscsa(struct spu_state *csa);
extern void spuctx_switch_state(struct spu_context *ctx,
enum spu_utilization_state new_state);
#define spu_context_trace(name, ctx, spu) \
trace_mark(name, "%p %p", ctx, spu);
#define spu_context_nospu_trace(name, ctx) \
trace_mark(name, "%p", ctx);
#endif
/*
* Copyright (C) 2007 IBM Deutschland Entwicklung GmbH
* Released under GPL v2.
*
* Partially based on net/ipv4/tcp_probe.c.
*
* Simple tracing facility for spu contexts.
*/
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/marker.h>
#include <linux/proc_fs.h>
#include <linux/wait.h>
#include <asm/atomic.h>
#include <asm/uaccess.h>
#include "spufs.h"
struct spu_probe {
const char *name;
const char *format;
marker_probe_func *probe_func;
};
struct sputrace {
ktime_t tstamp;
int owner_tid; /* owner */
int curr_tid;
const char *name;
int number;
};
static int bufsize __read_mostly = 16384;
MODULE_PARM_DESC(bufsize, "Log buffer size (number of records)");
module_param(bufsize, int, 0);
static DEFINE_SPINLOCK(sputrace_lock);
static DECLARE_WAIT_QUEUE_HEAD(sputrace_wait);
static ktime_t sputrace_start;
static unsigned long sputrace_head, sputrace_tail;
static struct sputrace *sputrace_log;
static int sputrace_used(void)
{
return (sputrace_head - sputrace_tail) % bufsize;
}
static inline int sputrace_avail(void)
{
return bufsize - sputrace_used();
}
static int sputrace_sprint(char *tbuf, int n)
{
const struct sputrace *t = sputrace_log + sputrace_tail % bufsize;
struct timespec tv =
ktime_to_timespec(ktime_sub(t->tstamp, sputrace_start));
return snprintf(tbuf, n,
"[%lu.%09lu] %d: %s (thread = %d, spu = %d)\n",
(unsigned long) tv.tv_sec,
(unsigned long) tv.tv_nsec,
t->owner_tid,
t->name,
t->curr_tid,
t->number);
}
static ssize_t sputrace_read(struct file *file, char __user *buf,
size_t len, loff_t *ppos)
{
int error = 0, cnt = 0;
if (!buf || len < 0)
return -EINVAL;
while (cnt < len) {
char tbuf[128];
int width;
error = wait_event_interruptible(sputrace_wait,
sputrace_used() > 0);
if (error)
break;
spin_lock(&sputrace_lock);
if (sputrace_head == sputrace_tail) {
spin_unlock(&sputrace_lock);
continue;
}
width = sputrace_sprint(tbuf, sizeof(tbuf));
if (width < len)
sputrace_tail = (sputrace_tail + 1) % bufsize;
spin_unlock(&sputrace_lock);
if (width >= len)
break;
error = copy_to_user(buf + cnt, tbuf, width);
if (error)
break;
cnt += width;
}
return cnt == 0 ? error : cnt;
}
static int sputrace_open(struct inode *inode, struct file *file)
{
spin_lock(&sputrace_lock);
sputrace_head = sputrace_tail = 0;
sputrace_start = ktime_get();
spin_unlock(&sputrace_lock);
return 0;
}
static const struct file_operations sputrace_fops = {
.owner = THIS_MODULE,
.open = sputrace_open,
.read = sputrace_read,
};
static void sputrace_log_item(const char *name, struct spu_context *ctx,
struct spu *spu)
{
spin_lock(&sputrace_lock);
if (sputrace_avail() > 1) {
struct sputrace *t = sputrace_log + sputrace_head;
t->tstamp = ktime_get();
t->owner_tid = ctx->tid;
t->name = name;
t->curr_tid = current->pid;
t->number = spu ? spu->number : -1;
sputrace_head = (sputrace_head + 1) % bufsize;
} else {
printk(KERN_WARNING
"sputrace: lost samples due to full buffer.\n");
}
spin_unlock(&sputrace_lock);
wake_up(&sputrace_wait);
}
static void spu_context_event(const struct marker *mdata,
void *private, const char *format, ...)
{
struct spu_probe *p = mdata->private;
va_list ap;
struct spu_context *ctx;
struct spu *spu;
va_start(ap, format);
ctx = va_arg(ap, struct spu_context *);
spu = va_arg(ap, struct spu *);
sputrace_log_item(p->name, ctx, spu);
va_end(ap);
}
static void spu_context_nospu_event(const struct marker *mdata,
void *private, const char *format, ...)
{
struct spu_probe *p = mdata->private;
va_list ap;
struct spu_context *ctx;
va_start(ap, format);
ctx = va_arg(ap, struct spu_context *);
sputrace_log_item(p->name, ctx, NULL);
va_end(ap);
}
struct spu_probe spu_probes[] = {
{ "spu_bind_context__enter", "%p %p", spu_context_event },
{ "spu_unbind_context__enter", "%p %p", spu_context_event },
{ "spu_get_idle__enter", "%p", spu_context_nospu_event },
{ "spu_get_idle__found", "%p %p", spu_context_event },
{ "spu_get_idle__not_found", "%p", spu_context_nospu_event },
{ "spu_find_victim__enter", "%p", spu_context_nospu_event },
{ "spusched_tick__preempt", "%p %p", spu_context_event },
{ "spusched_tick__newslice", "%p", spu_context_nospu_event },
{ "spu_yield__enter", "%p", spu_context_nospu_event },
{ "spu_deactivate__enter", "%p", spu_context_nospu_event },
{ "__spu_deactivate__unload", "%p %p", spu_context_event },
{ "spufs_ps_nopfn__enter", "%p", spu_context_nospu_event },
{ "spufs_ps_nopfn__sleep", "%p", spu_context_nospu_event },
{ "spufs_ps_nopfn__wake", "%p %p", spu_context_event },
{ "spufs_ps_nopfn__insert", "%p %p", spu_context_event },
{ "spu_acquire_saved__enter", "%p", spu_context_nospu_event },
{ "destroy_spu_context__enter", "%p", spu_context_nospu_event },
};
static int __init sputrace_init(void)
{
struct proc_dir_entry *entry;
int i, error = -ENOMEM;
sputrace_log = kcalloc(sizeof(struct sputrace),
bufsize, GFP_KERNEL);
if (!sputrace_log)
goto out;
entry = create_proc_entry("sputrace", S_IRUSR, NULL);
if (!entry)
goto out_free_log;
entry->proc_fops = &sputrace_fops;
for (i = 0; i < ARRAY_SIZE(spu_probes); i++) {
struct spu_probe *p = &spu_probes[i];
error = marker_probe_register(p->name, p->format,
p->probe_func, p);
if (error)
printk(KERN_INFO "Unable to register probe %s\n",
p->name);
error = marker_arm(p->name);
if (error)
printk(KERN_INFO "Unable to arm probe %s\n", p->name);
}
return 0;
out_free_log:
kfree(sputrace_log);
out:
return -ENOMEM;
}
static void __exit sputrace_exit(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(spu_probes); i++)
marker_probe_unregister(spu_probes[i].name);
remove_proc_entry("sputrace", NULL);
kfree(sputrace_log);
}
module_init(sputrace_init);
module_exit(sputrace_exit);
MODULE_LICENSE("GPL");
......@@ -132,33 +132,18 @@ static void __init storcenter_init_IRQ(void)
paddr = (phys_addr_t)of_translate_address(dnp, prop);
mpic = mpic_alloc(dnp, paddr, MPIC_PRIMARY | MPIC_WANTS_RESET,
4, 32, " EPIC ");
16, 32, " OpenPIC ");
of_node_put(dnp);
BUG_ON(mpic == NULL);
/* PCI IRQs */
/*
* 2.6.12 patch:
* openpic_set_sources(0, 5, OpenPIC_Addr + 0x10200);
* openpic_set_sources(5, 2, OpenPIC_Addr + 0x11120);
* first_irq, num_irqs, __iomem first_ISR
* o_ss: i, src: 0, fdf50200
* o_ss: i, src: 1, fdf50220
* o_ss: i, src: 2, fdf50240
* o_ss: i, src: 3, fdf50260
* o_ss: i, src: 4, fdf50280
* o_ss: i, src: 5, fdf51120
* o_ss: i, src: 6, fdf51140
* 16 Serial Interrupts followed by 16 Internal Interrupts.
* I2C is the second internal, so it is at 17, 0x11020.
*/
mpic_assign_isu(mpic, 0, paddr + 0x10200);
mpic_assign_isu(mpic, 1, paddr + 0x10220);
mpic_assign_isu(mpic, 2, paddr + 0x10240);
mpic_assign_isu(mpic, 3, paddr + 0x10260);
mpic_assign_isu(mpic, 4, paddr + 0x10280);
mpic_assign_isu(mpic, 5, paddr + 0x11120);
mpic_assign_isu(mpic, 6, paddr + 0x11140);
mpic_assign_isu(mpic, 1, paddr + 0x11000);
mpic_init(mpic);
}
......@@ -178,7 +163,7 @@ static int __init storcenter_probe(void)
{
unsigned long root = of_get_flat_dt_root();
return of_flat_dt_is_compatible(root, "storcenter");
return of_flat_dt_is_compatible(root, "iomega,storcenter");
}
define_machine(storcenter){
......
......@@ -58,7 +58,7 @@ static void pseries_mach_cpu_die(void)
{
local_irq_disable();
idle_task_exit();
xics_teardown_cpu(0);
xics_teardown_cpu();
unregister_slb_shadow(hard_smp_processor_id(), __pa(get_slb_shadow()));
rtas_stop_self();
/* Should never get here... */
......
......@@ -54,7 +54,7 @@ void __init setup_kexec_cpu_down_mpic(void)
static void pseries_kexec_cpu_down_xics(int crash_shutdown, int secondary)
{
pseries_kexec_cpu_down(crash_shutdown, secondary);
xics_teardown_cpu(secondary);
xics_kexec_teardown_cpu(secondary);
}
void __init setup_kexec_cpu_down_xics(void)
......
......@@ -167,6 +167,7 @@ static int pSeries_reconfig_remove_node(struct device_node *np)
if ((child = of_get_next_child(np, NULL))) {
of_node_put(child);
of_node_put(parent);
return -EBUSY;
}
......
......@@ -160,6 +160,46 @@ static inline void lpar_qirr_info(int n_cpu , u8 value)
/* High level handlers and init code */
static void xics_update_irq_servers(void)
{
int i, j;
struct device_node *np;
u32 ilen;
const u32 *ireg, *isize;
u32 hcpuid;
/* Find the server numbers for the boot cpu. */
np = of_get_cpu_node(boot_cpuid, NULL);
BUG_ON(!np);
ireg = of_get_property(np, "ibm,ppc-interrupt-gserver#s", &ilen);
if (!ireg) {
of_node_put(np);
return;
}
i = ilen / sizeof(int);
hcpuid = get_hard_smp_processor_id(boot_cpuid);
/* Global interrupt distribution server is specified in the last
* entry of "ibm,ppc-interrupt-gserver#s" property. Get the last
* entry fom this property for current boot cpu id and use it as
* default distribution server
*/
for (j = 0; j < i; j += 2) {
if (ireg[j] == hcpuid) {
default_server = hcpuid;
default_distrib_server = ireg[j+1];
isize = of_get_property(np,
"ibm,interrupt-server#-size", NULL);
if (isize)
interrupt_server_size = *isize;
}
}
of_node_put(np);
}
#ifdef CONFIG_SMP
static int get_irq_server(unsigned int virq, unsigned int strict_check)
......@@ -169,6 +209,9 @@ static int get_irq_server(unsigned int virq, unsigned int strict_check)
cpumask_t cpumask = irq_desc[virq].affinity;
cpumask_t tmp = CPU_MASK_NONE;
if (! cpu_isset(default_server, cpu_online_map))
xics_update_irq_servers();
if (!distribute_irqs)
return default_server;
......@@ -658,39 +701,11 @@ static void __init xics_setup_8259_cascade(void)
set_irq_chained_handler(cascade, pseries_8259_cascade);
}
static struct device_node *cpuid_to_of_node(int cpu)
{
struct device_node *np;
u32 hcpuid = get_hard_smp_processor_id(cpu);
for_each_node_by_type(np, "cpu") {
int i, len;
const u32 *intserv;
intserv = of_get_property(np, "ibm,ppc-interrupt-server#s",
&len);
if (!intserv)
intserv = of_get_property(np, "reg", &len);
i = len / sizeof(u32);
while (i--)
if (intserv[i] == hcpuid)
return np;
}
return NULL;
}
void __init xics_init_IRQ(void)
{
int i, j;
struct device_node *np;
u32 ilen, indx = 0;
const u32 *ireg, *isize;
u32 indx = 0;
int found = 0;
u32 hcpuid;
ppc64_boot_msg(0x20, "XICS Init");
......@@ -709,34 +724,7 @@ void __init xics_init_IRQ(void)
return;
xics_init_host();
/* Find the server numbers for the boot cpu. */
np = cpuid_to_of_node(boot_cpuid);
BUG_ON(!np);
ireg = of_get_property(np, "ibm,ppc-interrupt-gserver#s", &ilen);
if (!ireg)
goto skip_gserver_check;
i = ilen / sizeof(int);
hcpuid = get_hard_smp_processor_id(boot_cpuid);
/* Global interrupt distribution server is specified in the last
* entry of "ibm,ppc-interrupt-gserver#s" property. Get the last
* entry fom this property for current boot cpu id and use it as
* default distribution server
*/
for (j = 0; j < i; j += 2) {
if (ireg[j] == hcpuid) {
default_server = hcpuid;
default_distrib_server = ireg[j+1];
isize = of_get_property(np,
"ibm,interrupt-server#-size", NULL);
if (isize)
interrupt_server_size = *isize;
}
}
skip_gserver_check:
of_node_put(np);
xics_update_irq_servers();
if (firmware_has_feature(FW_FEATURE_LPAR))
ppc_md.get_irq = xics_get_irq_lpar;
......@@ -775,11 +763,9 @@ void xics_request_IPIs(void)
}
#endif /* CONFIG_SMP */
void xics_teardown_cpu(int secondary)
void xics_teardown_cpu()
{
int cpu = smp_processor_id();
unsigned int ipi;
struct irq_desc *desc;
xics_set_cpu_priority(0);
......@@ -790,9 +776,17 @@ void xics_teardown_cpu(int secondary)
lpar_qirr_info(cpu, 0xff);
else
direct_qirr_info(cpu, 0xff);
}
void xics_kexec_teardown_cpu(int secondary)
{
unsigned int ipi;
struct irq_desc *desc;
xics_teardown_cpu();
/*
* we need to EOI the IPI if we got here from kexec down IPI
* we need to EOI the IPI
*
* probably need to check all the other interrupts too
* should we be flagging idle loop instead?
......@@ -880,8 +874,8 @@ void xics_migrate_irqs_away(void)
virq, cpu);
/* Reset affinity to all cpus */
irq_desc[virq].affinity = CPU_MASK_ALL;
desc->chip->set_affinity(virq, CPU_MASK_ALL);
irq_desc[irq].affinity = CPU_MASK_ALL;
unlock:
spin_unlock_irqrestore(&desc->lock, flags);
}
......
......@@ -16,7 +16,8 @@
extern void xics_init_IRQ(void);
extern void xics_setup_cpu(void);
extern void xics_teardown_cpu(int secondary);
extern void xics_teardown_cpu(void);
extern void xics_kexec_teardown_cpu(int secondary);
extern void xics_cause_IPI(int cpu);
extern void xics_request_IPIs(void);
extern void xics_migrate_irqs_away(void);
......
......@@ -137,5 +137,6 @@ void dcr_unmap(dcr_host_t host, unsigned int dcr_c)
h.token = NULL;
}
EXPORT_SYMBOL_GPL(dcr_unmap);
#else /* defined(CONFIG_PPC_DCR_NATIVE) */
DEFINE_SPINLOCK(dcr_ind_lock);
#endif /* !defined(CONFIG_PPC_DCR_NATIVE) */
......@@ -1342,7 +1342,7 @@ static int __init of_fsl_spi_probe(char *type, char *compatible, u32 sysclk,
if (ret)
goto unreg;
ret = platform_device_register(pdev);
ret = platform_device_add(pdev);
if (ret)
goto unreg;
......
......@@ -174,15 +174,19 @@ int mpc8xx_pic_init(void)
goto out;
siu_reg = ioremap(res.start, res.end - res.start + 1);
if (siu_reg == NULL)
return -EINVAL;
if (siu_reg == NULL) {
ret = -EINVAL;
goto out;
}
mpc8xx_pic_host = irq_alloc_host(of_node_get(np), IRQ_HOST_MAP_LINEAR,
mpc8xx_pic_host = irq_alloc_host(np, IRQ_HOST_MAP_LINEAR,
64, &mpc8xx_pic_host_ops, 64);
if (mpc8xx_pic_host == NULL) {
printk(KERN_ERR "MPC8xx PIC: failed to allocate irq host!\n");
ret = -ENOMEM;
goto out;
}
return 0;
out:
of_node_put(np);
......
......@@ -66,7 +66,7 @@ phys_addr_t get_qe_base(void)
{
struct device_node *qe;
unsigned int size;
const void *prop;
const u32 *prop;
if (qebase != -1)
return qebase;
......@@ -79,6 +79,7 @@ phys_addr_t get_qe_base(void)
}
prop = of_get_property(qe, "reg", &size);
if (prop && size >= sizeof(*prop))
qebase = of_translate_address(qe, prop);
of_node_put(qe);
......@@ -172,10 +173,9 @@ unsigned int get_brg_clk(void)
}
prop = of_get_property(qe, "brg-frequency", &size);
if (!prop || size != sizeof(*prop))
return brg_clk;
if (prop && size == sizeof(*prop))
brg_clk = *prop;
of_node_put(qe);
return brg_clk;
......
......@@ -1202,8 +1202,10 @@ static int __devexit ace_of_remove(struct of_device *op)
}
/* Match table for of_platform binding */
static struct of_device_id __devinit ace_of_match[] = {
{ .compatible = "xilinx,xsysace", },
static struct of_device_id ace_of_match[] __devinitdata = {
{ .compatible = "xlnx,opb-sysace-1.00.b", },
{ .compatible = "xlnx,opb-sysace-1.00.c", },
{ .compatible = "xlnx,xps-sysace-1.00.a", },
{},
};
MODULE_DEVICE_TABLE(of, ace_of_match);
......
......@@ -558,7 +558,7 @@ static struct cdrom_device_ops viocd_dops = {
.capability = CDC_CLOSE_TRAY | CDC_OPEN_TRAY | CDC_LOCK | CDC_SELECT_SPEED | CDC_SELECT_DISC | CDC_MULTI_SESSION | CDC_MCN | CDC_MEDIA_CHANGED | CDC_PLAY_AUDIO | CDC_RESET | CDC_DRIVE_STATUS | CDC_GENERIC_PACKET | CDC_CD_R | CDC_CD_RW | CDC_DVD | CDC_DVD_R | CDC_DVD_RAM | CDC_RAM
};
static int __init find_capability(const char *type)
static int find_capability(const char *type)
{
struct capability_entry *entry;
......
......@@ -830,6 +830,16 @@ config DTLK
To compile this driver as a module, choose M here: the
module will be called dtlk.
config XILINX_HWICAP
tristate "Xilinx HWICAP Support"
depends on XILINX_VIRTEX
help
This option enables support for Xilinx Internal Configuration
Access Port (ICAP) driver. The ICAP is used on Xilinx Virtex
FPGA platforms to partially reconfigure the FPGA at runtime.
If unsure, say N.
config R3964
tristate "Siemens R3964 line discipline"
---help---
......
......@@ -76,6 +76,7 @@ obj-$(CONFIG_EFI_RTC) += efirtc.o
obj-$(CONFIG_SGI_DS1286) += ds1286.o
obj-$(CONFIG_SGI_IP27_RTC) += ip27-rtc.o
obj-$(CONFIG_DS1302) += ds1302.o
obj-$(CONFIG_XILINX_HWICAP) += xilinx_hwicap/
ifeq ($(CONFIG_GENERIC_NVRAM),y)
obj-$(CONFIG_NVRAM) += generic_nvram.o
else
......
#
# Makefile for the Xilinx OPB hwicap driver
#
obj-$(CONFIG_XILINX_HWICAP) += xilinx_hwicap_m.o
xilinx_hwicap_m-y := xilinx_hwicap.o fifo_icap.o buffer_icap.o
This diff is collapsed.
/*****************************************************************************
*
* Author: Xilinx, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS"
* AS A COURTESY TO YOU, SOLELY FOR USE IN DEVELOPING PROGRAMS AND
* SOLUTIONS FOR XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE,
* OR INFORMATION AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE,
* APPLICATION OR STANDARD, XILINX IS MAKING NO REPRESENTATION
* THAT THIS IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,
* AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE
* FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY
* WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE
* IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR
* REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF
* INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE.
*
* Xilinx products are not intended for use in life support appliances,
* devices, or systems. Use in such applications is expressly prohibited.
*
* (c) Copyright 2003-2008 Xilinx Inc.
* All rights reserved.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
*****************************************************************************/
#ifndef XILINX_BUFFER_ICAP_H_ /* prevent circular inclusions */
#define XILINX_BUFFER_ICAP_H_ /* by using protection macros */
#include <linux/types.h>
#include <linux/cdev.h>
#include <linux/version.h>
#include <linux/platform_device.h>
#include <asm/io.h>
#include "xilinx_hwicap.h"
void buffer_icap_reset(struct hwicap_drvdata *drvdata);
/* Loads a partial bitstream from system memory. */
int buffer_icap_set_configuration(struct hwicap_drvdata *drvdata, u32 *data,
u32 Size);
/* Loads a partial bitstream from system memory. */
int buffer_icap_get_configuration(struct hwicap_drvdata *drvdata, u32 *data,
u32 Size);
#endif
This diff is collapsed.
/*****************************************************************************
*
* Author: Xilinx, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS"
* AS A COURTESY TO YOU, SOLELY FOR USE IN DEVELOPING PROGRAMS AND
* SOLUTIONS FOR XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE,
* OR INFORMATION AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE,
* APPLICATION OR STANDARD, XILINX IS MAKING NO REPRESENTATION
* THAT THIS IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,
* AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE
* FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY
* WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE
* IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR
* REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF
* INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE.
*
* Xilinx products are not intended for use in life support appliances,
* devices, or systems. Use in such applications is expressly prohibited.
*
* (c) Copyright 2007-2008 Xilinx Inc.
* All rights reserved.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
*****************************************************************************/
#ifndef XILINX_FIFO_ICAP_H_ /* prevent circular inclusions */
#define XILINX_FIFO_ICAP_H_ /* by using protection macros */
#include <linux/types.h>
#include <linux/cdev.h>
#include <linux/version.h>
#include <linux/platform_device.h>
#include <asm/io.h>
#include "xilinx_hwicap.h"
/* Reads integers from the device into the storage buffer. */
int fifo_icap_get_configuration(
struct hwicap_drvdata *drvdata,
u32 *FrameBuffer,
u32 NumWords);
/* Writes integers to the device from the storage buffer. */
int fifo_icap_set_configuration(
struct hwicap_drvdata *drvdata,
u32 *FrameBuffer,
u32 NumWords);
void fifo_icap_reset(struct hwicap_drvdata *drvdata);
void fifo_icap_flush_fifo(struct hwicap_drvdata *drvdata);
#endif
This diff is collapsed.
/*****************************************************************************
*
* Author: Xilinx, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS"
* AS A COURTESY TO YOU, SOLELY FOR USE IN DEVELOPING PROGRAMS AND
* SOLUTIONS FOR XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE,
* OR INFORMATION AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE,
* APPLICATION OR STANDARD, XILINX IS MAKING NO REPRESENTATION
* THAT THIS IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,
* AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE
* FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY
* WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE
* IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR
* REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF
* INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE.
*
* Xilinx products are not intended for use in life support appliances,
* devices, or systems. Use in such applications is expressly prohibited.
*
* (c) Copyright 2003-2007 Xilinx Inc.
* All rights reserved.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
*****************************************************************************/
#ifndef XILINX_HWICAP_H_ /* prevent circular inclusions */
#define XILINX_HWICAP_H_ /* by using protection macros */
#include <linux/types.h>
#include <linux/cdev.h>
#include <linux/version.h>
#include <linux/platform_device.h>
#include <asm/io.h>
struct hwicap_drvdata {
u32 write_buffer_in_use; /* Always in [0,3] */
u8 write_buffer[4];
u32 read_buffer_in_use; /* Always in [0,3] */
u8 read_buffer[4];
u32 mem_start; /* phys. address of the control registers */
u32 mem_end; /* phys. address of the control registers */
u32 mem_size;
void __iomem *base_address;/* virt. address of the control registers */
struct device *dev;
struct cdev cdev; /* Char device structure */
dev_t devt;
const struct hwicap_driver_config *config;
const struct config_registers *config_regs;
void *private_data;
bool is_open;
struct semaphore sem;
};
struct hwicap_driver_config {
int (*get_configuration)(struct hwicap_drvdata *drvdata, u32 *data,
u32 size);
int (*set_configuration)(struct hwicap_drvdata *drvdata, u32 *data,
u32 size);
void (*reset)(struct hwicap_drvdata *drvdata);
};
/* Number of times to poll the done regsiter */
#define XHI_MAX_RETRIES 10
/************ Constant Definitions *************/
#define XHI_PAD_FRAMES 0x1
/* Mask for calculating configuration packet headers */
#define XHI_WORD_COUNT_MASK_TYPE_1 0x7FFUL
#define XHI_WORD_COUNT_MASK_TYPE_2 0x1FFFFFUL
#define XHI_TYPE_MASK 0x7
#define XHI_REGISTER_MASK 0xF
#define XHI_OP_MASK 0x3
#define XHI_TYPE_SHIFT 29
#define XHI_REGISTER_SHIFT 13
#define XHI_OP_SHIFT 27
#define XHI_TYPE_1 1
#define XHI_TYPE_2 2
#define XHI_OP_WRITE 2
#define XHI_OP_READ 1
/* Address Block Types */
#define XHI_FAR_CLB_BLOCK 0
#define XHI_FAR_BRAM_BLOCK 1
#define XHI_FAR_BRAM_INT_BLOCK 2
struct config_registers {
u32 CRC;
u32 FAR;
u32 FDRI;
u32 FDRO;
u32 CMD;
u32 CTL;
u32 MASK;
u32 STAT;
u32 LOUT;
u32 COR;
u32 MFWR;
u32 FLR;
u32 KEY;
u32 CBC;
u32 IDCODE;
u32 AXSS;
u32 C0R_1;
u32 CSOB;
u32 WBSTAR;
u32 TIMER;
u32 BOOTSTS;
u32 CTL_1;
};
/* Configuration Commands */
#define XHI_CMD_NULL 0
#define XHI_CMD_WCFG 1
#define XHI_CMD_MFW 2
#define XHI_CMD_DGHIGH 3
#define XHI_CMD_RCFG 4
#define XHI_CMD_START 5
#define XHI_CMD_RCAP 6
#define XHI_CMD_RCRC 7
#define XHI_CMD_AGHIGH 8
#define XHI_CMD_SWITCH 9
#define XHI_CMD_GRESTORE 10
#define XHI_CMD_SHUTDOWN 11
#define XHI_CMD_GCAPTURE 12
#define XHI_CMD_DESYNCH 13
#define XHI_CMD_IPROG 15 /* Only in Virtex5 */
#define XHI_CMD_CRCC 16 /* Only in Virtex5 */
#define XHI_CMD_LTIMER 17 /* Only in Virtex5 */
/* Packet constants */
#define XHI_SYNC_PACKET 0xAA995566UL
#define XHI_DUMMY_PACKET 0xFFFFFFFFUL
#define XHI_NOOP_PACKET (XHI_TYPE_1 << XHI_TYPE_SHIFT)
#define XHI_TYPE_2_READ ((XHI_TYPE_2 << XHI_TYPE_SHIFT) | \
(XHI_OP_READ << XHI_OP_SHIFT))
#define XHI_TYPE_2_WRITE ((XHI_TYPE_2 << XHI_TYPE_SHIFT) | \
(XHI_OP_WRITE << XHI_OP_SHIFT))
#define XHI_TYPE2_CNT_MASK 0x07FFFFFF
#define XHI_TYPE_1_PACKET_MAX_WORDS 2047UL
#define XHI_TYPE_1_HEADER_BYTES 4
#define XHI_TYPE_2_HEADER_BYTES 8
/* Constant to use for CRC check when CRC has been disabled */
#define XHI_DISABLED_AUTO_CRC 0x0000DEFCUL
/**
* hwicap_type_1_read: Generates a Type 1 read packet header.
* @parameter: Register is the address of the register to be read back.
*
* Generates a Type 1 read packet header, which is used to indirectly
* read registers in the configuration logic. This packet must then
* be sent through the icap device, and a return packet received with
* the information.
**/
static inline u32 hwicap_type_1_read(u32 Register)
{
return (XHI_TYPE_1 << XHI_TYPE_SHIFT) |
(Register << XHI_REGISTER_SHIFT) |
(XHI_OP_READ << XHI_OP_SHIFT);
}
/**
* hwicap_type_1_write: Generates a Type 1 write packet header
* @parameter: Register is the address of the register to be read back.
**/
static inline u32 hwicap_type_1_write(u32 Register)
{
return (XHI_TYPE_1 << XHI_TYPE_SHIFT) |
(Register << XHI_REGISTER_SHIFT) |
(XHI_OP_WRITE << XHI_OP_SHIFT);
}
#endif
......@@ -1737,10 +1737,8 @@ config SC92031
config CPMAC
tristate "TI AR7 CPMAC Ethernet support (EXPERIMENTAL)"
depends on NET_ETHERNET && EXPERIMENTAL && AR7
depends on NET_ETHERNET && EXPERIMENTAL && AR7 && BROKEN
select PHYLIB
select FIXED_PHY
select FIXED_MII_100_FDX
help
TI AR7 CPMAC Ethernet support
......
......@@ -845,15 +845,6 @@ static void cpmac_adjust_link(struct net_device *dev)
spin_unlock(&priv->lock);
}
static int cpmac_link_update(struct net_device *dev,
struct fixed_phy_status *status)
{
status->link = 1;
status->speed = 100;
status->duplex = 1;
return 0;
}
static int cpmac_open(struct net_device *dev)
{
int i, size, res;
......@@ -996,11 +987,11 @@ static int external_switch;
static int __devinit cpmac_probe(struct platform_device *pdev)
{
int rc, phy_id, i;
int mdio_bus_id = cpmac_mii.id;
struct resource *mem;
struct cpmac_priv *priv;
struct net_device *dev;
struct plat_cpmac_data *pdata;
struct fixed_info *fixed_phy;
DECLARE_MAC_BUF(mac);
pdata = pdev->dev.platform_data;
......@@ -1014,9 +1005,23 @@ static int __devinit cpmac_probe(struct platform_device *pdev)
}
if (phy_id == PHY_MAX_ADDR) {
if (external_switch || dumb_switch)
if (external_switch || dumb_switch) {
struct fixed_phy_status status = {};
mdio_bus_id = 0;
/*
* FIXME: this should be in the platform code!
* Since there is not platform code at all (that is,
* no mainline users of that driver), place it here
* for now.
*/
phy_id = 0;
else {
status.link = 1;
status.duplex = 1;
status.speed = 100;
fixed_phy_add(PHY_POLL, phy_id, &status);
} else {
printk(KERN_ERR "cpmac: no PHY present\n");
return -ENODEV;
}
......@@ -1060,32 +1065,8 @@ static int __devinit cpmac_probe(struct platform_device *pdev)
priv->msg_enable = netif_msg_init(debug_level, 0xff);
memcpy(dev->dev_addr, pdata->dev_addr, sizeof(dev->dev_addr));
if (phy_id == 31) {
snprintf(priv->phy_name, BUS_ID_SIZE, PHY_ID_FMT, cpmac_mii.id,
phy_id);
} else {
/* Let's try to get a free fixed phy... */
for (i = 0; i < MAX_PHY_AMNT; i++) {
fixed_phy = fixed_mdio_get_phydev(i);
if (!fixed_phy)
continue;
if (!fixed_phy->phydev->attached_dev) {
strncpy(priv->phy_name,
fixed_phy->phydev->dev.bus_id,
BUS_ID_SIZE);
fixed_mdio_set_link_update(fixed_phy->phydev,
&cpmac_link_update);
goto phy_found;
}
}
if (netif_msg_drv(priv))
printk(KERN_ERR "%s: Could not find fixed PHY\n",
dev->name);
rc = -ENODEV;
goto fail;
}
snprintf(priv->phy_name, BUS_ID_SIZE, PHY_ID_FMT, mdio_bus_id, phy_id);
phy_found:
priv->phy = phy_connect(dev, priv->phy_name, &cpmac_adjust_link, 0,
PHY_INTERFACE_MODE_MII);
if (IS_ERR(priv->phy)) {
......
......@@ -137,6 +137,31 @@ struct device_node *of_get_parent(const struct device_node *node)
}
EXPORT_SYMBOL(of_get_parent);
/**
* of_get_next_parent - Iterate to a node's parent
* @node: Node to get parent of
*
* This is like of_get_parent() except that it drops the
* refcount on the passed node, making it suitable for iterating
* through a node's parents.
*
* Returns a node pointer with refcount incremented, use
* of_node_put() on it when done.
*/
struct device_node *of_get_next_parent(struct device_node *node)
{
struct device_node *parent;
if (!node)
return NULL;
read_lock(&devtree_lock);
parent = of_node_get(node->parent);
of_node_put(node);
read_unlock(&devtree_lock);
return parent;
}
/**
* of_get_next_child - Iterate a node childs
* @node: parent node
......
......@@ -85,6 +85,15 @@ static int of_platform_device_resume(struct device * dev)
return error;
}
static void of_platform_device_shutdown(struct device *dev)
{
struct of_device *of_dev = to_of_device(dev);
struct of_platform_driver *drv = to_of_platform_driver(dev->driver);
if (dev->driver && drv->shutdown)
drv->shutdown(of_dev);
}
int of_bus_type_init(struct bus_type *bus, const char *name)
{
bus->name = name;
......@@ -93,6 +102,7 @@ int of_bus_type_init(struct bus_type *bus, const char *name)
bus->remove = of_platform_device_remove;
bus->suspend = of_platform_device_suspend;
bus->resume = of_platform_device_resume;
bus->shutdown = of_platform_device_shutdown;
return bus_register(bus);
}
......
......@@ -1142,17 +1142,17 @@ config SERIAL_SGI_L1_CONSOLE
say Y. Otherwise, say N.
config SERIAL_MPC52xx
tristate "Freescale MPC52xx family PSC serial support"
depends on PPC_MPC52xx
tristate "Freescale MPC52xx/MPC512x family PSC serial support"
depends on PPC_MPC52xx || PPC_MPC512x
select SERIAL_CORE
help
This drivers support the MPC52xx PSC serial ports. If you would
like to use them, you must answer Y or M to this option. Not that
This driver supports MPC52xx and MPC512x PSC serial ports. If you would
like to use them, you must answer Y or M to this option. Note that
for use as console, it must be included in kernel and not as a
module.
config SERIAL_MPC52xx_CONSOLE
bool "Console on a Freescale MPC52xx family PSC serial port"
bool "Console on a Freescale MPC52xx/MPC512x family PSC serial port"
depends on SERIAL_MPC52xx=y
select SERIAL_CORE_CONSOLE
help
......@@ -1160,7 +1160,7 @@ config SERIAL_MPC52xx_CONSOLE
of the Freescale MPC52xx family as a console.
config SERIAL_MPC52xx_CONSOLE_BAUD
int "Freescale MPC52xx family PSC serial port baud"
int "Freescale MPC52xx/MPC512x family PSC serial port baud"
depends on SERIAL_MPC52xx_CONSOLE=y
default "9600"
help
......
This diff is collapsed.
......@@ -17,10 +17,21 @@
#include <linux/tty.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <asm/io.h>
#if defined(CONFIG_OF)
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/of_platform.h>
/* Match table for of_platform binding */
static struct of_device_id ulite_of_match[] __devinitdata = {
{ .compatible = "xlnx,opb-uartlite-1.00.b", },
{ .compatible = "xlnx,xps-uartlite-1.00.a", },
{}
};
MODULE_DEVICE_TABLE(of, ulite_of_match);
#endif
#define ULITE_NAME "ttyUL"
......@@ -275,6 +286,9 @@ static void ulite_release_port(struct uart_port *port)
static int ulite_request_port(struct uart_port *port)
{
pr_debug("ulite console: port=%p; port->mapbase=%x\n",
port, port->mapbase);
if (!request_mem_region(port->mapbase, ULITE_REGION, "uartlite")) {
dev_err(port->dev, "Memory region busy\n");
return -EBUSY;
......@@ -375,32 +389,6 @@ static void ulite_console_write(struct console *co, const char *s,
spin_unlock_irqrestore(&port->lock, flags);
}
#if defined(CONFIG_OF)
static inline void __init ulite_console_of_find_device(int id)
{
struct device_node *np;
struct resource res;
const unsigned int *of_id;
int rc;
for_each_compatible_node(np, NULL, "xilinx,uartlite") {
of_id = of_get_property(np, "port-number", NULL);
if ((!of_id) || (*of_id != id))
continue;
rc = of_address_to_resource(np, 0, &res);
if (rc)
continue;
ulite_ports[id].mapbase = res.start;
of_node_put(np);
return;
}
}
#else /* CONFIG_OF */
static inline void __init ulite_console_of_find_device(int id) { /* do nothing */ }
#endif /* CONFIG_OF */
static int __init ulite_console_setup(struct console *co, char *options)
{
struct uart_port *port;
......@@ -414,11 +402,7 @@ static int __init ulite_console_setup(struct console *co, char *options)
port = &ulite_ports[co->index];
/* Check if it is an OF device */
if (!port->mapbase)
ulite_console_of_find_device(co->index);
/* Do we have a device now? */
/* Has the device been initialized yet? */
if (!port->mapbase) {
pr_debug("console on ttyUL%i not present\n", co->index);
return -ENODEV;
......@@ -617,13 +601,6 @@ static int __devexit ulite_of_remove(struct of_device *op)
return ulite_release(&op->dev);
}
/* Match table for of_platform binding */
static struct of_device_id __devinit ulite_of_match[] = {
{ .type = "serial", .compatible = "xilinx,uartlite", },
{},
};
MODULE_DEVICE_TABLE(of, ulite_of_match);
static struct of_platform_driver ulite_of_driver = {
.owner = THIS_MODULE,
.name = "uartlite",
......
......@@ -459,8 +459,8 @@ static int __devexit xilinxfb_of_remove(struct of_device *op)
}
/* Match table for of_platform binding */
static struct of_device_id __devinit xilinxfb_of_match[] = {
{ .compatible = "xilinx,ml300-fb", },
static struct of_device_id xilinxfb_of_match[] __devinitdata = {
{ .compatible = "xlnx,plb-tft-cntlr-ref-1.00.a", },
{},
};
MODULE_DEVICE_TABLE(of, xilinxfb_of_match);
......
......@@ -46,7 +46,7 @@ enum powerpc_oprofile_type {
PPC_OPROFILE_RS64 = 1,
PPC_OPROFILE_POWER4 = 2,
PPC_OPROFILE_G4 = 3,
PPC_OPROFILE_BOOKE = 4,
PPC_OPROFILE_FSL_EMB = 4,
PPC_OPROFILE_CELL = 5,
PPC_OPROFILE_PA6T = 6,
};
......
......@@ -59,25 +59,36 @@ do { \
/* R/W of indirect DCRs make use of standard naming conventions for DCRs */
extern spinlock_t dcr_ind_lock;
#define mfdcri(base, reg) \
({ \
unsigned long flags; \
unsigned int val; \
spin_lock_irqsave(&dcr_ind_lock, flags); \
mtdcr(DCRN_ ## base ## _CONFIG_ADDR, reg); \
val = mfdcr(DCRN_ ## base ## _CONFIG_DATA); \
spin_unlock_irqrestore(&dcr_ind_lock, flags); \
val; \
})
static inline unsigned __mfdcri(int base_addr, int base_data, int reg)
{
unsigned long flags;
unsigned int val;
#define mtdcri(base, reg, data) \
do { \
unsigned long flags; \
spin_lock_irqsave(&dcr_ind_lock, flags); \
mtdcr(DCRN_ ## base ## _CONFIG_ADDR, reg); \
mtdcr(DCRN_ ## base ## _CONFIG_DATA, data); \
spin_unlock_irqrestore(&dcr_ind_lock, flags); \
} while (0)
spin_lock_irqsave(&dcr_ind_lock, flags);
__mtdcr(base_addr, reg);
val = __mfdcr(base_data);
spin_unlock_irqrestore(&dcr_ind_lock, flags);
return val;
}
static inline void __mtdcri(int base_addr, int base_data, int reg,
unsigned val)
{
unsigned long flags;
spin_lock_irqsave(&dcr_ind_lock, flags);
__mtdcr(base_addr, reg);
__mtdcr(base_data, val);
spin_unlock_irqrestore(&dcr_ind_lock, flags);
}
#define mfdcri(base, reg) __mfdcri(DCRN_ ## base ## _CONFIG_ADDR, \
DCRN_ ## base ## _CONFIG_DATA, \
reg)
#define mtdcri(base, reg, data) __mtdcri(DCRN_ ## base ## _CONFIG_ADDR, \
DCRN_ ## base ## _CONFIG_DATA, \
reg, data)
#endif /* __ASSEMBLY__ */
#endif /* __KERNEL__ */
......
......@@ -165,8 +165,10 @@ typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];
* This is used to ensure we don't load something for the wrong architecture.
*/
#define elf_check_arch(x) ((x)->e_machine == ELF_ARCH)
#define compat_elf_check_arch(x) ((x)->e_machine == EM_PPC)
#define USE_ELF_CORE_DUMP
#define CORE_DUMP_USE_REGSET
#define ELF_EXEC_PAGESIZE PAGE_SIZE
/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
......
/*
* Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
*
* Author: John Rigby, <jrigby@freescale.com>, Friday Apr 13 2007
*
* Description:
* MPC5121 Prototypes and definitions
*
* This is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*/
#ifndef __ASM_POWERPC_MPC512x_H__
#define __ASM_POWERPC_MPC512x_H__
extern unsigned long mpc512x_find_ips_freq(struct device_node *node);
#endif /* __ASM_POWERPC_MPC512x_H__ */
......@@ -190,5 +190,53 @@ struct mpc52xx_psc_fifo {
u16 tflwfptr; /* PSC + 0x9e */
};
#define MPC512x_PSC_FIFO_RESET_SLICE 0x80
#define MPC512x_PSC_FIFO_ENABLE_SLICE 0x01
#define MPC512x_PSC_FIFO_ENABLE_DMA 0x04
#define MPC512x_PSC_FIFO_EMPTY 0x1
#define MPC512x_PSC_FIFO_FULL 0x2
#define MPC512x_PSC_FIFO_ALARM 0x4
#define MPC512x_PSC_FIFO_URERR 0x8
#define MPC512x_PSC_FIFO_ORERR 0x01
#define MPC512x_PSC_FIFO_MEMERROR 0x02
struct mpc512x_psc_fifo {
u32 reserved1[10];
u32 txcmd; /* PSC + 0x80 */
u32 txalarm; /* PSC + 0x84 */
u32 txsr; /* PSC + 0x88 */
u32 txisr; /* PSC + 0x8c */
u32 tximr; /* PSC + 0x90 */
u32 txcnt; /* PSC + 0x94 */
u32 txptr; /* PSC + 0x98 */
u32 txsz; /* PSC + 0x9c */
u32 reserved2[7];
union {
u8 txdata_8;
u16 txdata_16;
u32 txdata_32;
} txdata; /* PSC + 0xbc */
#define txdata_8 txdata.txdata_8
#define txdata_16 txdata.txdata_16
#define txdata_32 txdata.txdata_32
u32 rxcmd; /* PSC + 0xc0 */
u32 rxalarm; /* PSC + 0xc4 */
u32 rxsr; /* PSC + 0xc8 */
u32 rxisr; /* PSC + 0xcc */
u32 rximr; /* PSC + 0xd0 */
u32 rxcnt; /* PSC + 0xd4 */
u32 rxptr; /* PSC + 0xd8 */
u32 rxsz; /* PSC + 0xdc */
u32 reserved3[7];
union {
u8 rxdata_8;
u16 rxdata_16;
u32 rxdata_32;
} rxdata; /* PSC + 0xfc */
#define rxdata_8 rxdata.rxdata_8
#define rxdata_16 rxdata.rxdata_16
#define rxdata_32 rxdata.rxdata_32
};
#endif /* __ASM_MPC52xx_PSC_H__ */
......@@ -54,7 +54,7 @@ struct op_powerpc_model {
int num_counters;
};
extern struct op_powerpc_model op_model_fsl_booke;
extern struct op_powerpc_model op_model_fsl_emb;
extern struct op_powerpc_model op_model_rs64;
extern struct op_powerpc_model op_model_power4;
extern struct op_powerpc_model op_model_7450;
......
......@@ -55,6 +55,8 @@ struct pt_regs {
#ifdef __powerpc64__
#define __ARCH_WANT_COMPAT_SYS_PTRACE
#define STACK_FRAME_OVERHEAD 112 /* size of minimum stack frame */
/* Size of dummy stack frame allocated when calling signal handler. */
......
......@@ -18,6 +18,10 @@
#include <asm/reg_booke.h>
#endif /* CONFIG_BOOKE || CONFIG_40x */
#ifdef CONFIG_FSL_EMB_PERFMON
#include <asm/reg_fsl_emb.h>
#endif
#ifdef CONFIG_8xx
#include <asm/reg_8xx.h>
#endif /* CONFIG_8xx */
......
......@@ -9,68 +9,6 @@
#ifndef __ASM_POWERPC_REG_BOOKE_H__
#define __ASM_POWERPC_REG_BOOKE_H__
#ifndef __ASSEMBLY__
/* Performance Monitor Registers */
#define mfpmr(rn) ({unsigned int rval; \
asm volatile("mfpmr %0," __stringify(rn) \
: "=r" (rval)); rval;})
#define mtpmr(rn, v) asm volatile("mtpmr " __stringify(rn) ",%0" : : "r" (v))
#endif /* __ASSEMBLY__ */
/* Freescale Book E Performance Monitor APU Registers */
#define PMRN_PMC0 0x010 /* Performance Monitor Counter 0 */
#define PMRN_PMC1 0x011 /* Performance Monitor Counter 1 */
#define PMRN_PMC2 0x012 /* Performance Monitor Counter 1 */
#define PMRN_PMC3 0x013 /* Performance Monitor Counter 1 */
#define PMRN_PMLCA0 0x090 /* PM Local Control A0 */
#define PMRN_PMLCA1 0x091 /* PM Local Control A1 */
#define PMRN_PMLCA2 0x092 /* PM Local Control A2 */
#define PMRN_PMLCA3 0x093 /* PM Local Control A3 */
#define PMLCA_FC 0x80000000 /* Freeze Counter */
#define PMLCA_FCS 0x40000000 /* Freeze in Supervisor */
#define PMLCA_FCU 0x20000000 /* Freeze in User */
#define PMLCA_FCM1 0x10000000 /* Freeze when PMM==1 */
#define PMLCA_FCM0 0x08000000 /* Freeze when PMM==0 */
#define PMLCA_CE 0x04000000 /* Condition Enable */
#define PMLCA_EVENT_MASK 0x007f0000 /* Event field */
#define PMLCA_EVENT_SHIFT 16
#define PMRN_PMLCB0 0x110 /* PM Local Control B0 */
#define PMRN_PMLCB1 0x111 /* PM Local Control B1 */
#define PMRN_PMLCB2 0x112 /* PM Local Control B2 */
#define PMRN_PMLCB3 0x113 /* PM Local Control B3 */
#define PMLCB_THRESHMUL_MASK 0x0700 /* Threshhold Multiple Field */
#define PMLCB_THRESHMUL_SHIFT 8
#define PMLCB_THRESHOLD_MASK 0x003f /* Threshold Field */
#define PMLCB_THRESHOLD_SHIFT 0
#define PMRN_PMGC0 0x190 /* PM Global Control 0 */
#define PMGC0_FAC 0x80000000 /* Freeze all Counters */
#define PMGC0_PMIE 0x40000000 /* Interrupt Enable */
#define PMGC0_FCECE 0x20000000 /* Freeze countes on
Enabled Condition or
Event */
#define PMRN_UPMC0 0x000 /* User Performance Monitor Counter 0 */
#define PMRN_UPMC1 0x001 /* User Performance Monitor Counter 1 */
#define PMRN_UPMC2 0x002 /* User Performance Monitor Counter 1 */
#define PMRN_UPMC3 0x003 /* User Performance Monitor Counter 1 */
#define PMRN_UPMLCA0 0x080 /* User PM Local Control A0 */
#define PMRN_UPMLCA1 0x081 /* User PM Local Control A1 */
#define PMRN_UPMLCA2 0x082 /* User PM Local Control A2 */
#define PMRN_UPMLCA3 0x083 /* User PM Local Control A3 */
#define PMRN_UPMLCB0 0x100 /* User PM Local Control B0 */
#define PMRN_UPMLCB1 0x101 /* User PM Local Control B1 */
#define PMRN_UPMLCB2 0x102 /* User PM Local Control B2 */
#define PMRN_UPMLCB3 0x103 /* User PM Local Control B3 */
#define PMRN_UPMGC0 0x180 /* User PM Global Control 0 */
/* Machine State Register (MSR) Fields */
#define MSR_UCLE (1<<26) /* User-mode cache lock enable */
#define MSR_SPE (1<<25) /* Enable SPE */
......
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......@@ -65,7 +65,7 @@
struct task_struct;
struct pt_regs;
#ifdef CONFIG_DEBUGGER
#if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
extern int (*__debugger)(struct pt_regs *regs);
extern int (*__debugger_ipi)(struct pt_regs *regs);
......
......@@ -66,7 +66,7 @@ extern void __devinit vio_unregister_device(struct vio_dev *dev);
struct device_node;
extern struct vio_dev * __devinit vio_register_device_node(
extern struct vio_dev *vio_register_device_node(
struct device_node *node_vdev);
extern const void *vio_get_attribute(struct vio_dev *vdev, char *which,
int *length);
......
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