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Commit 38c647be authored by Anton Blanchard's avatar Anton Blanchard
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Merge samba.org:/scratch/anton/linux-2.5 

into samba.org:/scratch/anton/linux-2.5_ppc64_new
parents 18cddbe6 be13f508
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Showing with 315 additions and 344 deletions
arch/ppc64/kernel/chrp_setup.c
View file @ 38c647be
......@@ -66,7 +66,6 @@
extern volatile unsigned char *chrp_int_ack_special;
void chrp_setup_pci_ptrs(void);
void chrp_progress(char *, unsigned short);
void chrp_request_regions(void);
......@@ -237,8 +236,6 @@ chrp_init(unsigned long r3, unsigned long r4, unsigned long r5,
#endif /* CONFIG_BLK_DEV_INITRD */
#endif
ppc_md.ppc_machine = naca->platform;
ppc_md.setup_arch = chrp_setup_arch;
ppc_md.setup_residual = NULL;
ppc_md.get_cpuinfo = chrp_get_cpuinfo;
......@@ -265,7 +262,6 @@ chrp_init(unsigned long r3, unsigned long r4, unsigned long r5,
ppc_md.power_off = rtas_power_off;
ppc_md.halt = rtas_halt;
ppc_md.time_init = NULL;
ppc_md.get_boot_time = pSeries_get_rtc_time;
ppc_md.get_rtc_time = pSeries_get_rtc_time;
ppc_md.set_rtc_time = pSeries_set_rtc_time;
......
arch/ppc64/kernel/iSeries_pci.c
View file @ 38c647be
......@@ -55,7 +55,6 @@ extern int global_phb_number;
extern int panic_timeout;
extern struct device_node *allnodes;
extern unsigned long phb_tce_table_init(struct pci_controller *phb);
extern unsigned long iSeries_Base_Io_Memory;
extern struct pci_ops iSeries_pci_ops;
......
arch/ppc64/kernel/iSeries_setup.c
View file @ 38c647be
......@@ -312,7 +312,6 @@ iSeries_init_early(void)
ppc_md.setup_arch = iSeries_setup_arch;
ppc_md.setup_residual = iSeries_setup_residual;
ppc_md.get_cpuinfo = iSeries_get_cpuinfo;
ppc_md.irq_cannonicalize = NULL;
ppc_md.init_IRQ = iSeries_init_IRQ;
ppc_md.init_ras_IRQ = NULL;
ppc_md.get_irq = iSeries_get_irq;
......@@ -325,7 +324,6 @@ iSeries_init_early(void)
ppc_md.power_off = iSeries_power_off;
ppc_md.halt = iSeries_halt;
ppc_md.time_init = NULL;
ppc_md.get_boot_time = iSeries_get_boot_time;
ppc_md.set_rtc_time = iSeries_set_rtc_time;
ppc_md.get_rtc_time = iSeries_get_rtc_time;
......@@ -784,15 +782,6 @@ iSeries_halt(void)
mf_powerOff();
}
/*
* Nothing to do here.
*/
void __init
iSeries_time_init(void)
{
/* Nothing to do */
}
/* JDH Hack */
unsigned long jdh_time = 0;
......
arch/ppc64/kernel/misc.S
View file @ 38c647be
......@@ -736,8 +736,11 @@ _GLOBAL(sys_call_table32)
.llong .sys_ni_syscall /* reserved for sys_io_getevents */
.llong .sys_ni_syscall /* 230 - reserved for sys_io_submit */
.llong .sys_ni_syscall /* reserved for sys_io_cancel */
.llong .sys_ni_syscall /* reserved for alloc_hugepages */
.llong .sys_ni_syscall /* reserved for free_hugepages */
.llong .sys_exit_group
.rept NR_syscalls-231
.rept NR_syscalls-234
.llong .sys_ni_syscall
.endr
#endif
......@@ -976,7 +979,10 @@ _GLOBAL(sys_call_table)
.llong .sys_io_getevents
.llong .sys_io_submit /* 230 */
.llong .sys_io_cancel
.llong .sys_ni_syscall /* reserved for alloc_hugepages */
.llong .sys_ni_syscall /* reserved for free_hugepages */
.llong .sys_exit_group
.rept NR_syscalls-231
.rept NR_syscalls-234
.llong .sys_ni_syscall
.endr
arch/ppc64/kernel/pSeries_pci.c
View file @ 38c647be
......@@ -45,15 +45,13 @@
#include "open_pic.h"
#include "pci.h"
extern struct device_node *allnodes;
/*******************************************************************
* Forward declares of prototypes.
*******************************************************************/
unsigned long find_and_init_phbs(void);
struct pci_controller* alloc_phb(struct device_node *dev, char *model, unsigned int addr_size_words) ;
void pSeries_pcibios_fixup(void);
static int rtas_fake_read(struct device_node *dn, int offset, int nbytes, unsigned long *returnval);
struct pci_controller *alloc_phb(struct device_node *dev, char *model,
unsigned int addr_size_words) ;
static int rtas_fake_read(struct device_node *dn, int offset, int nbytes,
unsigned long *returnval);
/* RTAS tokens */
static int read_pci_config;
......@@ -467,33 +465,27 @@ alloc_phb(struct device_node *dev, char *model, unsigned int addr_size_words)
* Python
***************************************************************/
if (strstr(model, "Python")) {
unsigned long chip_regs;
volatile u32 *tmp, i;
PPCDBG(PPCDBG_PHBINIT, "\tCreate python\n");
phb = pci_alloc_pci_controller("PHB PY",phb_type_python);
if (phb == NULL) return NULL;
phb->cfg_addr = (volatile unsigned long *)
ioremap(reg_struct.address + 0xf8000, PAGE_SIZE);
PPCDBG(PPCDBG_PHBINIT, "\tcfg_addr_r = 0x%lx\n",
reg_struct.address + 0xf8000);
PPCDBG(PPCDBG_PHBINIT, "\tcfg_addr_v = 0x%lx\n",
phb->cfg_addr);
phb->cfg_data = (char*)(phb->cfg_addr + 0x02);
phb->phb_regs = (volatile unsigned long *)
ioremap(reg_struct.address + 0xf7000, PAGE_SIZE);
phb = pci_alloc_pci_controller("PHB PY", phb_type_python);
if (phb == NULL)
return NULL;
/* Python's register file is 1 MB in size. */
phb->chip_regs = ioremap(reg_struct.address & ~(0xfffffUL),
chip_regs = ioremap(reg_struct.address & ~(0xfffffUL),
0x100000);
/*
* Firmware doesn't always clear this bit which is critical
* for good performance - Anton
*/
{
volatile u32 *tmp, i;
#define PRG_CL_RESET_VALID 0x00010000
tmp = (u32 *)((unsigned long)phb->chip_regs + 0xf6030);
tmp = (u32 *)((unsigned long)chip_regs + 0xf6030);
if (*tmp & PRG_CL_RESET_VALID) {
printk("Python workaround: ");
......@@ -505,7 +497,6 @@ alloc_phb(struct device_node *dev, char *model, unsigned int addr_size_words)
i = *tmp;
printk("reg0: %x\n", i);
}
}
/***************************************************************
* Speedwagon
......@@ -514,28 +505,12 @@ alloc_phb(struct device_node *dev, char *model, unsigned int addr_size_words)
} else if ((strstr(model, "Speedwagon")) ||
(strstr(model, "Winnipeg"))) {
PPCDBG(PPCDBG_PHBINIT, "\tCreate speedwagon\n");
phb = pci_alloc_pci_controller("PHB SW",phb_type_speedwagon);
if (phb == NULL) return NULL;
if (naca->platform == PLATFORM_PSERIES) {
phb->cfg_addr = (volatile unsigned long *)
ioremap(reg_struct.address + 0x140, PAGE_SIZE);
phb->cfg_data = (char*)(phb->cfg_addr - 0x02); /* minus is correct */
phb->phb_regs = (volatile unsigned long *)
ioremap(reg_struct.address, PAGE_SIZE);
/* Speedwagon's register file is 1 MB in size. */
phb->chip_regs = ioremap(reg_struct.address & ~(0xfffffUL),
0x100000);
PPCDBG(PPCDBG_PHBINIT, "\tmapping chip_regs from 0x%lx -> 0x%lx\n",
reg_struct.address & 0xfffff, phb->chip_regs);
} else {
phb->cfg_addr = NULL;
phb->cfg_data = NULL;
phb->phb_regs = NULL;
phb->chip_regs = NULL;
}
phb = pci_alloc_pci_controller("PHB SW", phb_type_speedwagon);
if (phb == NULL)
return NULL;
phb->local_number = ((reg_struct.address >> 12) & 0xf) - 0x8;
/***************************************************************
* Trying to build a known just gets the code in trouble.
***************************************************************/
......
arch/ppc64/kernel/pci.c
View file @ 38c647be
/*
*
*
* Port for PPC64 David Engebretsen, IBM Corp.
* Contains common pci routines for ppc64 platform, pSeries and iSeries brands.
*
......@@ -128,7 +126,6 @@ void pcibios_fixup_pbus_ranges(struct pci_bus *pbus,
{
}
void
pcibios_update_resource(struct pci_dev *dev, struct resource *root,
struct resource *res, int resource)
......@@ -200,7 +197,6 @@ pcibios_align_resource(void *data, struct resource *res,
}
}
/*
* Handle resources of PCI devices. If the world were perfect, we could
* just allocate all the resource regions and do nothing more. It isn't.
......@@ -333,64 +329,27 @@ pcibios_assign_resources(void)
if (!class || class == PCI_CLASS_BRIDGE_HOST)
continue;
for(idx=0; idx<6; idx++) {
for (idx = 0; idx < 6; idx++) {
r = &dev->resource[idx];
/*
* Don't touch IDE controllers and I/O ports of video cards!
*/
if ((class == PCI_CLASS_STORAGE_IDE && idx < 4) ||
(class == PCI_CLASS_DISPLAY_VGA && (r->flags & IORESOURCE_IO)))
continue;
/*
* We shall assign a new address to this resource, either because
* the BIOS forgot to do so or because we have decided the old
* address was unusable for some reason.
* We shall assign a new address to this resource,
* either because the BIOS (sic) forgot to do so
* or because we have decided the old address was
* unusable for some reason.
*/
if (!r->start && r->end && ppc_md.pcibios_enable_device_hook &&
!ppc_md.pcibios_enable_device_hook(dev, 1))
if (!r->start && r->end)
pci_assign_resource(dev, idx);
}
if (0) { /* don't assign ROMs */
#if 0 /* don't assign ROMs */
r = &dev->resource[PCI_ROM_RESOURCE];
r->end -= r->start;
r->start = 0;
if (r->end)
pci_assign_resource(dev, PCI_ROM_RESOURCE);
#endif
}
}
}
int
pcibios_enable_resources(struct pci_dev *dev)
{
u16 cmd, old_cmd;
int idx;
struct resource *r;
pci_read_config_word(dev, PCI_COMMAND, &cmd);
old_cmd = cmd;
for(idx=0; idx<6; idx++) {
r = &dev->resource[idx];
if (!r->start && r->end) {
printk(KERN_ERR "PCI: Device %s not available because of resource collisions\n", dev->slot_name);
return -EINVAL;
}
if (r->flags & IORESOURCE_IO)
cmd |= PCI_COMMAND_IO;
if (r->flags & IORESOURCE_MEM)
cmd |= PCI_COMMAND_MEMORY;
}
if (dev->resource[PCI_ROM_RESOURCE].start)
cmd |= PCI_COMMAND_MEMORY;
if (cmd != old_cmd) {
printk("PCI: Enabling device %s (%04x -> %04x)\n", dev->slot_name, old_cmd, cmd);
pci_write_config_word(dev, PCI_COMMAND, cmd);
}
return 0;
}
/*
......@@ -407,8 +366,10 @@ pci_alloc_pci_controller(char *model, enum phb_types controller_type)
return NULL;
}
memset(hose, 0, sizeof(struct pci_controller));
if(strlen(model) < 8) strcpy(hose->what,model);
else memcpy(hose->what,model,7);
if(strlen(model) < 8)
strcpy(hose->what,model);
else
memcpy(hose->what,model,7);
hose->type = controller_type;
hose->global_number = global_phb_number;
phbtab[global_phb_number++] = hose;
......@@ -418,29 +379,7 @@ pci_alloc_pci_controller(char *model, enum phb_types controller_type)
return hose;
}
/*
* This fixup is arch independent and probably should go somewhere else.
*/
void __init
pcibios_generic_fixup(void)
{
struct pci_dev *dev;
/* Fix miss-identified vendor AMD pcnet32 adapters. */
dev = NULL;
while ((dev = pci_find_device(PCI_VENDOR_ID_TRIDENT, PCI_DEVICE_ID_AMD_LANCE, dev)) != NULL &&
dev->class == (PCI_CLASS_NETWORK_ETHERNET << 8))
dev->vendor = PCI_VENDOR_ID_AMD;
}
/***********************************************************************
*
*
*
***********************************************************************/
void __init
static int __init
pcibios_init(void)
{
struct pci_controller *hose;
......@@ -456,7 +395,6 @@ pcibios_init(void)
printk("PCI: Probing PCI hardware\n");
PPCDBG(PPCDBG_BUSWALK,"PCI: Probing PCI hardware\n");
/* Scan all of the recorded PCI controllers. */
for (next_busno = 0, hose = hose_head; hose; hose = hose->next) {
hose->last_busno = 0xff;
......@@ -473,9 +411,6 @@ pcibios_init(void)
ppc_md.pcibios_fixup();
}
/* Generic fixups */
pcibios_generic_fixup();
/* Allocate and assign resources */
pcibios_allocate_bus_resources(&pci_root_buses);
pcibios_allocate_resources(0);
......@@ -577,20 +512,22 @@ char __init *pcibios_setup(char *str)
return str;
}
int pcibios_enable_device(struct pci_dev *dev)
int pcibios_enable_device(struct pci_dev *dev, int mask)
{
u16 cmd, old_cmd;
int idx;
struct resource *r;
PPCDBG(PPCDBG_BUSWALK,"PCI: %s for device %s \n",__FUNCTION__,dev->slot_name);
if (ppc_md.pcibios_enable_device_hook)
if (ppc_md.pcibios_enable_device_hook(dev, 0))
return -EINVAL;
PPCDBG(PPCDBG_BUSWALK,"PCI: %s for device %s \n", __FUNCTION__,
dev->slot_name);
pci_read_config_word(dev, PCI_COMMAND, &cmd);
old_cmd = cmd;
for (idx=0; idx<6; idx++) {
for (idx = 0; idx < 6; idx++) {
/* Only set up the requested stuff */
if (!(mask & (1<<idx)))
continue;
r = &dev->resource[idx];
if (!r->start && r->end) {
printk(KERN_ERR "PCI: Device %s not available because of resource collisions\n", dev->slot_name);
......@@ -604,7 +541,8 @@ int pcibios_enable_device(struct pci_dev *dev)
if (cmd != old_cmd) {
printk("PCI: Enabling device %s (%04x -> %04x)\n",
dev->slot_name, old_cmd, cmd);
PPCDBG(PPCDBG_BUSWALK,"PCI: Enabling device %s \n",dev->slot_name);
PPCDBG(PPCDBG_BUSWALK,"PCI: Enabling device %s \n",
dev->slot_name);
pci_write_config_word(dev, PCI_COMMAND, cmd);
}
return 0;
......@@ -986,12 +924,6 @@ void dumpPci_Controller(struct pci_controller* phb)
udbg_printf("\tpci_mem_offset= 0x%016LX\n", phb->pci_mem_offset);
udbg_printf("\tpci_io_offset = 0x%016LX\n", phb->pci_io_offset);
udbg_printf("\tcfg_addr = 0x%016LX\n", phb->cfg_addr);
udbg_printf("\tcfg_data = 0x%016LX\n", phb->cfg_data);
udbg_printf("\tphb_regs = 0x%016LX\n", phb->phb_regs);
udbg_printf("\tchip_regs = 0x%016LX\n", phb->chip_regs);
udbg_printf("\tResources\n");
dumpResources(&phb->io_resource);
if (phb->mem_resource_count > 0) dumpResources(&phb->mem_resources[0]);
......
arch/ppc64/kernel/pci_dma.c
View file @ 38c647be
......@@ -1438,69 +1438,6 @@ void pci_unmap_sg(struct pci_dev *pdev, struct scatterlist *sglist, int nelems,
}
#endif
/*
* phb_tce_table_init
*
* Function: Display TCE config registers. Could be easily changed
* to initialize the hardware to use TCEs.
*/
unsigned long phb_tce_table_init(struct pci_controller *phb) {
unsigned int r, cfg_rw, i;
unsigned long r64;
phandle node;
PPCDBG(PPCDBG_TCE, "phb_tce_table_init: start.\n");
node = ((struct device_node *)(phb->arch_data))->node;
PPCDBG(PPCDBG_TCEINIT, "\tphb = 0x%lx\n", phb);
PPCDBG(PPCDBG_TCEINIT, "\tphb->type = 0x%lx\n", phb->type);
PPCDBG(PPCDBG_TCEINIT, "\tphb->phb_regs = 0x%lx\n", phb->phb_regs);
PPCDBG(PPCDBG_TCEINIT, "\tphb->chip_regs = 0x%lx\n", phb->chip_regs);
PPCDBG(PPCDBG_TCEINIT, "\tphb: node = 0x%lx\n", node);
PPCDBG(PPCDBG_TCEINIT, "\tphb->arch_data = 0x%lx\n", phb->arch_data);
i = 0;
while(of_tce_table[i].node) {
if(of_tce_table[i].node == node) {
if(phb->type == phb_type_python) {
r = *(((unsigned int *)phb->phb_regs) + (0xf10>>2));
PPCDBG(PPCDBG_TCEINIT, "\tTAR(low) = 0x%x\n", r);
r = *(((unsigned int *)phb->phb_regs) + (0xf00>>2));
PPCDBG(PPCDBG_TCEINIT, "\tTAR(high) = 0x%x\n", r);
r = *(((unsigned int *)phb->phb_regs) + (0xfd0>>2));
PPCDBG(PPCDBG_TCEINIT, "\tPHB cfg(rw) = 0x%x\n", r);
break;
} else if(phb->type == phb_type_speedwagon) {
r64 = *(((unsigned long *)phb->chip_regs) +
(0x800>>3));
PPCDBG(PPCDBG_TCEINIT, "\tNCFG = 0x%lx\n", r64);
r64 = *(((unsigned long *)phb->chip_regs) +
(0x580>>3));
PPCDBG(PPCDBG_TCEINIT, "\tTAR0 = 0x%lx\n", r64);
r64 = *(((unsigned long *)phb->chip_regs) +
(0x588>>3));
PPCDBG(PPCDBG_TCEINIT, "\tTAR1 = 0x%lx\n", r64);
r64 = *(((unsigned long *)phb->chip_regs) +
(0x590>>3));
PPCDBG(PPCDBG_TCEINIT, "\tTAR2 = 0x%lx\n", r64);
r64 = *(((unsigned long *)phb->chip_regs) +
(0x598>>3));
PPCDBG(PPCDBG_TCEINIT, "\tTAR3 = 0x%lx\n", r64);
cfg_rw = *(((unsigned int *)phb->chip_regs) +
((0x160 +
(((phb->local_number)+8)<<12))>>2));
PPCDBG(PPCDBG_TCEINIT, "\tcfg_rw = 0x%x\n", cfg_rw);
}
}
i++;
}
PPCDBG(PPCDBG_TCEINIT, "phb_tce_table_init: done\n");
return(0);
}
/* These are called very early. */
void tce_init_pSeries(void)
{
......
arch/ppc64/kernel/signal.c
View file @ 38c647be
......@@ -159,11 +159,10 @@ long sys_rt_sigsuspend(sigset_t *unewset, size_t sigsetsize, int p3, int p4, int
}
}
long sys_sigaltstack(const stack_t *uss, stack_t *uoss)
long sys_sigaltstack(const stack_t *uss, stack_t *uoss, unsigned long r5,
unsigned long r6, unsigned long r7, unsigned long r8,
struct pt_regs *regs)
{
struct pt_regs *regs = (struct pt_regs *)&uss;
return do_sigaltstack(uss, uoss, regs->gpr[1]);
}
......@@ -250,7 +249,7 @@ int sys_rt_sigreturn(unsigned long r3, unsigned long r4, unsigned long r5,
goto badframe;
/* This function sets back the stack flags into
the current task structure. */
sys_sigaltstack(&st, NULL);
sys_sigaltstack(&st, NULL, 0, 0, 0, 0, regs);
return regs->result;
......
arch/ppc64/kernel/signal32.c
View file @ 38c647be
......@@ -298,7 +298,8 @@ long sys32_sigreturn(unsigned long r3, unsigned long r4, unsigned long r5,
regs->dsisr = 0;
regs->result = (u64)(saved_regs[PT_RESULT]) & 0xFFFFFFFF;
if (copy_from_user(current->thread.fpr, &sr->fp_regs, sizeof(sr->fp_regs)))
if (copy_from_user(current->thread.fpr, &sr->fp_regs,
sizeof(sr->fp_regs)))
goto badframe;
ret = regs->result;
......@@ -392,7 +393,6 @@ static void setup_frame32(struct pt_regs *regs, struct sigregs32 *frame,
return;
badframe:
udbg_printf("setup_frame32 - badframe in setup_frame, regs=%p frame=%p newsp=%lx\n", regs, frame, newsp); PPCDBG_ENTER_DEBUGGER();
#if DEBUG_SIG
printk("badframe in setup_frame32, regs=%p frame=%p newsp=%lx\n",
regs, frame, newsp);
......@@ -421,7 +421,6 @@ static void setup_frame32(struct pt_regs *regs, struct sigregs32 *frame,
* siginfo32to64
*/
/*
* This code executes after the rt signal handler in 32 bit mode has
* completed and returned
......@@ -438,6 +437,7 @@ long sys32_rt_sigreturn(unsigned long r3, unsigned long r4, unsigned long r5,
sigset_t set;
stack_t st;
int i;
mm_segment_t old_fs;
/* Adjust the inputted reg1 to point to the first rt signal frame */
rt_sf = (struct rt_sigframe_32 *)(regs->gpr[1] + __SIGNAL_FRAMESIZE32);
......@@ -509,6 +509,16 @@ long sys32_rt_sigreturn(unsigned long r3, unsigned long r4, unsigned long r5,
regs->dar = 0;
regs->dsisr = 0;
regs->result = (u64)(saved_regs[PT_RESULT]) & 0xFFFFFFFF;
if (copy_from_user(current->thread.fpr, &sr->fp_regs,
sizeof(sr->fp_regs)))
goto badframe;
/* This function sets back the stack flags into
the current task structure. */
old_fs = get_fs();
set_fs(KERNEL_DS);
do_sigaltstack(&st, NULL, regs->gpr[1]);
set_fs(old_fs);
ret = regs->result;
return ret;
......@@ -933,7 +943,6 @@ static void setup_rt_frame32(struct pt_regs *regs, struct sigregs32 *frame,
return;
badframe:
udbg_printf("setup_frame32 - badframe in setup_frame, regs=%p frame=%p newsp=%lx\n", regs, frame, newsp); PPCDBG_ENTER_DEBUGGER();
#if DEBUG_SIG
printk("badframe in setup_frame32, regs=%p frame=%p newsp=%lx\n",
regs, frame, newsp);
......
arch/ppc64/kernel/stab.c
View file @ 38c647be
......@@ -303,11 +303,13 @@ unsigned long ppc64_stab_preload = 1;
*/
static void preload_stab(struct task_struct *tsk, struct mm_struct *mm)
{
if (ppc64_preload_all_segments && test_tsk_thread_flag(tsk, TIF_32BIT)) {
if (ppc64_preload_all_segments &&
test_tsk_thread_flag(tsk, TIF_32BIT)) {
unsigned long esid, vsid;
for (esid = 0; esid < 16; esid++) {
vsid = get_vsid(mm->context, esid << SID_SHIFT);
unsigned long ea = esid << SID_SHIFT;
vsid = get_vsid(mm->context, ea);
__ste_allocate(esid, vsid, 0);
}
} else {
......@@ -318,15 +320,17 @@ static void preload_stab(struct task_struct *tsk, struct mm_struct *mm)
unsigned long vsid;
if (pc) {
if (REGION_ID(pc) >= KERNEL_REGION_ID)
BUG();
if (!IS_VALID_EA(pc) ||
(REGION_ID(pc) >= KERNEL_REGION_ID))
return;
vsid = get_vsid(mm->context, pc);
__ste_allocate(GET_ESID(pc), vsid, 0);
}
if (stack && (pc_segment != stack_segment)) {
if (REGION_ID(stack) >= KERNEL_REGION_ID)
BUG();
if (!IS_VALID_EA(stack) ||
(REGION_ID(stack) >= KERNEL_REGION_ID))
return;
vsid = get_vsid(mm->context, stack);
__ste_allocate(GET_ESID(stack), vsid, 0);
}
......
arch/ppc64/mm/Makefile
View file @ 38c647be
......@@ -12,5 +12,6 @@ EXTRA_CFLAGS = -mno-minimal-toc
O_TARGET := mm.o
obj-y := fault.o init.o extable.o imalloc.o
obj-$(CONFIG_DISCONTIGMEM) += numa.o
include $(TOPDIR)/Rules.make
arch/ppc64/mm/numa.c 0 → 100644
View file @ 38c647be
/*
* NUMA support
*
* Copyright (C) 2002 Anton Blanchard <anton@au.ibm.com>, IBM
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <linux/threads.h>
#include <linux/bootmem.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/mmzone.h>
#include <asm/lmb.h>
#if 0
#define dbg(format, arg...) udbg_printf(format, arg)
#else
#define dbg(format, arg...)
#endif
int numa_cpu_lookup_table[NR_CPUS] = { [ 0 ... (NR_CPUS - 1)] = -1};
int numa_memory_lookup_table[MAX_MEMORY >> MEMORY_INCREMENT_SHIFT] =
{ [ 0 ... ((MAX_MEMORY >> MEMORY_INCREMENT_SHIFT) - 1)] = -1};
int numa_node_exists[MAX_NUMNODES];
struct pglist_data node_data[MAX_NUMNODES];
bootmem_data_t plat_node_bdata[MAX_NUMNODES];
static int __init parse_numa_properties(void)
{
/* XXX implement */
return -1;
}
void __init do_init_bootmem(void)
{
int nid;
min_low_pfn = 0;
max_low_pfn = lmb_end_of_DRAM() >> PAGE_SHIFT;
if (parse_numa_properties())
BUG();
for (nid = 0; nid < MAX_NUMNODES; nid++) {
unsigned long start, end;
unsigned long start_paddr, end_paddr;
int i;
unsigned long bootmem_paddr;
unsigned long bootmap_size;
if (!numa_node_exists[nid])
continue;
/* Find start and end of this zone */
start = 0;
while (numa_memory_lookup_table[start] != nid)
start++;
end = (MAX_MEMORY >> MEMORY_INCREMENT_SHIFT) - 1;
while (numa_memory_lookup_table[end] != nid)
end--;
end++;
start_paddr = start << MEMORY_INCREMENT_SHIFT;
end_paddr = end << MEMORY_INCREMENT_SHIFT;
dbg("node %d\n", nid);
dbg("start_paddr = %lx\n", start_paddr);
dbg("end_paddr = %lx\n", end_paddr);
NODE_DATA(nid)->bdata = &plat_node_bdata[nid];
/* XXX FIXME: first bitmap hardwired to 1G */
if (start_paddr == 0)
bootmem_paddr = (1 << 30);
else
bootmem_paddr = start_paddr;
dbg("bootmap_paddr = %lx\n", bootmem_paddr);
bootmap_size = init_bootmem_node(NODE_DATA(nid),
bootmem_paddr >> PAGE_SHIFT,
start_paddr >> PAGE_SHIFT,
end_paddr >> PAGE_SHIFT);
dbg("bootmap_size = %lx\n", bootmap_size);
for (i = 0; i < lmb.memory.cnt; i++) {
unsigned long physbase, size;
unsigned long type = lmb.memory.region[i].type;
if (type != LMB_MEMORY_AREA)
continue;
physbase = lmb.memory.region[i].physbase;
size = lmb.memory.region[i].size;
if (physbase < end_paddr &&
(physbase+size) > start_paddr) {
/* overlaps */
if (physbase < start_paddr) {
size -= start_paddr - physbase;
physbase = start_paddr;
}
if (size > end_paddr - start_paddr)
size = end_paddr - start_paddr;
dbg("free_bootmem %lx %lx\n", physbase, size);
free_bootmem_node(NODE_DATA(nid), physbase,
size);
}
}
for (i = 0; i < lmb.reserved.cnt; i++) {
unsigned long physbase = lmb.reserved.region[i].physbase;
unsigned long size = lmb.reserved.region[i].size;
if (physbase < end_paddr &&
(physbase+size) > start_paddr) {
/* overlaps */
if (physbase < start_paddr) {
size -= start_paddr - physbase;
physbase = start_paddr;
}
if (size > end_paddr - start_paddr)
size = end_paddr - start_paddr;
dbg("reserve_bootmem %lx %lx\n", physbase,
size);
reserve_bootmem_node(NODE_DATA(nid), physbase,
size);
}
}
dbg("reserve_bootmem %lx %lx\n", bootmem_paddr, bootmap_size);
reserve_bootmem_node(NODE_DATA(nid), bootmem_paddr,
bootmap_size);
}
}
void __init paging_init(void)
{
unsigned long zones_size[MAX_NR_ZONES];
int i, nid;
for (i = 1; i < MAX_NR_ZONES; i++)
zones_size[i] = 0;
for (nid = 0; nid < MAX_NUMNODES; nid++) {
unsigned long start_pfn;
unsigned long end_pfn;
if (!numa_node_exists[nid])
continue;
start_pfn = plat_node_bdata[nid].node_boot_start >> PAGE_SHIFT;
end_pfn = plat_node_bdata[nid].node_low_pfn;
zones_size[ZONE_DMA] = end_pfn - start_pfn;
dbg("free_area_init node %d %lx %lx\n", nid, zones_size,
start_pfn);
free_area_init_node(nid, NODE_DATA(nid), NULL, zones_size,
start_pfn, NULL);
}
}
include/asm-ppc64/machdep.h
View file @ 38c647be
#ifdef __KERNEL__
#ifndef _PPC_MACHDEP_H
#define _PPC_MACHDEP_H
#ifndef _PPC64_MACHDEP_H
#define _PPC64_MACHDEP_H
/*
* This program is free software; you can redistribute it and/or
......@@ -14,7 +14,6 @@
struct pt_regs;
struct pci_bus;
struct pci_dev;
struct device_node;
struct TceTable;
struct rtc_time;
......@@ -70,39 +69,36 @@ struct machdep_calls {
void (*setup_residual)(struct seq_file *m, int cpu_id);
/* Optional, may be NULL. */
void (*get_cpuinfo)(struct seq_file *m);
/* Optional, may be NULL. */
unsigned int (*irq_cannonicalize)(unsigned int irq);
void (*init_IRQ)(void);
void (*init_ras_IRQ)(void);
int (*get_irq)(struct pt_regs *);
/* A general init function, called by ppc_init in init/main.c.
May be NULL. */
/* Optional, may be NULL. */
void (*init)(void);
void (*restart)(char *cmd);
void (*power_off)(void);
void (*halt)(void);
long (*time_init)(void); /* Optional, may be NULL */
int (*set_rtc_time)(struct rtc_time *);
void (*get_rtc_time)(struct rtc_time *);
void (*get_boot_time)(struct rtc_time *);
void (*calibrate_decr)(void);
void (*progress)(char *, unsigned short);
unsigned char (*nvram_read_val)(int addr);
void (*nvram_write_val)(int addr, unsigned char val);
/* Debug interface. Low level I/O to some terminal device */
void (*udbg_putc)(unsigned char c);
unsigned char (*udbg_getc)(void);
int (*udbg_getc_poll)(void);
/* PCI interfaces */
int (*pcibios_read_config)(struct device_node *dn, int where, int size, u32 *val);
int (*pcibios_write_config)(struct device_node *dn, int where, int size, u32 val);
int (*pcibios_read_config)(struct device_node *dn, int where, int size,
u32 *val);
int (*pcibios_write_config)(struct device_node *dn, int where,
int size, u32 val);
/* Called after scanning the bus, before allocating
* resources
......@@ -114,19 +110,6 @@ struct machdep_calls {
*/
void (*pcibios_fixup_bus)(struct pci_bus *);
/* Called when pci_enable_device() is called (initial=0) or
* when a device with no assigned resource is found (initial=1).
* Returns 0 to allow assignement/enabling of the device
*/
int (*pcibios_enable_device_hook)(struct pci_dev *, int initial);
void* (*pci_dev_io_base)(unsigned char bus, unsigned char devfn, int physical);
void* (*pci_dev_mem_base)(unsigned char bus, unsigned char devfn);
int (*pci_dev_root_bridge)(unsigned char bus, unsigned char devfn);
/* this is for modules, since _machine can be a define -- Cort */
int ppc_machine;
#ifdef CONFIG_SMP
/* functions for dealing with other cpus */
struct smp_ops_t smp_ops;
......@@ -136,7 +119,5 @@ struct machdep_calls {
extern struct machdep_calls ppc_md;
extern char cmd_line[512];
extern void setup_pci_ptrs(void);
#endif /* _PPC_MACHDEP_H */
#endif /* _PPC64_MACHDEP_H */
#endif /* __KERNEL__ */
include/asm-ppc64/mmzone.h
View file @ 38c647be
......@@ -11,7 +11,7 @@
#ifdef CONFIG_DISCONTIGMEM
extern struct pglist_data *node_data[];
extern struct pglist_data node_data[];
/*
* Following are specific to this numa platform.
......@@ -27,7 +27,7 @@ extern int numa_memory_lookup_table[];
#define MEMORY_INCREMENT_SHIFT 28
#define MEMORY_INCREMENT (1UL << MEMORY_INCREMENT_SHIFT)
#undef DEBUG_NUMA
#define DEBUG_NUMA
static inline int pa_to_nid(unsigned long pa)
{
......@@ -48,9 +48,14 @@ static inline int pa_to_nid(unsigned long pa)
#define pfn_to_nid(pfn) pa_to_nid((pfn) << PAGE_SHIFT)
#define node_startnr(nid) (node_data[nid]->node_start_mapnr)
#define node_size(nid) (node_data[nid]->node_size)
#define node_localnr(pfn, nid) ((pfn) - node_data[nid]->node_start_pfn)
/*
* Return a pointer to the node data for node n.
*/
#define NODE_DATA(nid) (&node_data[nid])
#define node_startnr(nid) (NODE_DATA(nid)->node_start_mapnr)
#define node_size(nid) (NODE_DATA(nid)->node_size)
#define node_localnr(pfn, nid) ((pfn) - NODE_DATA(nid)->node_start_pfn)
#ifdef CONFIG_NUMA
......@@ -80,11 +85,6 @@ static inline int __cpu_to_node(int cpu)
*/
#define kvaddr_to_nid(kaddr) pa_to_nid(__pa(kaddr))
/*
* Return a pointer to the node data for node n.
*/
#define NODE_DATA(nid) (node_data[nid])
#define node_mem_map(nid) (NODE_DATA(nid)->node_mem_map)
#define node_start_pfn(nid) (NODE_DATA(nid)->node_start_pfn)
......
include/asm-ppc64/pci-bridge.h
View file @ 38c647be
......@@ -57,10 +57,6 @@ struct pci_controller {
unsigned long pci_io_offset;
struct pci_ops *ops;
volatile unsigned long *cfg_addr;
volatile unsigned char *cfg_data;
volatile unsigned long *phb_regs;
volatile unsigned long *chip_regs;
/* Currently, we limit ourselves to 1 IO range and 3 mem
* ranges since the common pci_bus structure can't handle more
......@@ -70,27 +66,11 @@ struct pci_controller {
int mem_resource_count;
int global_number;
int local_number;
int system_bus_number;
unsigned long buid;
unsigned long dma_window_base_cur;
unsigned long dma_window_size;
};
/* This version handles the new Uni-N host bridge, the iobase is now
* a per-device thing. I also added the memory base so PReP can
* be fixed to return 0xc0000000 (I didn't actually implement it)
*
* pci_dev_io_base() returns either a virtual (ioremap'ed) address or
* a physical address. In-kernel clients will use logical while the
* sys_pciconfig_iobase syscall returns a physical one to userland.
*/
void *pci_dev_io_base(unsigned char bus, unsigned char devfn, int physical);
void *pci_dev_mem_base(unsigned char bus, unsigned char devfn);
/* Returns the root-bridge number (Uni-N number) of a device */
int pci_dev_root_bridge(unsigned char bus, unsigned char devfn);
/*
* pci_device_loc returns the bus number and device/function number
* for a device on a PCI bus, given its device_node struct.
......@@ -99,16 +79,5 @@ int pci_dev_root_bridge(unsigned char bus, unsigned char devfn);
int pci_device_loc(struct device_node *dev, unsigned char *bus_ptr,
unsigned char *devfn_ptr);
struct bridge_data {
volatile unsigned int *cfg_addr;
volatile unsigned char *cfg_data;
void *io_base; /* virtual */
unsigned long io_base_phys;
int bus_number;
int max_bus;
struct bridge_data *next;
struct device_node *node;
};
#endif
#endif /* __KERNEL__ */
include/asm-ppc64/semaphore.h
View file @ 38c647be
......@@ -3,7 +3,7 @@
/*
* Remove spinlock-based RW semaphores; RW semaphore definitions are
* now in rwsem.h and we use the the generic lib/rwsem.c implementation.
* now in rwsem.h and we use the generic lib/rwsem.c implementation.
* Rework semaphores to use atomic_dec_if_positive.
* -- Paul Mackerras (paulus@samba.org)
*/
......
include/asm-ppc64/unistd.h
View file @ 38c647be
......@@ -241,6 +241,9 @@
#define __NR_io_getevents 229
#define __NR_io_submit 230
#define __NR_io_cancel 231
#define __NR_alloc_hugepages 232
#define __NR_free_hugepages 233
#define __NR_exit_group 234
#define __NR(n) #n
......
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