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Commit 3c586656 authored by Christoph Hellwig's avatar Christoph Hellwig Committed by Martin K. Petersen
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mpt2sas: Use mpi headers from mpt3sas 

Use a single set of the hardware description headers instead of having
them in the source tree twice.
Signed-off-by: default avatarChristoph Hellwig <hch@lst.de>
Signed-off-by: default avatarSreekanth Reddy <sreekanth.reddy@avagotech.com>
Reviewed-by: default avatarHannes Reinecke <hare@suse.de>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent 2a188cb4
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drivers/scsi/mpt2sas/Makefile
View file @ 3c586656
# mpt2sas makefile
# share the official mpi headers from the mpt3sas driver
ccflags-y += -I$(src)/../mpt3sas
obj-$(CONFIG_SCSI_MPT2SAS) += mpt2sas.o
mpt2sas-y += mpt2sas_base.o \
mpt2sas_config.o \
......
drivers/scsi/mpt2sas/mpi/mpi2.h deleted 100644 → 0
View file @ 2a188cb4
/*
* Copyright (c) 2000-2014 LSI Corporation.
*
*
* Name: mpi2.h
* Title: MPI Message independent structures and definitions
* including System Interface Register Set and
* scatter/gather formats.
* Creation Date: June 21, 2006
*
* mpi2.h Version: 02.00.35
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 06-04-07 02.00.01 Bumped MPI2_HEADER_VERSION_UNIT.
* 06-26-07 02.00.02 Bumped MPI2_HEADER_VERSION_UNIT.
* 08-31-07 02.00.03 Bumped MPI2_HEADER_VERSION_UNIT.
* Moved ReplyPostHostIndex register to offset 0x6C of the
* MPI2_SYSTEM_INTERFACE_REGS and modified the define for
* MPI2_REPLY_POST_HOST_INDEX_OFFSET.
* Added union of request descriptors.
* Added union of reply descriptors.
* 10-31-07 02.00.04 Bumped MPI2_HEADER_VERSION_UNIT.
* Added define for MPI2_VERSION_02_00.
* Fixed the size of the FunctionDependent5 field in the
* MPI2_DEFAULT_REPLY structure.
* 12-18-07 02.00.05 Bumped MPI2_HEADER_VERSION_UNIT.
* Removed the MPI-defined Fault Codes and extended the
* product specific codes up to 0xEFFF.
* Added a sixth key value for the WriteSequence register
* and changed the flush value to 0x0.
* Added message function codes for Diagnostic Buffer Post
* and Diagnsotic Release.
* New IOCStatus define: MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED
* Moved MPI2_VERSION_UNION from mpi2_ioc.h.
* 02-29-08 02.00.06 Bumped MPI2_HEADER_VERSION_UNIT.
* 03-03-08 02.00.07 Bumped MPI2_HEADER_VERSION_UNIT.
* 05-21-08 02.00.08 Bumped MPI2_HEADER_VERSION_UNIT.
* Added #defines for marking a reply descriptor as unused.
* 06-27-08 02.00.09 Bumped MPI2_HEADER_VERSION_UNIT.
* 10-02-08 02.00.10 Bumped MPI2_HEADER_VERSION_UNIT.
* Moved LUN field defines from mpi2_init.h.
* 01-19-09 02.00.11 Bumped MPI2_HEADER_VERSION_UNIT.
* 05-06-09 02.00.12 Bumped MPI2_HEADER_VERSION_UNIT.
* In all request and reply descriptors, replaced VF_ID
* field with MSIxIndex field.
* Removed DevHandle field from
* MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR and made those
* bytes reserved.
* Added RAID Accelerator functionality.
* 07-30-09 02.00.13 Bumped MPI2_HEADER_VERSION_UNIT.
* 10-28-09 02.00.14 Bumped MPI2_HEADER_VERSION_UNIT.
* Added MSI-x index mask and shift for Reply Post Host
* Index register.
* Added function code for Host Based Discovery Action.
* 02-10-10 02.00.15 Bumped MPI2_HEADER_VERSION_UNIT.
* Added define for MPI2_FUNCTION_PWR_MGMT_CONTROL.
* Added defines for product-specific range of message
* function codes, 0xF0 to 0xFF.
* 05-12-10 02.00.16 Bumped MPI2_HEADER_VERSION_UNIT.
* Added alternative defines for the SGE Direction bit.
* 08-11-10 02.00.17 Bumped MPI2_HEADER_VERSION_UNIT.
* 11-10-10 02.00.18 Bumped MPI2_HEADER_VERSION_UNIT.
* Added MPI2_IEEE_SGE_FLAGS_SYSTEMPLBCPI_ADDR define.
* 02-23-11 02.00.19 Bumped MPI2_HEADER_VERSION_UNIT.
* Added MPI2_FUNCTION_SEND_HOST_MESSAGE.
* 03-09-11 02.00.20 Bumped MPI2_HEADER_VERSION_UNIT.
* 05-25-11 02.00.21 Bumped MPI2_HEADER_VERSION_UNIT.
* 08-24-11 02.00.22 Bumped MPI2_HEADER_VERSION_UNIT.
* 11-18-11 02.00.23 Bumped MPI2_HEADER_VERSION_UNIT.
* 02-06-12 02.00.24 Bumped MPI2_HEADER_VERSION_UNIT.
* 03-29-12 02.00.25 Bumped MPI2_HEADER_VERSION_UNIT.
* Added Hard Reset delay timings.
* 07-10-12 02.00.26 Bumped MPI2_HEADER_VERSION_UNIT.
* 07-26-12 02.00.27 Bumped MPI2_HEADER_VERSION_UNIT.
* 11-27-12 02.00.28 Bumped MPI2_HEADER_VERSION_UNIT.
* 12-20-12 02.00.29 Bumped MPI2_HEADER_VERSION_UNIT.
* Added MPI25_SUP_REPLY_POST_HOST_INDEX_OFFSET.
* 04-09-13 02.00.30 Bumped MPI2_HEADER_VERSION_UNIT.
* 04-17-13 02.00.31 Bumped MPI2_HEADER_VERSION_UNIT.
* 08-19-13 02.00.32 Bumped MPI2_HEADER_VERSION_UNIT.
* 12-05-13 02.00.33 Bumped MPI2_HEADER_VERSION_UNIT.
* 01-08-14 02.00.34 Bumped MPI2_HEADER_VERSION_UNIT.
* 06-13-14 02.00.35 Bumped MPI2_HEADER_VERSION_UNIT.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_H
#define MPI2_H
/*****************************************************************************
*
* MPI Version Definitions
*
*****************************************************************************/
#define MPI2_VERSION_MAJOR (0x02)
#define MPI2_VERSION_MINOR (0x00)
#define MPI2_VERSION_MAJOR_MASK (0xFF00)
#define MPI2_VERSION_MAJOR_SHIFT (8)
#define MPI2_VERSION_MINOR_MASK (0x00FF)
#define MPI2_VERSION_MINOR_SHIFT (0)
#define MPI2_VERSION ((MPI2_VERSION_MAJOR << MPI2_VERSION_MAJOR_SHIFT) | \
MPI2_VERSION_MINOR)
#define MPI2_VERSION_02_00 (0x0200)
/* versioning for this MPI header set */
#define MPI2_HEADER_VERSION_UNIT (0x23)
#define MPI2_HEADER_VERSION_DEV (0x00)
#define MPI2_HEADER_VERSION_UNIT_MASK (0xFF00)
#define MPI2_HEADER_VERSION_UNIT_SHIFT (8)
#define MPI2_HEADER_VERSION_DEV_MASK (0x00FF)
#define MPI2_HEADER_VERSION_DEV_SHIFT (0)
#define MPI2_HEADER_VERSION ((MPI2_HEADER_VERSION_UNIT << 8) | MPI2_HEADER_VERSION_DEV)
/*****************************************************************************
*
* IOC State Definitions
*
*****************************************************************************/
#define MPI2_IOC_STATE_RESET (0x00000000)
#define MPI2_IOC_STATE_READY (0x10000000)
#define MPI2_IOC_STATE_OPERATIONAL (0x20000000)
#define MPI2_IOC_STATE_FAULT (0x40000000)
#define MPI2_IOC_STATE_MASK (0xF0000000)
#define MPI2_IOC_STATE_SHIFT (28)
/* Fault state range for prodcut specific codes */
#define MPI2_FAULT_PRODUCT_SPECIFIC_MIN (0x0000)
#define MPI2_FAULT_PRODUCT_SPECIFIC_MAX (0xEFFF)
/*****************************************************************************
*
* System Interface Register Definitions
*
*****************************************************************************/
typedef volatile struct _MPI2_SYSTEM_INTERFACE_REGS
{
U32 Doorbell; /* 0x00 */
U32 WriteSequence; /* 0x04 */
U32 HostDiagnostic; /* 0x08 */
U32 Reserved1; /* 0x0C */
U32 DiagRWData; /* 0x10 */
U32 DiagRWAddressLow; /* 0x14 */
U32 DiagRWAddressHigh; /* 0x18 */
U32 Reserved2[5]; /* 0x1C */
U32 HostInterruptStatus; /* 0x30 */
U32 HostInterruptMask; /* 0x34 */
U32 DCRData; /* 0x38 */
U32 DCRAddress; /* 0x3C */
U32 Reserved3[2]; /* 0x40 */
U32 ReplyFreeHostIndex; /* 0x48 */
U32 Reserved4[8]; /* 0x4C */
U32 ReplyPostHostIndex; /* 0x6C */
U32 Reserved5; /* 0x70 */
U32 HCBSize; /* 0x74 */
U32 HCBAddressLow; /* 0x78 */
U32 HCBAddressHigh; /* 0x7C */
U32 Reserved6[16]; /* 0x80 */
U32 RequestDescriptorPostLow; /* 0xC0 */
U32 RequestDescriptorPostHigh; /* 0xC4 */
U32 Reserved7[14]; /* 0xC8 */
} MPI2_SYSTEM_INTERFACE_REGS, MPI2_POINTER PTR_MPI2_SYSTEM_INTERFACE_REGS,
Mpi2SystemInterfaceRegs_t, MPI2_POINTER pMpi2SystemInterfaceRegs_t;
/*
* Defines for working with the Doorbell register.
*/
#define MPI2_DOORBELL_OFFSET (0x00000000)
/* IOC --> System values */
#define MPI2_DOORBELL_USED (0x08000000)
#define MPI2_DOORBELL_WHO_INIT_MASK (0x07000000)
#define MPI2_DOORBELL_WHO_INIT_SHIFT (24)
#define MPI2_DOORBELL_FAULT_CODE_MASK (0x0000FFFF)
#define MPI2_DOORBELL_DATA_MASK (0x0000FFFF)
/* System --> IOC values */
#define MPI2_DOORBELL_FUNCTION_MASK (0xFF000000)
#define MPI2_DOORBELL_FUNCTION_SHIFT (24)
#define MPI2_DOORBELL_ADD_DWORDS_MASK (0x00FF0000)
#define MPI2_DOORBELL_ADD_DWORDS_SHIFT (16)
/*
* Defines for the WriteSequence register
*/
#define MPI2_WRITE_SEQUENCE_OFFSET (0x00000004)
#define MPI2_WRSEQ_KEY_VALUE_MASK (0x0000000F)
#define MPI2_WRSEQ_FLUSH_KEY_VALUE (0x0)
#define MPI2_WRSEQ_1ST_KEY_VALUE (0xF)
#define MPI2_WRSEQ_2ND_KEY_VALUE (0x4)
#define MPI2_WRSEQ_3RD_KEY_VALUE (0xB)
#define MPI2_WRSEQ_4TH_KEY_VALUE (0x2)
#define MPI2_WRSEQ_5TH_KEY_VALUE (0x7)
#define MPI2_WRSEQ_6TH_KEY_VALUE (0xD)
/*
* Defines for the HostDiagnostic register
*/
#define MPI2_HOST_DIAGNOSTIC_OFFSET (0x00000008)
#define MPI2_DIAG_BOOT_DEVICE_SELECT_MASK (0x00001800)
#define MPI2_DIAG_BOOT_DEVICE_SELECT_DEFAULT (0x00000000)
#define MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW (0x00000800)
#define MPI2_DIAG_CLEAR_FLASH_BAD_SIG (0x00000400)
#define MPI2_DIAG_FORCE_HCB_ON_RESET (0x00000200)
#define MPI2_DIAG_HCB_MODE (0x00000100)
#define MPI2_DIAG_DIAG_WRITE_ENABLE (0x00000080)
#define MPI2_DIAG_FLASH_BAD_SIG (0x00000040)
#define MPI2_DIAG_RESET_HISTORY (0x00000020)
#define MPI2_DIAG_DIAG_RW_ENABLE (0x00000010)
#define MPI2_DIAG_RESET_ADAPTER (0x00000004)
#define MPI2_DIAG_HOLD_IOC_RESET (0x00000002)
/*
* Offsets for DiagRWData and address
*/
#define MPI2_DIAG_RW_DATA_OFFSET (0x00000010)
#define MPI2_DIAG_RW_ADDRESS_LOW_OFFSET (0x00000014)
#define MPI2_DIAG_RW_ADDRESS_HIGH_OFFSET (0x00000018)
/*
* Defines for the HostInterruptStatus register
*/
#define MPI2_HOST_INTERRUPT_STATUS_OFFSET (0x00000030)
#define MPI2_HIS_SYS2IOC_DB_STATUS (0x80000000)
#define MPI2_HIS_IOP_DOORBELL_STATUS MPI2_HIS_SYS2IOC_DB_STATUS
#define MPI2_HIS_RESET_IRQ_STATUS (0x40000000)
#define MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT (0x00000008)
#define MPI2_HIS_IOC2SYS_DB_STATUS (0x00000001)
#define MPI2_HIS_DOORBELL_INTERRUPT MPI2_HIS_IOC2SYS_DB_STATUS
/*
* Defines for the HostInterruptMask register
*/
#define MPI2_HOST_INTERRUPT_MASK_OFFSET (0x00000034)
#define MPI2_HIM_RESET_IRQ_MASK (0x40000000)
#define MPI2_HIM_REPLY_INT_MASK (0x00000008)
#define MPI2_HIM_RIM MPI2_HIM_REPLY_INT_MASK
#define MPI2_HIM_IOC2SYS_DB_MASK (0x00000001)
#define MPI2_HIM_DIM MPI2_HIM_IOC2SYS_DB_MASK
/*
* Offsets for DCRData and address
*/
#define MPI2_DCR_DATA_OFFSET (0x00000038)
#define MPI2_DCR_ADDRESS_OFFSET (0x0000003C)
/*
* Offset for the Reply Free Queue
*/
#define MPI2_REPLY_FREE_HOST_INDEX_OFFSET (0x00000048)
/*
* Defines for the Reply Descriptor Post Queue
*/
#define MPI2_REPLY_POST_HOST_INDEX_OFFSET (0x0000006C)
#define MPI2_REPLY_POST_HOST_INDEX_MASK (0x00FFFFFF)
#define MPI2_RPHI_MSIX_INDEX_MASK (0xFF000000)
#define MPI2_RPHI_MSIX_INDEX_SHIFT (24)
#define MPI25_SUP_REPLY_POST_HOST_INDEX_OFFSET (0x0000030C) /* MPI v2.5 only */
/*
* Defines for the HCBSize and address
*/
#define MPI2_HCB_SIZE_OFFSET (0x00000074)
#define MPI2_HCB_SIZE_SIZE_MASK (0xFFFFF000)
#define MPI2_HCB_SIZE_HCB_ENABLE (0x00000001)
#define MPI2_HCB_ADDRESS_LOW_OFFSET (0x00000078)
#define MPI2_HCB_ADDRESS_HIGH_OFFSET (0x0000007C)
/*
* Offsets for the Request Queue
*/
#define MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET (0x000000C0)
#define MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET (0x000000C4)
/* Hard Reset delay timings */
#define MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC (50000)
#define MPI2_HARD_RESET_PCIE_RESET_READ_WINDOW_MICRO_SEC (255000)
#define MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC (256000)
/*****************************************************************************
*
* Message Descriptors
*
*****************************************************************************/
/* Request Descriptors */
/* Default Request Descriptor */
typedef struct _MPI2_DEFAULT_REQUEST_DESCRIPTOR
{
U8 RequestFlags; /* 0x00 */
U8 MSIxIndex; /* 0x01 */
U16 SMID; /* 0x02 */
U16 LMID; /* 0x04 */
U16 DescriptorTypeDependent; /* 0x06 */
} MPI2_DEFAULT_REQUEST_DESCRIPTOR,
MPI2_POINTER PTR_MPI2_DEFAULT_REQUEST_DESCRIPTOR,
Mpi2DefaultRequestDescriptor_t, MPI2_POINTER pMpi2DefaultRequestDescriptor_t;
/* defines for the RequestFlags field */
#define MPI2_REQ_DESCRIPT_FLAGS_TYPE_MASK (0x0E)
#define MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO (0x00)
#define MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET (0x02)
#define MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY (0x06)
#define MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE (0x08)
#define MPI2_REQ_DESCRIPT_FLAGS_RAID_ACCELERATOR (0x0A)
#define MPI2_REQ_DESCRIPT_FLAGS_IOC_FIFO_MARKER (0x01)
/* High Priority Request Descriptor */
typedef struct _MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR
{
U8 RequestFlags; /* 0x00 */
U8 MSIxIndex; /* 0x01 */
U16 SMID; /* 0x02 */
U16 LMID; /* 0x04 */
U16 Reserved1; /* 0x06 */
} MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR,
MPI2_POINTER PTR_MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR,
Mpi2HighPriorityRequestDescriptor_t,
MPI2_POINTER pMpi2HighPriorityRequestDescriptor_t;
/* SCSI IO Request Descriptor */
typedef struct _MPI2_SCSI_IO_REQUEST_DESCRIPTOR
{
U8 RequestFlags; /* 0x00 */
U8 MSIxIndex; /* 0x01 */
U16 SMID; /* 0x02 */
U16 LMID; /* 0x04 */
U16 DevHandle; /* 0x06 */
} MPI2_SCSI_IO_REQUEST_DESCRIPTOR,
MPI2_POINTER PTR_MPI2_SCSI_IO_REQUEST_DESCRIPTOR,
Mpi2SCSIIORequestDescriptor_t, MPI2_POINTER pMpi2SCSIIORequestDescriptor_t;
/* SCSI Target Request Descriptor */
typedef struct _MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR
{
U8 RequestFlags; /* 0x00 */
U8 MSIxIndex; /* 0x01 */
U16 SMID; /* 0x02 */
U16 LMID; /* 0x04 */
U16 IoIndex; /* 0x06 */
} MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR,
MPI2_POINTER PTR_MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR,
Mpi2SCSITargetRequestDescriptor_t,
MPI2_POINTER pMpi2SCSITargetRequestDescriptor_t;
/* RAID Accelerator Request Descriptor */
typedef struct _MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR {
U8 RequestFlags; /* 0x00 */
U8 MSIxIndex; /* 0x01 */
U16 SMID; /* 0x02 */
U16 LMID; /* 0x04 */
U16 Reserved; /* 0x06 */
} MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR,
MPI2_POINTER PTR_MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR,
Mpi2RAIDAcceleratorRequestDescriptor_t,
MPI2_POINTER pMpi2RAIDAcceleratorRequestDescriptor_t;
/* union of Request Descriptors */
typedef union _MPI2_REQUEST_DESCRIPTOR_UNION
{
MPI2_DEFAULT_REQUEST_DESCRIPTOR Default;
MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR HighPriority;
MPI2_SCSI_IO_REQUEST_DESCRIPTOR SCSIIO;
MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR SCSITarget;
MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR RAIDAccelerator;
U64 Words;
} MPI2_REQUEST_DESCRIPTOR_UNION, MPI2_POINTER PTR_MPI2_REQUEST_DESCRIPTOR_UNION,
Mpi2RequestDescriptorUnion_t, MPI2_POINTER pMpi2RequestDescriptorUnion_t;
/* Reply Descriptors */
/* Default Reply Descriptor */
typedef struct _MPI2_DEFAULT_REPLY_DESCRIPTOR
{
U8 ReplyFlags; /* 0x00 */
U8 MSIxIndex; /* 0x01 */
U16 DescriptorTypeDependent1; /* 0x02 */
U32 DescriptorTypeDependent2; /* 0x04 */
} MPI2_DEFAULT_REPLY_DESCRIPTOR, MPI2_POINTER PTR_MPI2_DEFAULT_REPLY_DESCRIPTOR,
Mpi2DefaultReplyDescriptor_t, MPI2_POINTER pMpi2DefaultReplyDescriptor_t;
/* defines for the ReplyFlags field */
#define MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK (0x0F)
#define MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS (0x00)
#define MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY (0x01)
#define MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS (0x02)
#define MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER (0x03)
#define MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS (0x05)
#define MPI2_RPY_DESCRIPT_FLAGS_UNUSED (0x0F)
/* values for marking a reply descriptor as unused */
#define MPI2_RPY_DESCRIPT_UNUSED_WORD0_MARK (0xFFFFFFFF)
#define MPI2_RPY_DESCRIPT_UNUSED_WORD1_MARK (0xFFFFFFFF)
/* Address Reply Descriptor */
typedef struct _MPI2_ADDRESS_REPLY_DESCRIPTOR
{
U8 ReplyFlags; /* 0x00 */
U8 MSIxIndex; /* 0x01 */
U16 SMID; /* 0x02 */
U32 ReplyFrameAddress; /* 0x04 */
} MPI2_ADDRESS_REPLY_DESCRIPTOR, MPI2_POINTER PTR_MPI2_ADDRESS_REPLY_DESCRIPTOR,
Mpi2AddressReplyDescriptor_t, MPI2_POINTER pMpi2AddressReplyDescriptor_t;
#define MPI2_ADDRESS_REPLY_SMID_INVALID (0x00)
/* SCSI IO Success Reply Descriptor */
typedef struct _MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR
{
U8 ReplyFlags; /* 0x00 */
U8 MSIxIndex; /* 0x01 */
U16 SMID; /* 0x02 */
U16 TaskTag; /* 0x04 */
U16 Reserved1; /* 0x06 */
} MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR,
MPI2_POINTER PTR_MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR,
Mpi2SCSIIOSuccessReplyDescriptor_t,
MPI2_POINTER pMpi2SCSIIOSuccessReplyDescriptor_t;
/* TargetAssist Success Reply Descriptor */
typedef struct _MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR
{
U8 ReplyFlags; /* 0x00 */
U8 MSIxIndex; /* 0x01 */
U16 SMID; /* 0x02 */
U8 SequenceNumber; /* 0x04 */
U8 Reserved1; /* 0x05 */
U16 IoIndex; /* 0x06 */
} MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR,
MPI2_POINTER PTR_MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR,
Mpi2TargetAssistSuccessReplyDescriptor_t,
MPI2_POINTER pMpi2TargetAssistSuccessReplyDescriptor_t;
/* Target Command Buffer Reply Descriptor */
typedef struct _MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR
{
U8 ReplyFlags; /* 0x00 */
U8 MSIxIndex; /* 0x01 */
U8 VP_ID; /* 0x02 */
U8 Flags; /* 0x03 */
U16 InitiatorDevHandle; /* 0x04 */
U16 IoIndex; /* 0x06 */
} MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR,
MPI2_POINTER PTR_MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR,
Mpi2TargetCommandBufferReplyDescriptor_t,
MPI2_POINTER pMpi2TargetCommandBufferReplyDescriptor_t;
/* defines for Flags field */
#define MPI2_RPY_DESCRIPT_TCB_FLAGS_PHYNUM_MASK (0x3F)
/* RAID Accelerator Success Reply Descriptor */
typedef struct _MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR {
U8 ReplyFlags; /* 0x00 */
U8 MSIxIndex; /* 0x01 */
U16 SMID; /* 0x02 */
U32 Reserved; /* 0x04 */
} MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR,
MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR,
Mpi2RAIDAcceleratorSuccessReplyDescriptor_t,
MPI2_POINTER pMpi2RAIDAcceleratorSuccessReplyDescriptor_t;
/* union of Reply Descriptors */
typedef union _MPI2_REPLY_DESCRIPTORS_UNION
{
MPI2_DEFAULT_REPLY_DESCRIPTOR Default;
MPI2_ADDRESS_REPLY_DESCRIPTOR AddressReply;
MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR SCSIIOSuccess;
MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR TargetAssistSuccess;
MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR TargetCommandBuffer;
MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR RAIDAcceleratorSuccess;
U64 Words;
} MPI2_REPLY_DESCRIPTORS_UNION, MPI2_POINTER PTR_MPI2_REPLY_DESCRIPTORS_UNION,
Mpi2ReplyDescriptorsUnion_t, MPI2_POINTER pMpi2ReplyDescriptorsUnion_t;
/*****************************************************************************
*
* Message Functions
*
*****************************************************************************/
#define MPI2_FUNCTION_SCSI_IO_REQUEST (0x00) /* SCSI IO */
#define MPI2_FUNCTION_SCSI_TASK_MGMT (0x01) /* SCSI Task Management */
#define MPI2_FUNCTION_IOC_INIT (0x02) /* IOC Init */
#define MPI2_FUNCTION_IOC_FACTS (0x03) /* IOC Facts */
#define MPI2_FUNCTION_CONFIG (0x04) /* Configuration */
#define MPI2_FUNCTION_PORT_FACTS (0x05) /* Port Facts */
#define MPI2_FUNCTION_PORT_ENABLE (0x06) /* Port Enable */
#define MPI2_FUNCTION_EVENT_NOTIFICATION (0x07) /* Event Notification */
#define MPI2_FUNCTION_EVENT_ACK (0x08) /* Event Acknowledge */
#define MPI2_FUNCTION_FW_DOWNLOAD (0x09) /* FW Download */
#define MPI2_FUNCTION_TARGET_ASSIST (0x0B) /* Target Assist */
#define MPI2_FUNCTION_TARGET_STATUS_SEND (0x0C) /* Target Status Send */
#define MPI2_FUNCTION_TARGET_MODE_ABORT (0x0D) /* Target Mode Abort */
#define MPI2_FUNCTION_FW_UPLOAD (0x12) /* FW Upload */
#define MPI2_FUNCTION_RAID_ACTION (0x15) /* RAID Action */
#define MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH (0x16) /* SCSI IO RAID Passthrough */
#define MPI2_FUNCTION_TOOLBOX (0x17) /* Toolbox */
#define MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR (0x18) /* SCSI Enclosure Processor */
#define MPI2_FUNCTION_SMP_PASSTHROUGH (0x1A) /* SMP Passthrough */
#define MPI2_FUNCTION_SAS_IO_UNIT_CONTROL (0x1B) /* SAS IO Unit Control */
#define MPI2_FUNCTION_SATA_PASSTHROUGH (0x1C) /* SATA Passthrough */
#define MPI2_FUNCTION_DIAG_BUFFER_POST (0x1D) /* Diagnostic Buffer Post */
#define MPI2_FUNCTION_DIAG_RELEASE (0x1E) /* Diagnostic Release */
#define MPI2_FUNCTION_TARGET_CMD_BUF_BASE_POST (0x24) /* Target Command Buffer Post Base */
#define MPI2_FUNCTION_TARGET_CMD_BUF_LIST_POST (0x25) /* Target Command Buffer Post List */
#define MPI2_FUNCTION_RAID_ACCELERATOR (0x2C) /* RAID Accelerator*/
/* Host Based Discovery Action */
#define MPI2_FUNCTION_HOST_BASED_DISCOVERY_ACTION (0x2F)
/* Power Management Control */
#define MPI2_FUNCTION_PWR_MGMT_CONTROL (0x30)
/* Send Host Message */
#define MPI2_FUNCTION_SEND_HOST_MESSAGE (0x31)
/* beginning of product-specific range */
#define MPI2_FUNCTION_MIN_PRODUCT_SPECIFIC (0xF0)
/* end of product-specific range */
#define MPI2_FUNCTION_MAX_PRODUCT_SPECIFIC (0xFF)
/* Doorbell functions */
#define MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET (0x40)
#define MPI2_FUNCTION_HANDSHAKE (0x42)
/*****************************************************************************
*
* IOC Status Values
*
*****************************************************************************/
/* mask for IOCStatus status value */
#define MPI2_IOCSTATUS_MASK (0x7FFF)
/****************************************************************************
* Common IOCStatus values for all replies
****************************************************************************/
#define MPI2_IOCSTATUS_SUCCESS (0x0000)
#define MPI2_IOCSTATUS_INVALID_FUNCTION (0x0001)
#define MPI2_IOCSTATUS_BUSY (0x0002)
#define MPI2_IOCSTATUS_INVALID_SGL (0x0003)
#define MPI2_IOCSTATUS_INTERNAL_ERROR (0x0004)
#define MPI2_IOCSTATUS_INVALID_VPID (0x0005)
#define MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES (0x0006)
#define MPI2_IOCSTATUS_INVALID_FIELD (0x0007)
#define MPI2_IOCSTATUS_INVALID_STATE (0x0008)
#define MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED (0x0009)
/****************************************************************************
* Config IOCStatus values
****************************************************************************/
#define MPI2_IOCSTATUS_CONFIG_INVALID_ACTION (0x0020)
#define MPI2_IOCSTATUS_CONFIG_INVALID_TYPE (0x0021)
#define MPI2_IOCSTATUS_CONFIG_INVALID_PAGE (0x0022)
#define MPI2_IOCSTATUS_CONFIG_INVALID_DATA (0x0023)
#define MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS (0x0024)
#define MPI2_IOCSTATUS_CONFIG_CANT_COMMIT (0x0025)
/****************************************************************************
* SCSI IO Reply
****************************************************************************/
#define MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR (0x0040)
#define MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE (0x0042)
#define MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE (0x0043)
#define MPI2_IOCSTATUS_SCSI_DATA_OVERRUN (0x0044)
#define MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN (0x0045)
#define MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR (0x0046)
#define MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR (0x0047)
#define MPI2_IOCSTATUS_SCSI_TASK_TERMINATED (0x0048)
#define MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH (0x0049)
#define MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED (0x004A)
#define MPI2_IOCSTATUS_SCSI_IOC_TERMINATED (0x004B)
#define MPI2_IOCSTATUS_SCSI_EXT_TERMINATED (0x004C)
/****************************************************************************
* For use by SCSI Initiator and SCSI Target end-to-end data protection
****************************************************************************/
#define MPI2_IOCSTATUS_EEDP_GUARD_ERROR (0x004D)
#define MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR (0x004E)
#define MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR (0x004F)
/****************************************************************************
* SCSI Target values
****************************************************************************/
#define MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX (0x0062)
#define MPI2_IOCSTATUS_TARGET_ABORTED (0x0063)
#define MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE (0x0064)
#define MPI2_IOCSTATUS_TARGET_NO_CONNECTION (0x0065)
#define MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH (0x006A)
#define MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR (0x006D)
#define MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA (0x006E)
#define MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT (0x006F)
#define MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT (0x0070)
#define MPI2_IOCSTATUS_TARGET_NAK_RECEIVED (0x0071)
/****************************************************************************
* Serial Attached SCSI values
****************************************************************************/
#define MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED (0x0090)
#define MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN (0x0091)
/****************************************************************************
* Diagnostic Buffer Post / Diagnostic Release values
****************************************************************************/
#define MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED (0x00A0)
/****************************************************************************
* RAID Accelerator values
****************************************************************************/
#define MPI2_IOCSTATUS_RAID_ACCEL_ERROR (0x00B0)
/****************************************************************************
* IOCStatus flag to indicate that log info is available
****************************************************************************/
#define MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE (0x8000)
/****************************************************************************
* IOCLogInfo Types
****************************************************************************/
#define MPI2_IOCLOGINFO_TYPE_MASK (0xF0000000)
#define MPI2_IOCLOGINFO_TYPE_SHIFT (28)
#define MPI2_IOCLOGINFO_TYPE_NONE (0x0)
#define MPI2_IOCLOGINFO_TYPE_SCSI (0x1)
#define MPI2_IOCLOGINFO_TYPE_FC (0x2)
#define MPI2_IOCLOGINFO_TYPE_SAS (0x3)
#define MPI2_IOCLOGINFO_TYPE_ISCSI (0x4)
#define MPI2_IOCLOGINFO_LOG_DATA_MASK (0x0FFFFFFF)
/*****************************************************************************
*
* Standard Message Structures
*
*****************************************************************************/
/****************************************************************************
* Request Message Header for all request messages
****************************************************************************/
typedef struct _MPI2_REQUEST_HEADER
{
U16 FunctionDependent1; /* 0x00 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 FunctionDependent2; /* 0x04 */
U8 FunctionDependent3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved1; /* 0x0A */
} MPI2_REQUEST_HEADER, MPI2_POINTER PTR_MPI2_REQUEST_HEADER,
MPI2RequestHeader_t, MPI2_POINTER pMPI2RequestHeader_t;
/****************************************************************************
* Default Reply
****************************************************************************/
typedef struct _MPI2_DEFAULT_REPLY
{
U16 FunctionDependent1; /* 0x00 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 FunctionDependent2; /* 0x04 */
U8 FunctionDependent3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved1; /* 0x0A */
U16 FunctionDependent5; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
} MPI2_DEFAULT_REPLY, MPI2_POINTER PTR_MPI2_DEFAULT_REPLY,
MPI2DefaultReply_t, MPI2_POINTER pMPI2DefaultReply_t;
/* common version structure/union used in messages and configuration pages */
typedef struct _MPI2_VERSION_STRUCT
{
U8 Dev; /* 0x00 */
U8 Unit; /* 0x01 */
U8 Minor; /* 0x02 */
U8 Major; /* 0x03 */
} MPI2_VERSION_STRUCT;
typedef union _MPI2_VERSION_UNION
{
MPI2_VERSION_STRUCT Struct;
U32 Word;
} MPI2_VERSION_UNION;
/* LUN field defines, common to many structures */
#define MPI2_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF)
#define MPI2_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000)
#define MPI2_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF)
#define MPI2_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000)
#define MPI2_LUN_LEVEL_1_WORD (0xFF00)
#define MPI2_LUN_LEVEL_1_DWORD (0x0000FF00)
/*****************************************************************************
*
* Fusion-MPT MPI Scatter Gather Elements
*
*****************************************************************************/
/****************************************************************************
* MPI Simple Element structures
****************************************************************************/
typedef struct _MPI2_SGE_SIMPLE32
{
U32 FlagsLength;
U32 Address;
} MPI2_SGE_SIMPLE32, MPI2_POINTER PTR_MPI2_SGE_SIMPLE32,
Mpi2SGESimple32_t, MPI2_POINTER pMpi2SGESimple32_t;
typedef struct _MPI2_SGE_SIMPLE64
{
U32 FlagsLength;
U64 Address;
} MPI2_SGE_SIMPLE64, MPI2_POINTER PTR_MPI2_SGE_SIMPLE64,
Mpi2SGESimple64_t, MPI2_POINTER pMpi2SGESimple64_t;
typedef struct _MPI2_SGE_SIMPLE_UNION
{
U32 FlagsLength;
union
{
U32 Address32;
U64 Address64;
} u;
} MPI2_SGE_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_SGE_SIMPLE_UNION,
Mpi2SGESimpleUnion_t, MPI2_POINTER pMpi2SGESimpleUnion_t;
/****************************************************************************
* MPI Chain Element structures
****************************************************************************/
typedef struct _MPI2_SGE_CHAIN32
{
U16 Length;
U8 NextChainOffset;
U8 Flags;
U32 Address;
} MPI2_SGE_CHAIN32, MPI2_POINTER PTR_MPI2_SGE_CHAIN32,
Mpi2SGEChain32_t, MPI2_POINTER pMpi2SGEChain32_t;
typedef struct _MPI2_SGE_CHAIN64
{
U16 Length;
U8 NextChainOffset;
U8 Flags;
U64 Address;
} MPI2_SGE_CHAIN64, MPI2_POINTER PTR_MPI2_SGE_CHAIN64,
Mpi2SGEChain64_t, MPI2_POINTER pMpi2SGEChain64_t;
typedef struct _MPI2_SGE_CHAIN_UNION
{
U16 Length;
U8 NextChainOffset;
U8 Flags;
union
{
U32 Address32;
U64 Address64;
} u;
} MPI2_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_SGE_CHAIN_UNION,
Mpi2SGEChainUnion_t, MPI2_POINTER pMpi2SGEChainUnion_t;
/****************************************************************************
* MPI Transaction Context Element structures
****************************************************************************/
typedef struct _MPI2_SGE_TRANSACTION32
{
U8 Reserved;
U8 ContextSize;
U8 DetailsLength;
U8 Flags;
U32 TransactionContext[1];
U32 TransactionDetails[1];
} MPI2_SGE_TRANSACTION32, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION32,
Mpi2SGETransaction32_t, MPI2_POINTER pMpi2SGETransaction32_t;
typedef struct _MPI2_SGE_TRANSACTION64
{
U8 Reserved;
U8 ContextSize;
U8 DetailsLength;
U8 Flags;
U32 TransactionContext[2];
U32 TransactionDetails[1];
} MPI2_SGE_TRANSACTION64, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION64,
Mpi2SGETransaction64_t, MPI2_POINTER pMpi2SGETransaction64_t;
typedef struct _MPI2_SGE_TRANSACTION96
{
U8 Reserved;
U8 ContextSize;
U8 DetailsLength;
U8 Flags;
U32 TransactionContext[3];
U32 TransactionDetails[1];
} MPI2_SGE_TRANSACTION96, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION96,
Mpi2SGETransaction96_t, MPI2_POINTER pMpi2SGETransaction96_t;
typedef struct _MPI2_SGE_TRANSACTION128
{
U8 Reserved;
U8 ContextSize;
U8 DetailsLength;
U8 Flags;
U32 TransactionContext[4];
U32 TransactionDetails[1];
} MPI2_SGE_TRANSACTION128, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION128,
Mpi2SGETransaction_t128, MPI2_POINTER pMpi2SGETransaction_t128;
typedef struct _MPI2_SGE_TRANSACTION_UNION
{
U8 Reserved;
U8 ContextSize;
U8 DetailsLength;
U8 Flags;
union
{
U32 TransactionContext32[1];
U32 TransactionContext64[2];
U32 TransactionContext96[3];
U32 TransactionContext128[4];
} u;
U32 TransactionDetails[1];
} MPI2_SGE_TRANSACTION_UNION, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION_UNION,
Mpi2SGETransactionUnion_t, MPI2_POINTER pMpi2SGETransactionUnion_t;
/****************************************************************************
* MPI SGE union for IO SGL's
****************************************************************************/
typedef struct _MPI2_MPI_SGE_IO_UNION
{
union
{
MPI2_SGE_SIMPLE_UNION Simple;
MPI2_SGE_CHAIN_UNION Chain;
} u;
} MPI2_MPI_SGE_IO_UNION, MPI2_POINTER PTR_MPI2_MPI_SGE_IO_UNION,
Mpi2MpiSGEIOUnion_t, MPI2_POINTER pMpi2MpiSGEIOUnion_t;
/****************************************************************************
* MPI SGE union for SGL's with Simple and Transaction elements
****************************************************************************/
typedef struct _MPI2_SGE_TRANS_SIMPLE_UNION
{
union
{
MPI2_SGE_SIMPLE_UNION Simple;
MPI2_SGE_TRANSACTION_UNION Transaction;
} u;
} MPI2_SGE_TRANS_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_SGE_TRANS_SIMPLE_UNION,
Mpi2SGETransSimpleUnion_t, MPI2_POINTER pMpi2SGETransSimpleUnion_t;
/****************************************************************************
* All MPI SGE types union
****************************************************************************/
typedef struct _MPI2_MPI_SGE_UNION
{
union
{
MPI2_SGE_SIMPLE_UNION Simple;
MPI2_SGE_CHAIN_UNION Chain;
MPI2_SGE_TRANSACTION_UNION Transaction;
} u;
} MPI2_MPI_SGE_UNION, MPI2_POINTER PTR_MPI2_MPI_SGE_UNION,
Mpi2MpiSgeUnion_t, MPI2_POINTER pMpi2MpiSgeUnion_t;
/****************************************************************************
* MPI SGE field definition and masks
****************************************************************************/
/* Flags field bit definitions */
#define MPI2_SGE_FLAGS_LAST_ELEMENT (0x80)
#define MPI2_SGE_FLAGS_END_OF_BUFFER (0x40)
#define MPI2_SGE_FLAGS_ELEMENT_TYPE_MASK (0x30)
#define MPI2_SGE_FLAGS_LOCAL_ADDRESS (0x08)
#define MPI2_SGE_FLAGS_DIRECTION (0x04)
#define MPI2_SGE_FLAGS_ADDRESS_SIZE (0x02)
#define MPI2_SGE_FLAGS_END_OF_LIST (0x01)
#define MPI2_SGE_FLAGS_SHIFT (24)
#define MPI2_SGE_LENGTH_MASK (0x00FFFFFF)
#define MPI2_SGE_CHAIN_LENGTH_MASK (0x0000FFFF)
/* Element Type */
#define MPI2_SGE_FLAGS_TRANSACTION_ELEMENT (0x00)
#define MPI2_SGE_FLAGS_SIMPLE_ELEMENT (0x10)
#define MPI2_SGE_FLAGS_CHAIN_ELEMENT (0x30)
#define MPI2_SGE_FLAGS_ELEMENT_MASK (0x30)
/* Address location */
#define MPI2_SGE_FLAGS_SYSTEM_ADDRESS (0x00)
/* Direction */
#define MPI2_SGE_FLAGS_IOC_TO_HOST (0x00)
#define MPI2_SGE_FLAGS_HOST_TO_IOC (0x04)
#define MPI2_SGE_FLAGS_DEST (MPI2_SGE_FLAGS_IOC_TO_HOST)
#define MPI2_SGE_FLAGS_SOURCE (MPI2_SGE_FLAGS_HOST_TO_IOC)
/* Address Size */
#define MPI2_SGE_FLAGS_32_BIT_ADDRESSING (0x00)
#define MPI2_SGE_FLAGS_64_BIT_ADDRESSING (0x02)
/* Context Size */
#define MPI2_SGE_FLAGS_32_BIT_CONTEXT (0x00)
#define MPI2_SGE_FLAGS_64_BIT_CONTEXT (0x02)
#define MPI2_SGE_FLAGS_96_BIT_CONTEXT (0x04)
#define MPI2_SGE_FLAGS_128_BIT_CONTEXT (0x06)
#define MPI2_SGE_CHAIN_OFFSET_MASK (0x00FF0000)
#define MPI2_SGE_CHAIN_OFFSET_SHIFT (16)
/****************************************************************************
* MPI SGE operation Macros
****************************************************************************/
/* SIMPLE FlagsLength manipulations... */
#define MPI2_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_SGE_FLAGS_SHIFT)
#define MPI2_SGE_GET_FLAGS(f) (((f) & ~MPI2_SGE_LENGTH_MASK) >> MPI2_SGE_FLAGS_SHIFT)
#define MPI2_SGE_LENGTH(f) ((f) & MPI2_SGE_LENGTH_MASK)
#define MPI2_SGE_CHAIN_LENGTH(f) ((f) & MPI2_SGE_CHAIN_LENGTH_MASK)
#define MPI2_SGE_SET_FLAGS_LENGTH(f,l) (MPI2_SGE_SET_FLAGS(f) | MPI2_SGE_LENGTH(l))
#define MPI2_pSGE_GET_FLAGS(psg) MPI2_SGE_GET_FLAGS((psg)->FlagsLength)
#define MPI2_pSGE_GET_LENGTH(psg) MPI2_SGE_LENGTH((psg)->FlagsLength)
#define MPI2_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI2_SGE_SET_FLAGS_LENGTH(f,l)
/* CAUTION - The following are READ-MODIFY-WRITE! */
#define MPI2_pSGE_SET_FLAGS(psg,f) (psg)->FlagsLength |= MPI2_SGE_SET_FLAGS(f)
#define MPI2_pSGE_SET_LENGTH(psg,l) (psg)->FlagsLength |= MPI2_SGE_LENGTH(l)
#define MPI2_GET_CHAIN_OFFSET(x) ((x & MPI2_SGE_CHAIN_OFFSET_MASK) >> MPI2_SGE_CHAIN_OFFSET_SHIFT)
/*****************************************************************************
*
* Fusion-MPT IEEE Scatter Gather Elements
*
*****************************************************************************/
/****************************************************************************
* IEEE Simple Element structures
****************************************************************************/
typedef struct _MPI2_IEEE_SGE_SIMPLE32
{
U32 Address;
U32 FlagsLength;
} MPI2_IEEE_SGE_SIMPLE32, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE32,
Mpi2IeeeSgeSimple32_t, MPI2_POINTER pMpi2IeeeSgeSimple32_t;
typedef struct _MPI2_IEEE_SGE_SIMPLE64
{
U64 Address;
U32 Length;
U16 Reserved1;
U8 Reserved2;
U8 Flags;
} MPI2_IEEE_SGE_SIMPLE64, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE64,
Mpi2IeeeSgeSimple64_t, MPI2_POINTER pMpi2IeeeSgeSimple64_t;
typedef union _MPI2_IEEE_SGE_SIMPLE_UNION
{
MPI2_IEEE_SGE_SIMPLE32 Simple32;
MPI2_IEEE_SGE_SIMPLE64 Simple64;
} MPI2_IEEE_SGE_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE_UNION,
Mpi2IeeeSgeSimpleUnion_t, MPI2_POINTER pMpi2IeeeSgeSimpleUnion_t;
/****************************************************************************
* IEEE Chain Element structures
****************************************************************************/
typedef MPI2_IEEE_SGE_SIMPLE32 MPI2_IEEE_SGE_CHAIN32;
typedef MPI2_IEEE_SGE_SIMPLE64 MPI2_IEEE_SGE_CHAIN64;
typedef union _MPI2_IEEE_SGE_CHAIN_UNION
{
MPI2_IEEE_SGE_CHAIN32 Chain32;
MPI2_IEEE_SGE_CHAIN64 Chain64;
} MPI2_IEEE_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_CHAIN_UNION,
Mpi2IeeeSgeChainUnion_t, MPI2_POINTER pMpi2IeeeSgeChainUnion_t;
/****************************************************************************
* All IEEE SGE types union
****************************************************************************/
typedef struct _MPI2_IEEE_SGE_UNION
{
union
{
MPI2_IEEE_SGE_SIMPLE_UNION Simple;
MPI2_IEEE_SGE_CHAIN_UNION Chain;
} u;
} MPI2_IEEE_SGE_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_UNION,
Mpi2IeeeSgeUnion_t, MPI2_POINTER pMpi2IeeeSgeUnion_t;
/****************************************************************************
* IEEE SGE field definitions and masks
****************************************************************************/
/* Flags field bit definitions */
#define MPI2_IEEE_SGE_FLAGS_ELEMENT_TYPE_MASK (0x80)
#define MPI2_IEEE32_SGE_FLAGS_SHIFT (24)
#define MPI2_IEEE32_SGE_LENGTH_MASK (0x00FFFFFF)
/* Element Type */
#define MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT (0x00)
#define MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT (0x80)
/* Data Location Address Space */
#define MPI2_IEEE_SGE_FLAGS_ADDR_MASK (0x03)
#define MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR (0x00)
/* IEEE Simple Element only */
#define MPI2_IEEE_SGE_FLAGS_IOCDDR_ADDR (0x01)
/* IEEE Simple Element only */
#define MPI2_IEEE_SGE_FLAGS_IOCPLB_ADDR (0x02)
#define MPI2_IEEE_SGE_FLAGS_IOCPLBNTA_ADDR (0x03)
/* IEEE Simple Element only */
#define MPI2_IEEE_SGE_FLAGS_SYSTEMPLBPCI_ADDR (0x03)
/* IEEE Chain Element only */
#define MPI2_IEEE_SGE_FLAGS_SYSTEMPLBCPI_ADDR \
(MPI2_IEEE_SGE_FLAGS_SYSTEMPLBPCI_ADDR) /* typo in name */
/****************************************************************************
* IEEE SGE operation Macros
****************************************************************************/
/* SIMPLE FlagsLength manipulations... */
#define MPI2_IEEE32_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_IEEE32_SGE_FLAGS_SHIFT)
#define MPI2_IEEE32_SGE_GET_FLAGS(f) (((f) & ~MPI2_IEEE32_SGE_LENGTH_MASK) >> MPI2_IEEE32_SGE_FLAGS_SHIFT)
#define MPI2_IEEE32_SGE_LENGTH(f) ((f) & MPI2_IEEE32_SGE_LENGTH_MASK)
#define MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f, l) (MPI2_IEEE32_SGE_SET_FLAGS(f) | MPI2_IEEE32_SGE_LENGTH(l))
#define MPI2_IEEE32_pSGE_GET_FLAGS(psg) MPI2_IEEE32_SGE_GET_FLAGS((psg)->FlagsLength)
#define MPI2_IEEE32_pSGE_GET_LENGTH(psg) MPI2_IEEE32_SGE_LENGTH((psg)->FlagsLength)
#define MPI2_IEEE32_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f,l)
/* CAUTION - The following are READ-MODIFY-WRITE! */
#define MPI2_IEEE32_pSGE_SET_FLAGS(psg,f) (psg)->FlagsLength |= MPI2_IEEE32_SGE_SET_FLAGS(f)
#define MPI2_IEEE32_pSGE_SET_LENGTH(psg,l) (psg)->FlagsLength |= MPI2_IEEE32_SGE_LENGTH(l)
/*****************************************************************************
*
* Fusion-MPT MPI/IEEE Scatter Gather Unions
*
*****************************************************************************/
typedef union _MPI2_SIMPLE_SGE_UNION
{
MPI2_SGE_SIMPLE_UNION MpiSimple;
MPI2_IEEE_SGE_SIMPLE_UNION IeeeSimple;
} MPI2_SIMPLE_SGE_UNION, MPI2_POINTER PTR_MPI2_SIMPLE_SGE_UNION,
Mpi2SimpleSgeUntion_t, MPI2_POINTER pMpi2SimpleSgeUntion_t;
typedef union _MPI2_SGE_IO_UNION
{
MPI2_SGE_SIMPLE_UNION MpiSimple;
MPI2_SGE_CHAIN_UNION MpiChain;
MPI2_IEEE_SGE_SIMPLE_UNION IeeeSimple;
MPI2_IEEE_SGE_CHAIN_UNION IeeeChain;
} MPI2_SGE_IO_UNION, MPI2_POINTER PTR_MPI2_SGE_IO_UNION,
Mpi2SGEIOUnion_t, MPI2_POINTER pMpi2SGEIOUnion_t;
/****************************************************************************
*
* Values for SGLFlags field, used in many request messages with an SGL
*
****************************************************************************/
/* values for MPI SGL Data Location Address Space subfield */
#define MPI2_SGLFLAGS_ADDRESS_SPACE_MASK (0x0C)
#define MPI2_SGLFLAGS_SYSTEM_ADDRESS_SPACE (0x00)
#define MPI2_SGLFLAGS_IOCDDR_ADDRESS_SPACE (0x04)
#define MPI2_SGLFLAGS_IOCPLB_ADDRESS_SPACE (0x08)
#define MPI2_SGLFLAGS_IOCPLBNTA_ADDRESS_SPACE (0x0C)
/* values for SGL Type subfield */
#define MPI2_SGLFLAGS_SGL_TYPE_MASK (0x03)
#define MPI2_SGLFLAGS_SGL_TYPE_MPI (0x00)
#define MPI2_SGLFLAGS_SGL_TYPE_IEEE32 (0x01)
#define MPI2_SGLFLAGS_SGL_TYPE_IEEE64 (0x02)
#endif
drivers/scsi/mpt2sas/mpi/mpi2_cnfg.h deleted 100644 → 0
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drivers/scsi/mpt2sas/mpi/mpi2_init.h deleted 100644 → 0
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/*
* Copyright (c) 2000-2014 LSI Corporation.
*
*
* Name: mpi2_init.h
* Title: MPI SCSI initiator mode messages and structures
* Creation Date: June 23, 2006
*
* mpi2_init.h Version: 02.00.15
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 10-31-07 02.00.01 Fixed name for pMpi2SCSITaskManagementRequest_t.
* 12-18-07 02.00.02 Modified Task Management Target Reset Method defines.
* 02-29-08 02.00.03 Added Query Task Set and Query Unit Attention.
* 03-03-08 02.00.04 Fixed name of struct _MPI2_SCSI_TASK_MANAGE_REPLY.
* 05-21-08 02.00.05 Fixed typo in name of Mpi2SepRequest_t.
* 10-02-08 02.00.06 Removed Untagged and No Disconnect values from SCSI IO
* Control field Task Attribute flags.
* Moved LUN field defines to mpi2.h because they are
* common to many structures.
* 05-06-09 02.00.07 Changed task management type of Query Unit Attention to
* Query Asynchronous Event.
* Defined two new bits in the SlotStatus field of the SCSI
* Enclosure Processor Request and Reply.
* 10-28-09 02.00.08 Added defines for decoding the ResponseInfo bytes for
* both SCSI IO Error Reply and SCSI Task Management Reply.
* Added ResponseInfo field to MPI2_SCSI_TASK_MANAGE_REPLY.
* Added MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG define.
* 02-10-10 02.00.09 Removed unused structure that had "#if 0" around it.
* 05-12-10 02.00.10 Added optional vendor-unique region to SCSI IO Request.
* 11-10-10 02.00.11 Added MPI2_SCSIIO_NUM_SGLOFFSETS define.
* 02-06-12 02.00.13 Added alternate defines for Task Priority / Command
* Priority to match SAM-4.
* 07-10-12 02.00.14 Added MPI2_SCSIIO_CONTROL_SHIFT_DATADIRECTION.
* 04-09-13 02.00.15 Added SCSIStatusQualifier field to MPI2_SCSI_IO_REPLY,
* replacing the Reserved4 field.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_INIT_H
#define MPI2_INIT_H
/*****************************************************************************
*
* SCSI Initiator Messages
*
*****************************************************************************/
/****************************************************************************
* SCSI IO messages and associated structures
****************************************************************************/
typedef struct
{
U8 CDB[20]; /* 0x00 */
U32 PrimaryReferenceTag; /* 0x14 */
U16 PrimaryApplicationTag; /* 0x18 */
U16 PrimaryApplicationTagMask; /* 0x1A */
U32 TransferLength; /* 0x1C */
} MPI2_SCSI_IO_CDB_EEDP32, MPI2_POINTER PTR_MPI2_SCSI_IO_CDB_EEDP32,
Mpi2ScsiIoCdbEedp32_t, MPI2_POINTER pMpi2ScsiIoCdbEedp32_t;
typedef union
{
U8 CDB32[32];
MPI2_SCSI_IO_CDB_EEDP32 EEDP32;
MPI2_SGE_SIMPLE_UNION SGE;
} MPI2_SCSI_IO_CDB_UNION, MPI2_POINTER PTR_MPI2_SCSI_IO_CDB_UNION,
Mpi2ScsiIoCdb_t, MPI2_POINTER pMpi2ScsiIoCdb_t;
/* SCSI IO Request Message */
typedef struct _MPI2_SCSI_IO_REQUEST
{
U16 DevHandle; /* 0x00 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved1; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U32 SenseBufferLowAddress; /* 0x0C */
U16 SGLFlags; /* 0x10 */
U8 SenseBufferLength; /* 0x12 */
U8 Reserved4; /* 0x13 */
U8 SGLOffset0; /* 0x14 */
U8 SGLOffset1; /* 0x15 */
U8 SGLOffset2; /* 0x16 */
U8 SGLOffset3; /* 0x17 */
U32 SkipCount; /* 0x18 */
U32 DataLength; /* 0x1C */
U32 BidirectionalDataLength; /* 0x20 */
U16 IoFlags; /* 0x24 */
U16 EEDPFlags; /* 0x26 */
U32 EEDPBlockSize; /* 0x28 */
U32 SecondaryReferenceTag; /* 0x2C */
U16 SecondaryApplicationTag; /* 0x30 */
U16 ApplicationTagTranslationMask; /* 0x32 */
U8 LUN[8]; /* 0x34 */
U32 Control; /* 0x3C */
MPI2_SCSI_IO_CDB_UNION CDB; /* 0x40 */
#ifdef MPI2_SCSI_IO_VENDOR_UNIQUE_REGION /* typically this is left undefined */
MPI2_SCSI_IO_VENDOR_UNIQUE VendorRegion;
#endif
MPI2_SGE_IO_UNION SGL; /* 0x60 */
} MPI2_SCSI_IO_REQUEST, MPI2_POINTER PTR_MPI2_SCSI_IO_REQUEST,
Mpi2SCSIIORequest_t, MPI2_POINTER pMpi2SCSIIORequest_t;
/* SCSI IO MsgFlags bits */
/* MsgFlags for SenseBufferAddressSpace */
#define MPI2_SCSIIO_MSGFLAGS_MASK_SENSE_ADDR (0x0C)
#define MPI2_SCSIIO_MSGFLAGS_SYSTEM_SENSE_ADDR (0x00)
#define MPI2_SCSIIO_MSGFLAGS_IOCDDR_SENSE_ADDR (0x04)
#define MPI2_SCSIIO_MSGFLAGS_IOCPLB_SENSE_ADDR (0x08)
#define MPI2_SCSIIO_MSGFLAGS_IOCPLBNTA_SENSE_ADDR (0x0C)
/* SCSI IO SGLFlags bits */
/* base values for Data Location Address Space */
#define MPI2_SCSIIO_SGLFLAGS_ADDR_MASK (0x0C)
#define MPI2_SCSIIO_SGLFLAGS_SYSTEM_ADDR (0x00)
#define MPI2_SCSIIO_SGLFLAGS_IOCDDR_ADDR (0x04)
#define MPI2_SCSIIO_SGLFLAGS_IOCPLB_ADDR (0x08)
#define MPI2_SCSIIO_SGLFLAGS_IOCPLBNTA_ADDR (0x0C)
/* base values for Type */
#define MPI2_SCSIIO_SGLFLAGS_TYPE_MASK (0x03)
#define MPI2_SCSIIO_SGLFLAGS_TYPE_MPI (0x00)
#define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE32 (0x01)
#define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE64 (0x02)
/* shift values for each sub-field */
#define MPI2_SCSIIO_SGLFLAGS_SGL3_SHIFT (12)
#define MPI2_SCSIIO_SGLFLAGS_SGL2_SHIFT (8)
#define MPI2_SCSIIO_SGLFLAGS_SGL1_SHIFT (4)
#define MPI2_SCSIIO_SGLFLAGS_SGL0_SHIFT (0)
/* number of SGLOffset fields */
#define MPI2_SCSIIO_NUM_SGLOFFSETS (4)
/* SCSI IO IoFlags bits */
/* Large CDB Address Space */
#define MPI2_SCSIIO_CDB_ADDR_MASK (0x6000)
#define MPI2_SCSIIO_CDB_ADDR_SYSTEM (0x0000)
#define MPI2_SCSIIO_CDB_ADDR_IOCDDR (0x2000)
#define MPI2_SCSIIO_CDB_ADDR_IOCPLB (0x4000)
#define MPI2_SCSIIO_CDB_ADDR_IOCPLBNTA (0x6000)
#define MPI2_SCSIIO_IOFLAGS_LARGE_CDB (0x1000)
#define MPI2_SCSIIO_IOFLAGS_BIDIRECTIONAL (0x0800)
#define MPI2_SCSIIO_IOFLAGS_MULTICAST (0x0400)
#define MPI2_SCSIIO_IOFLAGS_CMD_DETERMINES_DATA_DIR (0x0200)
#define MPI2_SCSIIO_IOFLAGS_CDBLENGTH_MASK (0x01FF)
/* SCSI IO EEDPFlags bits */
#define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_REFTAG (0x8000)
#define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_REFTAG (0x4000)
#define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_APPTAG (0x2000)
#define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_APPTAG (0x1000)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_REFTAG (0x0400)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_APPTAG (0x0200)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_GUARD (0x0100)
#define MPI2_SCSIIO_EEDPFLAGS_PASSTHRU_REFTAG (0x0008)
#define MPI2_SCSIIO_EEDPFLAGS_MASK_OP (0x0007)
#define MPI2_SCSIIO_EEDPFLAGS_NOOP_OP (0x0000)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_OP (0x0001)
#define MPI2_SCSIIO_EEDPFLAGS_STRIP_OP (0x0002)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_REMOVE_OP (0x0003)
#define MPI2_SCSIIO_EEDPFLAGS_INSERT_OP (0x0004)
#define MPI2_SCSIIO_EEDPFLAGS_REPLACE_OP (0x0006)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_REGEN_OP (0x0007)
/* SCSI IO LUN fields: use MPI2_LUN_ from mpi2.h */
/* SCSI IO Control bits */
#define MPI2_SCSIIO_CONTROL_ADDCDBLEN_MASK (0xFC000000)
#define MPI2_SCSIIO_CONTROL_ADDCDBLEN_SHIFT (26)
#define MPI2_SCSIIO_CONTROL_DATADIRECTION_MASK (0x03000000)
#define MPI2_SCSIIO_CONTROL_SHIFT_DATADIRECTION (24)
#define MPI2_SCSIIO_CONTROL_NODATATRANSFER (0x00000000)
#define MPI2_SCSIIO_CONTROL_WRITE (0x01000000)
#define MPI2_SCSIIO_CONTROL_READ (0x02000000)
#define MPI2_SCSIIO_CONTROL_BIDIRECTIONAL (0x03000000)
#define MPI2_SCSIIO_CONTROL_TASKPRI_MASK (0x00007800)
#define MPI2_SCSIIO_CONTROL_TASKPRI_SHIFT (11)
/* alternate name for the previous field; called Command Priority in SAM-4 */
#define MPI2_SCSIIO_CONTROL_CMDPRI_MASK (0x00007800)
#define MPI2_SCSIIO_CONTROL_CMDPRI_SHIFT (11)
#define MPI2_SCSIIO_CONTROL_TASKATTRIBUTE_MASK (0x00000700)
#define MPI2_SCSIIO_CONTROL_SIMPLEQ (0x00000000)
#define MPI2_SCSIIO_CONTROL_HEADOFQ (0x00000100)
#define MPI2_SCSIIO_CONTROL_ORDEREDQ (0x00000200)
#define MPI2_SCSIIO_CONTROL_ACAQ (0x00000400)
#define MPI2_SCSIIO_CONTROL_TLR_MASK (0x000000C0)
#define MPI2_SCSIIO_CONTROL_NO_TLR (0x00000000)
#define MPI2_SCSIIO_CONTROL_TLR_ON (0x00000040)
#define MPI2_SCSIIO_CONTROL_TLR_OFF (0x00000080)
/* SCSI IO Error Reply Message */
typedef struct _MPI2_SCSI_IO_REPLY
{
U16 DevHandle; /* 0x00 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved1; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U8 SCSIStatus; /* 0x0C */
U8 SCSIState; /* 0x0D */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U32 TransferCount; /* 0x14 */
U32 SenseCount; /* 0x18 */
U32 ResponseInfo; /* 0x1C */
U16 TaskTag; /* 0x20 */
U16 SCSIStatusQualifier; /* 0x22 */
U32 BidirectionalTransferCount; /* 0x24 */
U32 Reserved5; /* 0x28 */
U32 Reserved6; /* 0x2C */
} MPI2_SCSI_IO_REPLY, MPI2_POINTER PTR_MPI2_SCSI_IO_REPLY,
Mpi2SCSIIOReply_t, MPI2_POINTER pMpi2SCSIIOReply_t;
/* SCSI IO Reply SCSIStatus values (SAM-4 status codes) */
#define MPI2_SCSI_STATUS_GOOD (0x00)
#define MPI2_SCSI_STATUS_CHECK_CONDITION (0x02)
#define MPI2_SCSI_STATUS_CONDITION_MET (0x04)
#define MPI2_SCSI_STATUS_BUSY (0x08)
#define MPI2_SCSI_STATUS_INTERMEDIATE (0x10)
#define MPI2_SCSI_STATUS_INTERMEDIATE_CONDMET (0x14)
#define MPI2_SCSI_STATUS_RESERVATION_CONFLICT (0x18)
#define MPI2_SCSI_STATUS_COMMAND_TERMINATED (0x22) /* obsolete */
#define MPI2_SCSI_STATUS_TASK_SET_FULL (0x28)
#define MPI2_SCSI_STATUS_ACA_ACTIVE (0x30)
#define MPI2_SCSI_STATUS_TASK_ABORTED (0x40)
/* SCSI IO Reply SCSIState flags */
#define MPI2_SCSI_STATE_RESPONSE_INFO_VALID (0x10)
#define MPI2_SCSI_STATE_TERMINATED (0x08)
#define MPI2_SCSI_STATE_NO_SCSI_STATUS (0x04)
#define MPI2_SCSI_STATE_AUTOSENSE_FAILED (0x02)
#define MPI2_SCSI_STATE_AUTOSENSE_VALID (0x01)
/* masks and shifts for the ResponseInfo field */
#define MPI2_SCSI_RI_MASK_REASONCODE (0x000000FF)
#define MPI2_SCSI_RI_SHIFT_REASONCODE (0)
#define MPI2_SCSI_TASKTAG_UNKNOWN (0xFFFF)
/****************************************************************************
* SCSI Task Management messages
****************************************************************************/
/* SCSI Task Management Request Message */
typedef struct _MPI2_SCSI_TASK_MANAGE_REQUEST
{
U16 DevHandle; /* 0x00 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U8 Reserved1; /* 0x04 */
U8 TaskType; /* 0x05 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U8 LUN[8]; /* 0x0C */
U32 Reserved4[7]; /* 0x14 */
U16 TaskMID; /* 0x30 */
U16 Reserved5; /* 0x32 */
} MPI2_SCSI_TASK_MANAGE_REQUEST,
MPI2_POINTER PTR_MPI2_SCSI_TASK_MANAGE_REQUEST,
Mpi2SCSITaskManagementRequest_t,
MPI2_POINTER pMpi2SCSITaskManagementRequest_t;
/* TaskType values */
#define MPI2_SCSITASKMGMT_TASKTYPE_ABORT_TASK (0x01)
#define MPI2_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET (0x02)
#define MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03)
#define MPI2_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05)
#define MPI2_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET (0x06)
#define MPI2_SCSITASKMGMT_TASKTYPE_QUERY_TASK (0x07)
#define MPI2_SCSITASKMGMT_TASKTYPE_CLR_ACA (0x08)
#define MPI2_SCSITASKMGMT_TASKTYPE_QRY_TASK_SET (0x09)
#define MPI2_SCSITASKMGMT_TASKTYPE_QRY_ASYNC_EVENT (0x0A)
/* obsolete TaskType name */
#define MPI2_SCSITASKMGMT_TASKTYPE_QRY_UNIT_ATTENTION \
(MPI2_SCSITASKMGMT_TASKTYPE_QRY_ASYNC_EVENT)
/* MsgFlags bits */
#define MPI2_SCSITASKMGMT_MSGFLAGS_MASK_TARGET_RESET (0x18)
#define MPI2_SCSITASKMGMT_MSGFLAGS_LINK_RESET (0x00)
#define MPI2_SCSITASKMGMT_MSGFLAGS_NEXUS_RESET_SRST (0x08)
#define MPI2_SCSITASKMGMT_MSGFLAGS_SAS_HARD_LINK_RESET (0x10)
#define MPI2_SCSITASKMGMT_MSGFLAGS_DO_NOT_SEND_TASK_IU (0x01)
/* SCSI Task Management Reply Message */
typedef struct _MPI2_SCSI_TASK_MANAGE_REPLY
{
U16 DevHandle; /* 0x00 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U8 ResponseCode; /* 0x04 */
U8 TaskType; /* 0x05 */
U8 Reserved1; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved2; /* 0x0A */
U16 Reserved3; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U32 TerminationCount; /* 0x14 */
U32 ResponseInfo; /* 0x18 */
} MPI2_SCSI_TASK_MANAGE_REPLY,
MPI2_POINTER PTR_MPI2_SCSI_TASK_MANAGE_REPLY,
Mpi2SCSITaskManagementReply_t, MPI2_POINTER pMpi2SCSIManagementReply_t;
/* ResponseCode values */
#define MPI2_SCSITASKMGMT_RSP_TM_COMPLETE (0x00)
#define MPI2_SCSITASKMGMT_RSP_INVALID_FRAME (0x02)
#define MPI2_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED (0x04)
#define MPI2_SCSITASKMGMT_RSP_TM_FAILED (0x05)
#define MPI2_SCSITASKMGMT_RSP_TM_SUCCEEDED (0x08)
#define MPI2_SCSITASKMGMT_RSP_TM_INVALID_LUN (0x09)
#define MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG (0x0A)
#define MPI2_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC (0x80)
/* masks and shifts for the ResponseInfo field */
#define MPI2_SCSITASKMGMT_RI_MASK_REASONCODE (0x000000FF)
#define MPI2_SCSITASKMGMT_RI_SHIFT_REASONCODE (0)
#define MPI2_SCSITASKMGMT_RI_MASK_ARI2 (0x0000FF00)
#define MPI2_SCSITASKMGMT_RI_SHIFT_ARI2 (8)
#define MPI2_SCSITASKMGMT_RI_MASK_ARI1 (0x00FF0000)
#define MPI2_SCSITASKMGMT_RI_SHIFT_ARI1 (16)
#define MPI2_SCSITASKMGMT_RI_MASK_ARI0 (0xFF000000)
#define MPI2_SCSITASKMGMT_RI_SHIFT_ARI0 (24)
/****************************************************************************
* SCSI Enclosure Processor messages
****************************************************************************/
/* SCSI Enclosure Processor Request Message */
typedef struct _MPI2_SEP_REQUEST
{
U16 DevHandle; /* 0x00 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U8 Action; /* 0x04 */
U8 Flags; /* 0x05 */
U8 Reserved1; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved2; /* 0x0A */
U32 SlotStatus; /* 0x0C */
U32 Reserved3; /* 0x10 */
U32 Reserved4; /* 0x14 */
U32 Reserved5; /* 0x18 */
U16 Slot; /* 0x1C */
U16 EnclosureHandle; /* 0x1E */
} MPI2_SEP_REQUEST, MPI2_POINTER PTR_MPI2_SEP_REQUEST,
Mpi2SepRequest_t, MPI2_POINTER pMpi2SepRequest_t;
/* Action defines */
#define MPI2_SEP_REQ_ACTION_WRITE_STATUS (0x00)
#define MPI2_SEP_REQ_ACTION_READ_STATUS (0x01)
/* Flags defines */
#define MPI2_SEP_REQ_FLAGS_DEVHANDLE_ADDRESS (0x00)
#define MPI2_SEP_REQ_FLAGS_ENCLOSURE_SLOT_ADDRESS (0x01)
/* SlotStatus defines */
#define MPI2_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE (0x00040000)
#define MPI2_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
#define MPI2_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
#define MPI2_SEP_REQ_SLOTSTATUS_HOT_SPARE (0x00000100)
#define MPI2_SEP_REQ_SLOTSTATUS_UNCONFIGURED (0x00000080)
#define MPI2_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
#define MPI2_SEP_REQ_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
#define MPI2_SEP_REQ_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
#define MPI2_SEP_REQ_SLOTSTATUS_DEV_REBUILDING (0x00000004)
#define MPI2_SEP_REQ_SLOTSTATUS_DEV_FAULTY (0x00000002)
#define MPI2_SEP_REQ_SLOTSTATUS_NO_ERROR (0x00000001)
/* SCSI Enclosure Processor Reply Message */
typedef struct _MPI2_SEP_REPLY
{
U16 DevHandle; /* 0x00 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U8 Action; /* 0x04 */
U8 Flags; /* 0x05 */
U8 Reserved1; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved2; /* 0x0A */
U16 Reserved3; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U32 SlotStatus; /* 0x14 */
U32 Reserved4; /* 0x18 */
U16 Slot; /* 0x1C */
U16 EnclosureHandle; /* 0x1E */
} MPI2_SEP_REPLY, MPI2_POINTER PTR_MPI2_SEP_REPLY,
Mpi2SepReply_t, MPI2_POINTER pMpi2SepReply_t;
/* SlotStatus defines */
#define MPI2_SEP_REPLY_SLOTSTATUS_REMOVE_READY (0x00040000)
#define MPI2_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
#define MPI2_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
#define MPI2_SEP_REPLY_SLOTSTATUS_HOT_SPARE (0x00000100)
#define MPI2_SEP_REPLY_SLOTSTATUS_UNCONFIGURED (0x00000080)
#define MPI2_SEP_REPLY_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
#define MPI2_SEP_REPLY_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
#define MPI2_SEP_REPLY_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
#define MPI2_SEP_REPLY_SLOTSTATUS_DEV_REBUILDING (0x00000004)
#define MPI2_SEP_REPLY_SLOTSTATUS_DEV_FAULTY (0x00000002)
#define MPI2_SEP_REPLY_SLOTSTATUS_NO_ERROR (0x00000001)
#endif
drivers/scsi/mpt2sas/mpi/mpi2_ioc.h deleted 100644 → 0
View file @ 2a188cb4
/*
* Copyright (c) 2000-2014 LSI Corporation.
*
*
* Name: mpi2_ioc.h
* Title: MPI IOC, Port, Event, FW Download, and FW Upload messages
* Creation Date: October 11, 2006
*
* mpi2_ioc.h Version: 02.00.24
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 06-04-07 02.00.01 In IOCFacts Reply structure, renamed MaxDevices to
* MaxTargets.
* Added TotalImageSize field to FWDownload Request.
* Added reserved words to FWUpload Request.
* 06-26-07 02.00.02 Added IR Configuration Change List Event.
* 08-31-07 02.00.03 Removed SystemReplyQueueDepth field from the IOCInit
* request and replaced it with
* ReplyDescriptorPostQueueDepth and ReplyFreeQueueDepth.
* Replaced the MinReplyQueueDepth field of the IOCFacts
* reply with MaxReplyDescriptorPostQueueDepth.
* Added MPI2_RDPQ_DEPTH_MIN define to specify the minimum
* depth for the Reply Descriptor Post Queue.
* Added SASAddress field to Initiator Device Table
* Overflow Event data.
* 10-31-07 02.00.04 Added ReasonCode MPI2_EVENT_SAS_INIT_RC_NOT_RESPONDING
* for SAS Initiator Device Status Change Event data.
* Modified Reason Code defines for SAS Topology Change
* List Event data, including adding a bit for PHY Vacant
* status, and adding a mask for the Reason Code.
* Added define for
* MPI2_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING.
* Added define for MPI2_EXT_IMAGE_TYPE_MEGARAID.
* 12-18-07 02.00.05 Added Boot Status defines for the IOCExceptions field of
* the IOCFacts Reply.
* Removed MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER define.
* Moved MPI2_VERSION_UNION to mpi2.h.
* Changed MPI2_EVENT_NOTIFICATION_REQUEST to use masks
* instead of enables, and added SASBroadcastPrimitiveMasks
* field.
* Added Log Entry Added Event and related structure.
* 02-29-08 02.00.06 Added define MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID.
* Removed define MPI2_IOCFACTS_PROTOCOL_SMP_TARGET.
* Added MaxVolumes and MaxPersistentEntries fields to
* IOCFacts reply.
* Added ProtocalFlags and IOCCapabilities fields to
* MPI2_FW_IMAGE_HEADER.
* Removed MPI2_PORTENABLE_FLAGS_ENABLE_SINGLE_PORT.
* 03-03-08 02.00.07 Fixed MPI2_FW_IMAGE_HEADER by changing Reserved26 to
* a U16 (from a U32).
* Removed extra 's' from EventMasks name.
* 06-27-08 02.00.08 Fixed an offset in a comment.
* 10-02-08 02.00.09 Removed SystemReplyFrameSize from MPI2_IOC_INIT_REQUEST.
* Removed CurReplyFrameSize from MPI2_IOC_FACTS_REPLY and
* renamed MinReplyFrameSize to ReplyFrameSize.
* Added MPI2_IOCFACTS_EXCEPT_IR_FOREIGN_CONFIG_MAX.
* Added two new RAIDOperation values for Integrated RAID
* Operations Status Event data.
* Added four new IR Configuration Change List Event data
* ReasonCode values.
* Added two new ReasonCode defines for SAS Device Status
* Change Event data.
* Added three new DiscoveryStatus bits for the SAS
* Discovery event data.
* Added Multiplexing Status Change bit to the PhyStatus
* field of the SAS Topology Change List event data.
* Removed define for MPI2_INIT_IMAGE_BOOTFLAGS_XMEMCOPY.
* BootFlags are now product-specific.
* Added defines for the indivdual signature bytes
* for MPI2_INIT_IMAGE_FOOTER.
* 01-19-09 02.00.10 Added MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY define.
* Added MPI2_EVENT_SAS_DISC_DS_DOWNSTREAM_INITIATOR
* define.
* Added MPI2_EVENT_SAS_DEV_STAT_RC_SATA_INIT_FAILURE
* define.
* Removed MPI2_EVENT_SAS_DISC_DS_SATA_INIT_FAILURE define.
* 05-06-09 02.00.11 Added MPI2_IOCFACTS_CAPABILITY_RAID_ACCELERATOR define.
* Added MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX define.
* Added two new reason codes for SAS Device Status Change
* Event.
* Added new event: SAS PHY Counter.
* 07-30-09 02.00.12 Added GPIO Interrupt event define and structure.
* Added MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER define.
* Added new product id family for 2208.
* 10-28-09 02.00.13 Added HostMSIxVectors field to MPI2_IOC_INIT_REQUEST.
* Added MaxMSIxVectors field to MPI2_IOC_FACTS_REPLY.
* Added MinDevHandle field to MPI2_IOC_FACTS_REPLY.
* Added MPI2_IOCFACTS_CAPABILITY_HOST_BASED_DISCOVERY.
* Added MPI2_EVENT_HOST_BASED_DISCOVERY_PHY define.
* Added MPI2_EVENT_SAS_TOPO_ES_NO_EXPANDER define.
* Added Host Based Discovery Phy Event data.
* Added defines for ProductID Product field
* (MPI2_FW_HEADER_PID_).
* Modified values for SAS ProductID Family
* (MPI2_FW_HEADER_PID_FAMILY_).
* 02-10-10 02.00.14 Added SAS Quiesce Event structure and defines.
* Added PowerManagementControl Request structures and
* defines.
* 05-12-10 02.00.15 Marked Task Set Full Event as obsolete.
* Added MPI2_EVENT_SAS_TOPO_LR_UNSUPPORTED_PHY define.
* 11-10-10 02.00.16 Added MPI2_FW_DOWNLOAD_ITYPE_MIN_PRODUCT_SPECIFIC.
* 02-23-11 02.00.17 Added SAS NOTIFY Primitive event, and added
* SASNotifyPrimitiveMasks field to
* MPI2_EVENT_NOTIFICATION_REQUEST.
* Added Temperature Threshold Event.
* Added Host Message Event.
* Added Send Host Message request and reply.
* 05-25-11 02.00.18 For Extended Image Header, added
* MPI2_EXT_IMAGE_TYPE_MIN_PRODUCT_SPECIFIC and
* MPI2_EXT_IMAGE_TYPE_MAX_PRODUCT_SPECIFIC defines.
* Deprecated MPI2_EXT_IMAGE_TYPE_MAX define.
* 08-24-11 02.00.19 Added PhysicalPort field to
* MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE structure.
* Marked MPI2_PM_CONTROL_FEATURE_PCIE_LINK as obsolete.
* 03-29-12 02.00.21 Added a product specific range to event values.
* 07-26-12 02.00.22 Added MPI2_IOCFACTS_EXCEPT_PARTIAL_MEMORY_FAILURE.
* Added ElapsedSeconds field to
* MPI2_EVENT_DATA_IR_OPERATION_STATUS.
* 08-19-13 02.00.23 For IOCInit, added MPI2_IOCINIT_MSGFLAG_RDPQ_ARRAY_MODE
* and MPI2_IOC_INIT_RDPQ_ARRAY_ENTRY.
* Added MPI2_IOCFACTS_CAPABILITY_RDPQ_ARRAY_CAPABLE.
* Added MPI2_FW_DOWNLOAD_ITYPE_PUBLIC_KEY.
* Added Encrypted Hash Extended Image.
* 12-05-13 02.00.24 Added MPI25_HASH_IMAGE_TYPE_BIOS.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_IOC_H
#define MPI2_IOC_H
/*****************************************************************************
*
* IOC Messages
*
*****************************************************************************/
/****************************************************************************
* IOCInit message
****************************************************************************/
/* IOCInit Request message */
typedef struct _MPI2_IOC_INIT_REQUEST
{
U8 WhoInit; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U16 MsgVersion; /* 0x0C */
U16 HeaderVersion; /* 0x0E */
U32 Reserved5; /* 0x10 */
U16 Reserved6; /* 0x14 */
U8 Reserved7; /* 0x16 */
U8 HostMSIxVectors; /* 0x17 */
U16 Reserved8; /* 0x18 */
U16 SystemRequestFrameSize; /* 0x1A */
U16 ReplyDescriptorPostQueueDepth; /* 0x1C */
U16 ReplyFreeQueueDepth; /* 0x1E */
U32 SenseBufferAddressHigh; /* 0x20 */
U32 SystemReplyAddressHigh; /* 0x24 */
U64 SystemRequestFrameBaseAddress; /* 0x28 */
U64 ReplyDescriptorPostQueueAddress;/* 0x30 */
U64 ReplyFreeQueueAddress; /* 0x38 */
U64 TimeStamp; /* 0x40 */
} MPI2_IOC_INIT_REQUEST, MPI2_POINTER PTR_MPI2_IOC_INIT_REQUEST,
Mpi2IOCInitRequest_t, MPI2_POINTER pMpi2IOCInitRequest_t;
/* WhoInit values */
#define MPI2_WHOINIT_NOT_INITIALIZED (0x00)
#define MPI2_WHOINIT_SYSTEM_BIOS (0x01)
#define MPI2_WHOINIT_ROM_BIOS (0x02)
#define MPI2_WHOINIT_PCI_PEER (0x03)
#define MPI2_WHOINIT_HOST_DRIVER (0x04)
#define MPI2_WHOINIT_MANUFACTURER (0x05)
/* MsgFlags */
#define MPI2_IOCINIT_MSGFLAG_RDPQ_ARRAY_MODE (0x01)
/* MsgVersion */
#define MPI2_IOCINIT_MSGVERSION_MAJOR_MASK (0xFF00)
#define MPI2_IOCINIT_MSGVERSION_MAJOR_SHIFT (8)
#define MPI2_IOCINIT_MSGVERSION_MINOR_MASK (0x00FF)
#define MPI2_IOCINIT_MSGVERSION_MINOR_SHIFT (0)
/* HeaderVersion */
#define MPI2_IOCINIT_HDRVERSION_UNIT_MASK (0xFF00)
#define MPI2_IOCINIT_HDRVERSION_UNIT_SHIFT (8)
#define MPI2_IOCINIT_HDRVERSION_DEV_MASK (0x00FF)
#define MPI2_IOCINIT_HDRVERSION_DEV_SHIFT (0)
/* minimum depth for a Reply Descriptor Post Queue */
#define MPI2_RDPQ_DEPTH_MIN (16)
/* Reply Descriptor Post Queue Array Entry */
typedef struct _MPI2_IOC_INIT_RDPQ_ARRAY_ENTRY {
U64 RDPQBaseAddress; /* 0x00 */
U32 Reserved1; /* 0x08 */
U32 Reserved2; /* 0x0C */
} MPI2_IOC_INIT_RDPQ_ARRAY_ENTRY,
MPI2_POINTER PTR_MPI2_IOC_INIT_RDPQ_ARRAY_ENTRY,
Mpi2IOCInitRDPQArrayEntry, MPI2_POINTER pMpi2IOCInitRDPQArrayEntry;
/* IOCInit Reply message */
typedef struct _MPI2_IOC_INIT_REPLY
{
U8 WhoInit; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U16 Reserved5; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
} MPI2_IOC_INIT_REPLY, MPI2_POINTER PTR_MPI2_IOC_INIT_REPLY,
Mpi2IOCInitReply_t, MPI2_POINTER pMpi2IOCInitReply_t;
/****************************************************************************
* IOCFacts message
****************************************************************************/
/* IOCFacts Request message */
typedef struct _MPI2_IOC_FACTS_REQUEST
{
U16 Reserved1; /* 0x00 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
} MPI2_IOC_FACTS_REQUEST, MPI2_POINTER PTR_MPI2_IOC_FACTS_REQUEST,
Mpi2IOCFactsRequest_t, MPI2_POINTER pMpi2IOCFactsRequest_t;
/* IOCFacts Reply message */
typedef struct _MPI2_IOC_FACTS_REPLY
{
U16 MsgVersion; /* 0x00 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 HeaderVersion; /* 0x04 */
U8 IOCNumber; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved1; /* 0x0A */
U16 IOCExceptions; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U8 MaxChainDepth; /* 0x14 */
U8 WhoInit; /* 0x15 */
U8 NumberOfPorts; /* 0x16 */
U8 MaxMSIxVectors; /* 0x17 */
U16 RequestCredit; /* 0x18 */
U16 ProductID; /* 0x1A */
U32 IOCCapabilities; /* 0x1C */
MPI2_VERSION_UNION FWVersion; /* 0x20 */
U16 IOCRequestFrameSize; /* 0x24 */
U16 Reserved3; /* 0x26 */
U16 MaxInitiators; /* 0x28 */
U16 MaxTargets; /* 0x2A */
U16 MaxSasExpanders; /* 0x2C */
U16 MaxEnclosures; /* 0x2E */
U16 ProtocolFlags; /* 0x30 */
U16 HighPriorityCredit; /* 0x32 */
U16 MaxReplyDescriptorPostQueueDepth; /* 0x34 */
U8 ReplyFrameSize; /* 0x36 */
U8 MaxVolumes; /* 0x37 */
U16 MaxDevHandle; /* 0x38 */
U16 MaxPersistentEntries; /* 0x3A */
U16 MinDevHandle; /* 0x3C */
U16 Reserved4; /* 0x3E */
} MPI2_IOC_FACTS_REPLY, MPI2_POINTER PTR_MPI2_IOC_FACTS_REPLY,
Mpi2IOCFactsReply_t, MPI2_POINTER pMpi2IOCFactsReply_t;
/* MsgVersion */
#define MPI2_IOCFACTS_MSGVERSION_MAJOR_MASK (0xFF00)
#define MPI2_IOCFACTS_MSGVERSION_MAJOR_SHIFT (8)
#define MPI2_IOCFACTS_MSGVERSION_MINOR_MASK (0x00FF)
#define MPI2_IOCFACTS_MSGVERSION_MINOR_SHIFT (0)
/* HeaderVersion */
#define MPI2_IOCFACTS_HDRVERSION_UNIT_MASK (0xFF00)
#define MPI2_IOCFACTS_HDRVERSION_UNIT_SHIFT (8)
#define MPI2_IOCFACTS_HDRVERSION_DEV_MASK (0x00FF)
#define MPI2_IOCFACTS_HDRVERSION_DEV_SHIFT (0)
/* IOCExceptions */
#define MPI2_IOCFACTS_EXCEPT_PARTIAL_MEMORY_FAILURE (0x0200)
#define MPI2_IOCFACTS_EXCEPT_IR_FOREIGN_CONFIG_MAX (0x0100)
#define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_MASK (0x00E0)
#define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_GOOD (0x0000)
#define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_BACKUP (0x0020)
#define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_RESTORED (0x0040)
#define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_CORRUPT_BACKUP (0x0060)
#define MPI2_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED (0x0010)
#define MPI2_IOCFACTS_EXCEPT_MANUFACT_CHECKSUM_FAIL (0x0008)
#define MPI2_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL (0x0004)
#define MPI2_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID (0x0002)
#define MPI2_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0001)
/* defines for WhoInit field are after the IOCInit Request */
/* ProductID field uses MPI2_FW_HEADER_PID_ */
/* IOCCapabilities */
#define MPI2_IOCFACTS_CAPABILITY_RDPQ_ARRAY_CAPABLE (0x00040000)
#define MPI2_IOCFACTS_CAPABILITY_HOST_BASED_DISCOVERY (0x00010000)
#define MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX (0x00008000)
#define MPI2_IOCFACTS_CAPABILITY_RAID_ACCELERATOR (0x00004000)
#define MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY (0x00002000)
#define MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID (0x00001000)
#define MPI2_IOCFACTS_CAPABILITY_TLR (0x00000800)
#define MPI2_IOCFACTS_CAPABILITY_MULTICAST (0x00000100)
#define MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET (0x00000080)
#define MPI2_IOCFACTS_CAPABILITY_EEDP (0x00000040)
#define MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER (0x00000020)
#define MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER (0x00000010)
#define MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER (0x00000008)
#define MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING (0x00000004)
/* ProtocolFlags */
#define MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET (0x0001)
#define MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR (0x0002)
/****************************************************************************
* PortFacts message
****************************************************************************/
/* PortFacts Request message */
typedef struct _MPI2_PORT_FACTS_REQUEST
{
U16 Reserved1; /* 0x00 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 PortNumber; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
} MPI2_PORT_FACTS_REQUEST, MPI2_POINTER PTR_MPI2_PORT_FACTS_REQUEST,
Mpi2PortFactsRequest_t, MPI2_POINTER pMpi2PortFactsRequest_t;
/* PortFacts Reply message */
typedef struct _MPI2_PORT_FACTS_REPLY
{
U16 Reserved1; /* 0x00 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 PortNumber; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 Reserved4; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U8 Reserved5; /* 0x14 */
U8 PortType; /* 0x15 */
U16 Reserved6; /* 0x16 */
U16 MaxPostedCmdBuffers; /* 0x18 */
U16 Reserved7; /* 0x1A */
} MPI2_PORT_FACTS_REPLY, MPI2_POINTER PTR_MPI2_PORT_FACTS_REPLY,
Mpi2PortFactsReply_t, MPI2_POINTER pMpi2PortFactsReply_t;
/* PortType values */
#define MPI2_PORTFACTS_PORTTYPE_INACTIVE (0x00)
#define MPI2_PORTFACTS_PORTTYPE_FC (0x10)
#define MPI2_PORTFACTS_PORTTYPE_ISCSI (0x20)
#define MPI2_PORTFACTS_PORTTYPE_SAS_PHYSICAL (0x30)
#define MPI2_PORTFACTS_PORTTYPE_SAS_VIRTUAL (0x31)
/****************************************************************************
* PortEnable message
****************************************************************************/
/* PortEnable Request message */
typedef struct _MPI2_PORT_ENABLE_REQUEST
{
U16 Reserved1; /* 0x00 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U8 Reserved2; /* 0x04 */
U8 PortFlags; /* 0x05 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
} MPI2_PORT_ENABLE_REQUEST, MPI2_POINTER PTR_MPI2_PORT_ENABLE_REQUEST,
Mpi2PortEnableRequest_t, MPI2_POINTER pMpi2PortEnableRequest_t;
/* PortEnable Reply message */
typedef struct _MPI2_PORT_ENABLE_REPLY
{
U16 Reserved1; /* 0x00 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U8 Reserved2; /* 0x04 */
U8 PortFlags; /* 0x05 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U16 Reserved5; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
} MPI2_PORT_ENABLE_REPLY, MPI2_POINTER PTR_MPI2_PORT_ENABLE_REPLY,
Mpi2PortEnableReply_t, MPI2_POINTER pMpi2PortEnableReply_t;
/****************************************************************************
* EventNotification message
****************************************************************************/
/* EventNotification Request message */
#define MPI2_EVENT_NOTIFY_EVENTMASK_WORDS (4)
typedef struct _MPI2_EVENT_NOTIFICATION_REQUEST
{
U16 Reserved1; /* 0x00 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U32 Reserved5; /* 0x0C */
U32 Reserved6; /* 0x10 */
U32 EventMasks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];/* 0x14 */
U16 SASBroadcastPrimitiveMasks; /* 0x24 */
U16 SASNotifyPrimitiveMasks; /* 0x26 */
U32 Reserved8; /* 0x28 */
} MPI2_EVENT_NOTIFICATION_REQUEST,
MPI2_POINTER PTR_MPI2_EVENT_NOTIFICATION_REQUEST,
Mpi2EventNotificationRequest_t, MPI2_POINTER pMpi2EventNotificationRequest_t;
/* EventNotification Reply message */
typedef struct _MPI2_EVENT_NOTIFICATION_REPLY
{
U16 EventDataLength; /* 0x00 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved1; /* 0x04 */
U8 AckRequired; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved2; /* 0x0A */
U16 Reserved3; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U16 Event; /* 0x14 */
U16 Reserved4; /* 0x16 */
U32 EventContext; /* 0x18 */
U32 EventData[1]; /* 0x1C */
} MPI2_EVENT_NOTIFICATION_REPLY, MPI2_POINTER PTR_MPI2_EVENT_NOTIFICATION_REPLY,
Mpi2EventNotificationReply_t, MPI2_POINTER pMpi2EventNotificationReply_t;
/* AckRequired */
#define MPI2_EVENT_NOTIFICATION_ACK_NOT_REQUIRED (0x00)
#define MPI2_EVENT_NOTIFICATION_ACK_REQUIRED (0x01)
/* Event */
#define MPI2_EVENT_LOG_DATA (0x0001)
#define MPI2_EVENT_STATE_CHANGE (0x0002)
#define MPI2_EVENT_HARD_RESET_RECEIVED (0x0005)
#define MPI2_EVENT_EVENT_CHANGE (0x000A)
#define MPI2_EVENT_TASK_SET_FULL (0x000E) /* obsolete */
#define MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE (0x000F)
#define MPI2_EVENT_IR_OPERATION_STATUS (0x0014)
#define MPI2_EVENT_SAS_DISCOVERY (0x0016)
#define MPI2_EVENT_SAS_BROADCAST_PRIMITIVE (0x0017)
#define MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE (0x0018)
#define MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW (0x0019)
#define MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST (0x001C)
#define MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE (0x001D)
#define MPI2_EVENT_IR_VOLUME (0x001E)
#define MPI2_EVENT_IR_PHYSICAL_DISK (0x001F)
#define MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST (0x0020)
#define MPI2_EVENT_LOG_ENTRY_ADDED (0x0021)
#define MPI2_EVENT_SAS_PHY_COUNTER (0x0022)
#define MPI2_EVENT_GPIO_INTERRUPT (0x0023)
#define MPI2_EVENT_HOST_BASED_DISCOVERY_PHY (0x0024)
#define MPI2_EVENT_SAS_QUIESCE (0x0025)
#define MPI2_EVENT_SAS_NOTIFY_PRIMITIVE (0x0026)
#define MPI2_EVENT_TEMP_THRESHOLD (0x0027)
#define MPI2_EVENT_HOST_MESSAGE (0x0028)
#define MPI2_EVENT_MIN_PRODUCT_SPECIFIC (0x006E)
#define MPI2_EVENT_MAX_PRODUCT_SPECIFIC (0x007F)
/* Log Entry Added Event data */
/* the following structure matches MPI2_LOG_0_ENTRY in mpi2_cnfg.h */
#define MPI2_EVENT_DATA_LOG_DATA_LENGTH (0x1C)
typedef struct _MPI2_EVENT_DATA_LOG_ENTRY_ADDED
{
U64 TimeStamp; /* 0x00 */
U32 Reserved1; /* 0x08 */
U16 LogSequence; /* 0x0C */
U16 LogEntryQualifier; /* 0x0E */
U8 VP_ID; /* 0x10 */
U8 VF_ID; /* 0x11 */
U16 Reserved2; /* 0x12 */
U8 LogData[MPI2_EVENT_DATA_LOG_DATA_LENGTH];/* 0x14 */
} MPI2_EVENT_DATA_LOG_ENTRY_ADDED,
MPI2_POINTER PTR_MPI2_EVENT_DATA_LOG_ENTRY_ADDED,
Mpi2EventDataLogEntryAdded_t, MPI2_POINTER pMpi2EventDataLogEntryAdded_t;
/* GPIO Interrupt Event data */
typedef struct _MPI2_EVENT_DATA_GPIO_INTERRUPT {
U8 GPIONum; /* 0x00 */
U8 Reserved1; /* 0x01 */
U16 Reserved2; /* 0x02 */
} MPI2_EVENT_DATA_GPIO_INTERRUPT,
MPI2_POINTER PTR_MPI2_EVENT_DATA_GPIO_INTERRUPT,
Mpi2EventDataGpioInterrupt_t, MPI2_POINTER pMpi2EventDataGpioInterrupt_t;
/* Temperature Threshold Event data */
typedef struct _MPI2_EVENT_DATA_TEMPERATURE {
U16 Status; /* 0x00 */
U8 SensorNum; /* 0x02 */
U8 Reserved1; /* 0x03 */
U16 CurrentTemperature; /* 0x04 */
U16 Reserved2; /* 0x06 */
U32 Reserved3; /* 0x08 */
U32 Reserved4; /* 0x0C */
} MPI2_EVENT_DATA_TEMPERATURE,
MPI2_POINTER PTR_MPI2_EVENT_DATA_TEMPERATURE,
Mpi2EventDataTemperature_t, MPI2_POINTER pMpi2EventDataTemperature_t;
/* Temperature Threshold Event data Status bits */
#define MPI2_EVENT_TEMPERATURE3_EXCEEDED (0x0008)
#define MPI2_EVENT_TEMPERATURE2_EXCEEDED (0x0004)
#define MPI2_EVENT_TEMPERATURE1_EXCEEDED (0x0002)
#define MPI2_EVENT_TEMPERATURE0_EXCEEDED (0x0001)
/* Host Message Event data */
typedef struct _MPI2_EVENT_DATA_HOST_MESSAGE {
U8 SourceVF_ID; /* 0x00 */
U8 Reserved1; /* 0x01 */
U16 Reserved2; /* 0x02 */
U32 Reserved3; /* 0x04 */
U32 HostData[1]; /* 0x08 */
} MPI2_EVENT_DATA_HOST_MESSAGE, MPI2_POINTER PTR_MPI2_EVENT_DATA_HOST_MESSAGE,
Mpi2EventDataHostMessage_t, MPI2_POINTER pMpi2EventDataHostMessage_t;
/* Hard Reset Received Event data */
typedef struct _MPI2_EVENT_DATA_HARD_RESET_RECEIVED
{
U8 Reserved1; /* 0x00 */
U8 Port; /* 0x01 */
U16 Reserved2; /* 0x02 */
} MPI2_EVENT_DATA_HARD_RESET_RECEIVED,
MPI2_POINTER PTR_MPI2_EVENT_DATA_HARD_RESET_RECEIVED,
Mpi2EventDataHardResetReceived_t,
MPI2_POINTER pMpi2EventDataHardResetReceived_t;
/* Task Set Full Event data */
/* this event is obsolete */
typedef struct _MPI2_EVENT_DATA_TASK_SET_FULL
{
U16 DevHandle; /* 0x00 */
U16 CurrentDepth; /* 0x02 */
} MPI2_EVENT_DATA_TASK_SET_FULL, MPI2_POINTER PTR_MPI2_EVENT_DATA_TASK_SET_FULL,
Mpi2EventDataTaskSetFull_t, MPI2_POINTER pMpi2EventDataTaskSetFull_t;
/* SAS Device Status Change Event data */
typedef struct _MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE
{
U16 TaskTag; /* 0x00 */
U8 ReasonCode; /* 0x02 */
U8 PhysicalPort; /* 0x03 */
U8 ASC; /* 0x04 */
U8 ASCQ; /* 0x05 */
U16 DevHandle; /* 0x06 */
U32 Reserved2; /* 0x08 */
U64 SASAddress; /* 0x0C */
U8 LUN[8]; /* 0x14 */
} MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
Mpi2EventDataSasDeviceStatusChange_t,
MPI2_POINTER pMpi2EventDataSasDeviceStatusChange_t;
/* SAS Device Status Change Event data ReasonCode values */
#define MPI2_EVENT_SAS_DEV_STAT_RC_SMART_DATA (0x05)
#define MPI2_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED (0x07)
#define MPI2_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET (0x08)
#define MPI2_EVENT_SAS_DEV_STAT_RC_TASK_ABORT_INTERNAL (0x09)
#define MPI2_EVENT_SAS_DEV_STAT_RC_ABORT_TASK_SET_INTERNAL (0x0A)
#define MPI2_EVENT_SAS_DEV_STAT_RC_CLEAR_TASK_SET_INTERNAL (0x0B)
#define MPI2_EVENT_SAS_DEV_STAT_RC_QUERY_TASK_INTERNAL (0x0C)
#define MPI2_EVENT_SAS_DEV_STAT_RC_ASYNC_NOTIFICATION (0x0D)
#define MPI2_EVENT_SAS_DEV_STAT_RC_CMP_INTERNAL_DEV_RESET (0x0E)
#define MPI2_EVENT_SAS_DEV_STAT_RC_CMP_TASK_ABORT_INTERNAL (0x0F)
#define MPI2_EVENT_SAS_DEV_STAT_RC_SATA_INIT_FAILURE (0x10)
#define MPI2_EVENT_SAS_DEV_STAT_RC_EXPANDER_REDUCED_FUNCTIONALITY (0x11)
#define MPI2_EVENT_SAS_DEV_STAT_RC_CMP_EXPANDER_REDUCED_FUNCTIONALITY (0x12)
/* Integrated RAID Operation Status Event data */
typedef struct _MPI2_EVENT_DATA_IR_OPERATION_STATUS
{
U16 VolDevHandle; /* 0x00 */
U16 Reserved1; /* 0x02 */
U8 RAIDOperation; /* 0x04 */
U8 PercentComplete; /* 0x05 */
U16 Reserved2; /* 0x06 */
U32 ElapsedSeconds; /* 0x08 */
} MPI2_EVENT_DATA_IR_OPERATION_STATUS,
MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_OPERATION_STATUS,
Mpi2EventDataIrOperationStatus_t,
MPI2_POINTER pMpi2EventDataIrOperationStatus_t;
/* Integrated RAID Operation Status Event data RAIDOperation values */
#define MPI2_EVENT_IR_RAIDOP_RESYNC (0x00)
#define MPI2_EVENT_IR_RAIDOP_ONLINE_CAP_EXPANSION (0x01)
#define MPI2_EVENT_IR_RAIDOP_CONSISTENCY_CHECK (0x02)
#define MPI2_EVENT_IR_RAIDOP_BACKGROUND_INIT (0x03)
#define MPI2_EVENT_IR_RAIDOP_MAKE_DATA_CONSISTENT (0x04)
/* Integrated RAID Volume Event data */
typedef struct _MPI2_EVENT_DATA_IR_VOLUME
{
U16 VolDevHandle; /* 0x00 */
U8 ReasonCode; /* 0x02 */
U8 Reserved1; /* 0x03 */
U32 NewValue; /* 0x04 */
U32 PreviousValue; /* 0x08 */
} MPI2_EVENT_DATA_IR_VOLUME, MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_VOLUME,
Mpi2EventDataIrVolume_t, MPI2_POINTER pMpi2EventDataIrVolume_t;
/* Integrated RAID Volume Event data ReasonCode values */
#define MPI2_EVENT_IR_VOLUME_RC_SETTINGS_CHANGED (0x01)
#define MPI2_EVENT_IR_VOLUME_RC_STATUS_FLAGS_CHANGED (0x02)
#define MPI2_EVENT_IR_VOLUME_RC_STATE_CHANGED (0x03)
/* Integrated RAID Physical Disk Event data */
typedef struct _MPI2_EVENT_DATA_IR_PHYSICAL_DISK
{
U16 Reserved1; /* 0x00 */
U8 ReasonCode; /* 0x02 */
U8 PhysDiskNum; /* 0x03 */
U16 PhysDiskDevHandle; /* 0x04 */
U16 Reserved2; /* 0x06 */
U16 Slot; /* 0x08 */
U16 EnclosureHandle; /* 0x0A */
U32 NewValue; /* 0x0C */
U32 PreviousValue; /* 0x10 */
} MPI2_EVENT_DATA_IR_PHYSICAL_DISK,
MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_PHYSICAL_DISK,
Mpi2EventDataIrPhysicalDisk_t, MPI2_POINTER pMpi2EventDataIrPhysicalDisk_t;
/* Integrated RAID Physical Disk Event data ReasonCode values */
#define MPI2_EVENT_IR_PHYSDISK_RC_SETTINGS_CHANGED (0x01)
#define MPI2_EVENT_IR_PHYSDISK_RC_STATUS_FLAGS_CHANGED (0x02)
#define MPI2_EVENT_IR_PHYSDISK_RC_STATE_CHANGED (0x03)
/* Integrated RAID Configuration Change List Event data */
/*
* Host code (drivers, BIOS, utilities, etc.) should leave this define set to
* one and check NumElements at runtime.
*/
#ifndef MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT
#define MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT (1)
#endif
typedef struct _MPI2_EVENT_IR_CONFIG_ELEMENT
{
U16 ElementFlags; /* 0x00 */
U16 VolDevHandle; /* 0x02 */
U8 ReasonCode; /* 0x04 */
U8 PhysDiskNum; /* 0x05 */
U16 PhysDiskDevHandle; /* 0x06 */
} MPI2_EVENT_IR_CONFIG_ELEMENT, MPI2_POINTER PTR_MPI2_EVENT_IR_CONFIG_ELEMENT,
Mpi2EventIrConfigElement_t, MPI2_POINTER pMpi2EventIrConfigElement_t;
/* IR Configuration Change List Event data ElementFlags values */
#define MPI2_EVENT_IR_CHANGE_EFLAGS_ELEMENT_TYPE_MASK (0x000F)
#define MPI2_EVENT_IR_CHANGE_EFLAGS_VOLUME_ELEMENT (0x0000)
#define MPI2_EVENT_IR_CHANGE_EFLAGS_VOLPHYSDISK_ELEMENT (0x0001)
#define MPI2_EVENT_IR_CHANGE_EFLAGS_HOTSPARE_ELEMENT (0x0002)
/* IR Configuration Change List Event data ReasonCode values */
#define MPI2_EVENT_IR_CHANGE_RC_ADDED (0x01)
#define MPI2_EVENT_IR_CHANGE_RC_REMOVED (0x02)
#define MPI2_EVENT_IR_CHANGE_RC_NO_CHANGE (0x03)
#define MPI2_EVENT_IR_CHANGE_RC_HIDE (0x04)
#define MPI2_EVENT_IR_CHANGE_RC_UNHIDE (0x05)
#define MPI2_EVENT_IR_CHANGE_RC_VOLUME_CREATED (0x06)
#define MPI2_EVENT_IR_CHANGE_RC_VOLUME_DELETED (0x07)
#define MPI2_EVENT_IR_CHANGE_RC_PD_CREATED (0x08)
#define MPI2_EVENT_IR_CHANGE_RC_PD_DELETED (0x09)
typedef struct _MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST
{
U8 NumElements; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 Reserved2; /* 0x02 */
U8 ConfigNum; /* 0x03 */
U32 Flags; /* 0x04 */
MPI2_EVENT_IR_CONFIG_ELEMENT ConfigElement[MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT]; /* 0x08 */
} MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST,
MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST,
Mpi2EventDataIrConfigChangeList_t,
MPI2_POINTER pMpi2EventDataIrConfigChangeList_t;
/* IR Configuration Change List Event data Flags values */
#define MPI2_EVENT_IR_CHANGE_FLAGS_FOREIGN_CONFIG (0x00000001)
/* SAS Discovery Event data */
typedef struct _MPI2_EVENT_DATA_SAS_DISCOVERY
{
U8 Flags; /* 0x00 */
U8 ReasonCode; /* 0x01 */
U8 PhysicalPort; /* 0x02 */
U8 Reserved1; /* 0x03 */
U32 DiscoveryStatus; /* 0x04 */
} MPI2_EVENT_DATA_SAS_DISCOVERY,
MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_DISCOVERY,
Mpi2EventDataSasDiscovery_t, MPI2_POINTER pMpi2EventDataSasDiscovery_t;
/* SAS Discovery Event data Flags values */
#define MPI2_EVENT_SAS_DISC_DEVICE_CHANGE (0x02)
#define MPI2_EVENT_SAS_DISC_IN_PROGRESS (0x01)
/* SAS Discovery Event data ReasonCode values */
#define MPI2_EVENT_SAS_DISC_RC_STARTED (0x01)
#define MPI2_EVENT_SAS_DISC_RC_COMPLETED (0x02)
/* SAS Discovery Event data DiscoveryStatus values */
#define MPI2_EVENT_SAS_DISC_DS_MAX_ENCLOSURES_EXCEED (0x80000000)
#define MPI2_EVENT_SAS_DISC_DS_MAX_EXPANDERS_EXCEED (0x40000000)
#define MPI2_EVENT_SAS_DISC_DS_MAX_DEVICES_EXCEED (0x20000000)
#define MPI2_EVENT_SAS_DISC_DS_MAX_TOPO_PHYS_EXCEED (0x10000000)
#define MPI2_EVENT_SAS_DISC_DS_DOWNSTREAM_INITIATOR (0x08000000)
#define MPI2_EVENT_SAS_DISC_DS_MULTI_SUBTRACTIVE_SUBTRACTIVE (0x00008000)
#define MPI2_EVENT_SAS_DISC_DS_EXP_MULTI_SUBTRACTIVE (0x00004000)
#define MPI2_EVENT_SAS_DISC_DS_MULTI_PORT_DOMAIN (0x00002000)
#define MPI2_EVENT_SAS_DISC_DS_TABLE_TO_SUBTRACTIVE_LINK (0x00001000)
#define MPI2_EVENT_SAS_DISC_DS_UNSUPPORTED_DEVICE (0x00000800)
#define MPI2_EVENT_SAS_DISC_DS_TABLE_LINK (0x00000400)
#define MPI2_EVENT_SAS_DISC_DS_SUBTRACTIVE_LINK (0x00000200)
#define MPI2_EVENT_SAS_DISC_DS_SMP_CRC_ERROR (0x00000100)
#define MPI2_EVENT_SAS_DISC_DS_SMP_FUNCTION_FAILED (0x00000080)
#define MPI2_EVENT_SAS_DISC_DS_INDEX_NOT_EXIST (0x00000040)
#define MPI2_EVENT_SAS_DISC_DS_OUT_ROUTE_ENTRIES (0x00000020)
#define MPI2_EVENT_SAS_DISC_DS_SMP_TIMEOUT (0x00000010)
#define MPI2_EVENT_SAS_DISC_DS_MULTIPLE_PORTS (0x00000004)
#define MPI2_EVENT_SAS_DISC_DS_UNADDRESSABLE_DEVICE (0x00000002)
#define MPI2_EVENT_SAS_DISC_DS_LOOP_DETECTED (0x00000001)
/* SAS Broadcast Primitive Event data */
typedef struct _MPI2_EVENT_DATA_SAS_BROADCAST_PRIMITIVE
{
U8 PhyNum; /* 0x00 */
U8 Port; /* 0x01 */
U8 PortWidth; /* 0x02 */
U8 Primitive; /* 0x03 */
} MPI2_EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
Mpi2EventDataSasBroadcastPrimitive_t,
MPI2_POINTER pMpi2EventDataSasBroadcastPrimitive_t;
/* defines for the Primitive field */
#define MPI2_EVENT_PRIMITIVE_CHANGE (0x01)
#define MPI2_EVENT_PRIMITIVE_SES (0x02)
#define MPI2_EVENT_PRIMITIVE_EXPANDER (0x03)
#define MPI2_EVENT_PRIMITIVE_ASYNCHRONOUS_EVENT (0x04)
#define MPI2_EVENT_PRIMITIVE_RESERVED3 (0x05)
#define MPI2_EVENT_PRIMITIVE_RESERVED4 (0x06)
#define MPI2_EVENT_PRIMITIVE_CHANGE0_RESERVED (0x07)
#define MPI2_EVENT_PRIMITIVE_CHANGE1_RESERVED (0x08)
/* SAS Notify Primitive Event data */
typedef struct _MPI2_EVENT_DATA_SAS_NOTIFY_PRIMITIVE {
U8 PhyNum; /* 0x00 */
U8 Port; /* 0x01 */
U8 Reserved1; /* 0x02 */
U8 Primitive; /* 0x03 */
} MPI2_EVENT_DATA_SAS_NOTIFY_PRIMITIVE,
MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_NOTIFY_PRIMITIVE,
Mpi2EventDataSasNotifyPrimitive_t,
MPI2_POINTER pMpi2EventDataSasNotifyPrimitive_t;
/* defines for the Primitive field */
#define MPI2_EVENT_NOTIFY_ENABLE_SPINUP (0x01)
#define MPI2_EVENT_NOTIFY_POWER_LOSS_EXPECTED (0x02)
#define MPI2_EVENT_NOTIFY_RESERVED1 (0x03)
#define MPI2_EVENT_NOTIFY_RESERVED2 (0x04)
/* SAS Initiator Device Status Change Event data */
typedef struct _MPI2_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE
{
U8 ReasonCode; /* 0x00 */
U8 PhysicalPort; /* 0x01 */
U16 DevHandle; /* 0x02 */
U64 SASAddress; /* 0x04 */
} MPI2_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
Mpi2EventDataSasInitDevStatusChange_t,
MPI2_POINTER pMpi2EventDataSasInitDevStatusChange_t;
/* SAS Initiator Device Status Change event ReasonCode values */
#define MPI2_EVENT_SAS_INIT_RC_ADDED (0x01)
#define MPI2_EVENT_SAS_INIT_RC_NOT_RESPONDING (0x02)
/* SAS Initiator Device Table Overflow Event data */
typedef struct _MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW
{
U16 MaxInit; /* 0x00 */
U16 CurrentInit; /* 0x02 */
U64 SASAddress; /* 0x04 */
} MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
Mpi2EventDataSasInitTableOverflow_t,
MPI2_POINTER pMpi2EventDataSasInitTableOverflow_t;
/* SAS Topology Change List Event data */
/*
* Host code (drivers, BIOS, utilities, etc.) should leave this define set to
* one and check NumEntries at runtime.
*/
#ifndef MPI2_EVENT_SAS_TOPO_PHY_COUNT
#define MPI2_EVENT_SAS_TOPO_PHY_COUNT (1)
#endif
typedef struct _MPI2_EVENT_SAS_TOPO_PHY_ENTRY
{
U16 AttachedDevHandle; /* 0x00 */
U8 LinkRate; /* 0x02 */
U8 PhyStatus; /* 0x03 */
} MPI2_EVENT_SAS_TOPO_PHY_ENTRY, MPI2_POINTER PTR_MPI2_EVENT_SAS_TOPO_PHY_ENTRY,
Mpi2EventSasTopoPhyEntry_t, MPI2_POINTER pMpi2EventSasTopoPhyEntry_t;
typedef struct _MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST
{
U16 EnclosureHandle; /* 0x00 */
U16 ExpanderDevHandle; /* 0x02 */
U8 NumPhys; /* 0x04 */
U8 Reserved1; /* 0x05 */
U16 Reserved2; /* 0x06 */
U8 NumEntries; /* 0x08 */
U8 StartPhyNum; /* 0x09 */
U8 ExpStatus; /* 0x0A */
U8 PhysicalPort; /* 0x0B */
MPI2_EVENT_SAS_TOPO_PHY_ENTRY PHY[MPI2_EVENT_SAS_TOPO_PHY_COUNT]; /* 0x0C*/
} MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST,
MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST,
Mpi2EventDataSasTopologyChangeList_t,
MPI2_POINTER pMpi2EventDataSasTopologyChangeList_t;
/* values for the ExpStatus field */
#define MPI2_EVENT_SAS_TOPO_ES_NO_EXPANDER (0x00)
#define MPI2_EVENT_SAS_TOPO_ES_ADDED (0x01)
#define MPI2_EVENT_SAS_TOPO_ES_NOT_RESPONDING (0x02)
#define MPI2_EVENT_SAS_TOPO_ES_RESPONDING (0x03)
#define MPI2_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING (0x04)
/* defines for the LinkRate field */
#define MPI2_EVENT_SAS_TOPO_LR_CURRENT_MASK (0xF0)
#define MPI2_EVENT_SAS_TOPO_LR_CURRENT_SHIFT (4)
#define MPI2_EVENT_SAS_TOPO_LR_PREV_MASK (0x0F)
#define MPI2_EVENT_SAS_TOPO_LR_PREV_SHIFT (0)
#define MPI2_EVENT_SAS_TOPO_LR_UNKNOWN_LINK_RATE (0x00)
#define MPI2_EVENT_SAS_TOPO_LR_PHY_DISABLED (0x01)
#define MPI2_EVENT_SAS_TOPO_LR_NEGOTIATION_FAILED (0x02)
#define MPI2_EVENT_SAS_TOPO_LR_SATA_OOB_COMPLETE (0x03)
#define MPI2_EVENT_SAS_TOPO_LR_PORT_SELECTOR (0x04)
#define MPI2_EVENT_SAS_TOPO_LR_SMP_RESET_IN_PROGRESS (0x05)
#define MPI2_EVENT_SAS_TOPO_LR_UNSUPPORTED_PHY (0x06)
#define MPI2_EVENT_SAS_TOPO_LR_RATE_1_5 (0x08)
#define MPI2_EVENT_SAS_TOPO_LR_RATE_3_0 (0x09)
#define MPI2_EVENT_SAS_TOPO_LR_RATE_6_0 (0x0A)
/* values for the PhyStatus field */
#define MPI2_EVENT_SAS_TOPO_PHYSTATUS_VACANT (0x80)
#define MPI2_EVENT_SAS_TOPO_PS_MULTIPLEX_CHANGE (0x10)
/* values for the PhyStatus ReasonCode sub-field */
#define MPI2_EVENT_SAS_TOPO_RC_MASK (0x0F)
#define MPI2_EVENT_SAS_TOPO_RC_TARG_ADDED (0x01)
#define MPI2_EVENT_SAS_TOPO_RC_TARG_NOT_RESPONDING (0x02)
#define MPI2_EVENT_SAS_TOPO_RC_PHY_CHANGED (0x03)
#define MPI2_EVENT_SAS_TOPO_RC_NO_CHANGE (0x04)
#define MPI2_EVENT_SAS_TOPO_RC_DELAY_NOT_RESPONDING (0x05)
/* SAS Enclosure Device Status Change Event data */
typedef struct _MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE
{
U16 EnclosureHandle; /* 0x00 */
U8 ReasonCode; /* 0x02 */
U8 PhysicalPort; /* 0x03 */
U64 EnclosureLogicalID; /* 0x04 */
U16 NumSlots; /* 0x0C */
U16 StartSlot; /* 0x0E */
U32 PhyBits; /* 0x10 */
} MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE,
MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE,
Mpi2EventDataSasEnclDevStatusChange_t,
MPI2_POINTER pMpi2EventDataSasEnclDevStatusChange_t;
/* SAS Enclosure Device Status Change event ReasonCode values */
#define MPI2_EVENT_SAS_ENCL_RC_ADDED (0x01)
#define MPI2_EVENT_SAS_ENCL_RC_NOT_RESPONDING (0x02)
/* SAS PHY Counter Event data */
typedef struct _MPI2_EVENT_DATA_SAS_PHY_COUNTER {
U64 TimeStamp; /* 0x00 */
U32 Reserved1; /* 0x08 */
U8 PhyEventCode; /* 0x0C */
U8 PhyNum; /* 0x0D */
U16 Reserved2; /* 0x0E */
U32 PhyEventInfo; /* 0x10 */
U8 CounterType; /* 0x14 */
U8 ThresholdWindow; /* 0x15 */
U8 TimeUnits; /* 0x16 */
U8 Reserved3; /* 0x17 */
U32 EventThreshold; /* 0x18 */
U16 ThresholdFlags; /* 0x1C */
U16 Reserved4; /* 0x1E */
} MPI2_EVENT_DATA_SAS_PHY_COUNTER,
MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_PHY_COUNTER,
Mpi2EventDataSasPhyCounter_t, MPI2_POINTER pMpi2EventDataSasPhyCounter_t;
/* use MPI2_SASPHY3_EVENT_CODE_ values from mpi2_cnfg.h for the
* PhyEventCode field
* use MPI2_SASPHY3_COUNTER_TYPE_ values from mpi2_cnfg.h for the
* CounterType field
* use MPI2_SASPHY3_TIME_UNITS_ values from mpi2_cnfg.h for the
* TimeUnits field
* use MPI2_SASPHY3_TFLAGS_ values from mpi2_cnfg.h for the
* ThresholdFlags field
* */
/* SAS Quiesce Event data */
typedef struct _MPI2_EVENT_DATA_SAS_QUIESCE {
U8 ReasonCode; /* 0x00 */
U8 Reserved1; /* 0x01 */
U16 Reserved2; /* 0x02 */
U32 Reserved3; /* 0x04 */
} MPI2_EVENT_DATA_SAS_QUIESCE,
MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_QUIESCE,
Mpi2EventDataSasQuiesce_t, MPI2_POINTER pMpi2EventDataSasQuiesce_t;
/* SAS Quiesce Event data ReasonCode values */
#define MPI2_EVENT_SAS_QUIESCE_RC_STARTED (0x01)
#define MPI2_EVENT_SAS_QUIESCE_RC_COMPLETED (0x02)
/* Host Based Discovery Phy Event data */
typedef struct _MPI2_EVENT_HBD_PHY_SAS {
U8 Flags; /* 0x00 */
U8 NegotiatedLinkRate; /* 0x01 */
U8 PhyNum; /* 0x02 */
U8 PhysicalPort; /* 0x03 */
U32 Reserved1; /* 0x04 */
U8 InitialFrame[28]; /* 0x08 */
} MPI2_EVENT_HBD_PHY_SAS, MPI2_POINTER PTR_MPI2_EVENT_HBD_PHY_SAS,
Mpi2EventHbdPhySas_t, MPI2_POINTER pMpi2EventHbdPhySas_t;
/* values for the Flags field */
#define MPI2_EVENT_HBD_SAS_FLAGS_FRAME_VALID (0x02)
#define MPI2_EVENT_HBD_SAS_FLAGS_SATA_FRAME (0x01)
/* use MPI2_SAS_NEG_LINK_RATE_ defines from mpi2_cnfg.h for
* the NegotiatedLinkRate field */
typedef union _MPI2_EVENT_HBD_DESCRIPTOR {
MPI2_EVENT_HBD_PHY_SAS Sas;
} MPI2_EVENT_HBD_DESCRIPTOR, MPI2_POINTER PTR_MPI2_EVENT_HBD_DESCRIPTOR,
Mpi2EventHbdDescriptor_t, MPI2_POINTER pMpi2EventHbdDescriptor_t;
typedef struct _MPI2_EVENT_DATA_HBD_PHY {
U8 DescriptorType; /* 0x00 */
U8 Reserved1; /* 0x01 */
U16 Reserved2; /* 0x02 */
U32 Reserved3; /* 0x04 */
MPI2_EVENT_HBD_DESCRIPTOR Descriptor; /* 0x08 */
} MPI2_EVENT_DATA_HBD_PHY, MPI2_POINTER PTR_MPI2_EVENT_DATA_HBD_PHY,
Mpi2EventDataHbdPhy_t, MPI2_POINTER pMpi2EventDataMpi2EventDataHbdPhy_t;
/* values for the DescriptorType field */
#define MPI2_EVENT_HBD_DT_SAS (0x01)
/****************************************************************************
* EventAck message
****************************************************************************/
/* EventAck Request message */
typedef struct _MPI2_EVENT_ACK_REQUEST
{
U16 Reserved1; /* 0x00 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U16 Event; /* 0x0C */
U16 Reserved5; /* 0x0E */
U32 EventContext; /* 0x10 */
} MPI2_EVENT_ACK_REQUEST, MPI2_POINTER PTR_MPI2_EVENT_ACK_REQUEST,
Mpi2EventAckRequest_t, MPI2_POINTER pMpi2EventAckRequest_t;
/* EventAck Reply message */
typedef struct _MPI2_EVENT_ACK_REPLY
{
U16 Reserved1; /* 0x00 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U16 Reserved5; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
} MPI2_EVENT_ACK_REPLY, MPI2_POINTER PTR_MPI2_EVENT_ACK_REPLY,
Mpi2EventAckReply_t, MPI2_POINTER pMpi2EventAckReply_t;
/****************************************************************************
* SendHostMessage message
****************************************************************************/
/* SendHostMessage Request message */
typedef struct _MPI2_SEND_HOST_MESSAGE_REQUEST {
U16 HostDataLength; /* 0x00 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved1; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U8 Reserved4; /* 0x0C */
U8 DestVF_ID; /* 0x0D */
U16 Reserved5; /* 0x0E */
U32 Reserved6; /* 0x10 */
U32 Reserved7; /* 0x14 */
U32 Reserved8; /* 0x18 */
U32 Reserved9; /* 0x1C */
U32 Reserved10; /* 0x20 */
U32 HostData[1]; /* 0x24 */
} MPI2_SEND_HOST_MESSAGE_REQUEST,
MPI2_POINTER PTR_MPI2_SEND_HOST_MESSAGE_REQUEST,
Mpi2SendHostMessageRequest_t, MPI2_POINTER pMpi2SendHostMessageRequest_t;
/* SendHostMessage Reply message */
typedef struct _MPI2_SEND_HOST_MESSAGE_REPLY {
U16 HostDataLength; /* 0x00 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved1; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 Reserved4; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
} MPI2_SEND_HOST_MESSAGE_REPLY, MPI2_POINTER PTR_MPI2_SEND_HOST_MESSAGE_REPLY,
Mpi2SendHostMessageReply_t, MPI2_POINTER pMpi2SendHostMessageReply_t;
/****************************************************************************
* FWDownload message
****************************************************************************/
/* FWDownload Request message */
typedef struct _MPI2_FW_DOWNLOAD_REQUEST
{
U8 ImageType; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U32 TotalImageSize; /* 0x0C */
U32 Reserved5; /* 0x10 */
MPI2_MPI_SGE_UNION SGL; /* 0x14 */
} MPI2_FW_DOWNLOAD_REQUEST, MPI2_POINTER PTR_MPI2_FW_DOWNLOAD_REQUEST,
Mpi2FWDownloadRequest, MPI2_POINTER pMpi2FWDownloadRequest;
#define MPI2_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT (0x01)
#define MPI2_FW_DOWNLOAD_ITYPE_FW (0x01)
#define MPI2_FW_DOWNLOAD_ITYPE_BIOS (0x02)
#define MPI2_FW_DOWNLOAD_ITYPE_MANUFACTURING (0x06)
#define MPI2_FW_DOWNLOAD_ITYPE_CONFIG_1 (0x07)
#define MPI2_FW_DOWNLOAD_ITYPE_CONFIG_2 (0x08)
#define MPI2_FW_DOWNLOAD_ITYPE_MEGARAID (0x09)
#define MPI2_FW_DOWNLOAD_ITYPE_COMPLETE (0x0A)
#define MPI2_FW_DOWNLOAD_ITYPE_COMMON_BOOT_BLOCK (0x0B)
#define MPI2_FW_DOWNLOAD_ITYPE_PUBLIC_KEY (0x0C)
#define MPI2_FW_DOWNLOAD_ITYPE_MIN_PRODUCT_SPECIFIC (0xF0)
/* FWDownload TransactionContext Element */
typedef struct _MPI2_FW_DOWNLOAD_TCSGE
{
U8 Reserved1; /* 0x00 */
U8 ContextSize; /* 0x01 */
U8 DetailsLength; /* 0x02 */
U8 Flags; /* 0x03 */
U32 Reserved2; /* 0x04 */
U32 ImageOffset; /* 0x08 */
U32 ImageSize; /* 0x0C */
} MPI2_FW_DOWNLOAD_TCSGE, MPI2_POINTER PTR_MPI2_FW_DOWNLOAD_TCSGE,
Mpi2FWDownloadTCSGE_t, MPI2_POINTER pMpi2FWDownloadTCSGE_t;
/* FWDownload Reply message */
typedef struct _MPI2_FW_DOWNLOAD_REPLY
{
U8 ImageType; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U16 Reserved5; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
} MPI2_FW_DOWNLOAD_REPLY, MPI2_POINTER PTR_MPI2_FW_DOWNLOAD_REPLY,
Mpi2FWDownloadReply_t, MPI2_POINTER pMpi2FWDownloadReply_t;
/****************************************************************************
* FWUpload message
****************************************************************************/
/* FWUpload Request message */
typedef struct _MPI2_FW_UPLOAD_REQUEST
{
U8 ImageType; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U32 Reserved5; /* 0x0C */
U32 Reserved6; /* 0x10 */
MPI2_MPI_SGE_UNION SGL; /* 0x14 */
} MPI2_FW_UPLOAD_REQUEST, MPI2_POINTER PTR_MPI2_FW_UPLOAD_REQUEST,
Mpi2FWUploadRequest_t, MPI2_POINTER pMpi2FWUploadRequest_t;
#define MPI2_FW_UPLOAD_ITYPE_FW_CURRENT (0x00)
#define MPI2_FW_UPLOAD_ITYPE_FW_FLASH (0x01)
#define MPI2_FW_UPLOAD_ITYPE_BIOS_FLASH (0x02)
#define MPI2_FW_UPLOAD_ITYPE_FW_BACKUP (0x05)
#define MPI2_FW_UPLOAD_ITYPE_MANUFACTURING (0x06)
#define MPI2_FW_UPLOAD_ITYPE_CONFIG_1 (0x07)
#define MPI2_FW_UPLOAD_ITYPE_CONFIG_2 (0x08)
#define MPI2_FW_UPLOAD_ITYPE_MEGARAID (0x09)
#define MPI2_FW_UPLOAD_ITYPE_COMPLETE (0x0A)
#define MPI2_FW_UPLOAD_ITYPE_COMMON_BOOT_BLOCK (0x0B)
typedef struct _MPI2_FW_UPLOAD_TCSGE
{
U8 Reserved1; /* 0x00 */
U8 ContextSize; /* 0x01 */
U8 DetailsLength; /* 0x02 */
U8 Flags; /* 0x03 */
U32 Reserved2; /* 0x04 */
U32 ImageOffset; /* 0x08 */
U32 ImageSize; /* 0x0C */
} MPI2_FW_UPLOAD_TCSGE, MPI2_POINTER PTR_MPI2_FW_UPLOAD_TCSGE,
Mpi2FWUploadTCSGE_t, MPI2_POINTER pMpi2FWUploadTCSGE_t;
/* FWUpload Reply message */
typedef struct _MPI2_FW_UPLOAD_REPLY
{
U8 ImageType; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U16 Reserved5; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U32 ActualImageSize; /* 0x14 */
} MPI2_FW_UPLOAD_REPLY, MPI2_POINTER PTR_MPI2_FW_UPLOAD_REPLY,
Mpi2FWUploadReply_t, MPI2_POINTER pMPi2FWUploadReply_t;
/* FW Image Header */
typedef struct _MPI2_FW_IMAGE_HEADER
{
U32 Signature; /* 0x00 */
U32 Signature0; /* 0x04 */
U32 Signature1; /* 0x08 */
U32 Signature2; /* 0x0C */
MPI2_VERSION_UNION MPIVersion; /* 0x10 */
MPI2_VERSION_UNION FWVersion; /* 0x14 */
MPI2_VERSION_UNION NVDATAVersion; /* 0x18 */
MPI2_VERSION_UNION PackageVersion; /* 0x1C */
U16 VendorID; /* 0x20 */
U16 ProductID; /* 0x22 */
U16 ProtocolFlags; /* 0x24 */
U16 Reserved26; /* 0x26 */
U32 IOCCapabilities; /* 0x28 */
U32 ImageSize; /* 0x2C */
U32 NextImageHeaderOffset; /* 0x30 */
U32 Checksum; /* 0x34 */
U32 Reserved38; /* 0x38 */
U32 Reserved3C; /* 0x3C */
U32 Reserved40; /* 0x40 */
U32 Reserved44; /* 0x44 */
U32 Reserved48; /* 0x48 */
U32 Reserved4C; /* 0x4C */
U32 Reserved50; /* 0x50 */
U32 Reserved54; /* 0x54 */
U32 Reserved58; /* 0x58 */
U32 Reserved5C; /* 0x5C */
U32 Reserved60; /* 0x60 */
U32 FirmwareVersionNameWhat; /* 0x64 */
U8 FirmwareVersionName[32]; /* 0x68 */
U32 VendorNameWhat; /* 0x88 */
U8 VendorName[32]; /* 0x8C */
U32 PackageNameWhat; /* 0x88 */
U8 PackageName[32]; /* 0x8C */
U32 ReservedD0; /* 0xD0 */
U32 ReservedD4; /* 0xD4 */
U32 ReservedD8; /* 0xD8 */
U32 ReservedDC; /* 0xDC */
U32 ReservedE0; /* 0xE0 */
U32 ReservedE4; /* 0xE4 */
U32 ReservedE8; /* 0xE8 */
U32 ReservedEC; /* 0xEC */
U32 ReservedF0; /* 0xF0 */
U32 ReservedF4; /* 0xF4 */
U32 ReservedF8; /* 0xF8 */
U32 ReservedFC; /* 0xFC */
} MPI2_FW_IMAGE_HEADER, MPI2_POINTER PTR_MPI2_FW_IMAGE_HEADER,
Mpi2FWImageHeader_t, MPI2_POINTER pMpi2FWImageHeader_t;
/* Signature field */
#define MPI2_FW_HEADER_SIGNATURE_OFFSET (0x00)
#define MPI2_FW_HEADER_SIGNATURE_MASK (0xFF000000)
#define MPI2_FW_HEADER_SIGNATURE (0xEA000000)
/* Signature0 field */
#define MPI2_FW_HEADER_SIGNATURE0_OFFSET (0x04)
#define MPI2_FW_HEADER_SIGNATURE0 (0x5AFAA55A)
/* Signature1 field */
#define MPI2_FW_HEADER_SIGNATURE1_OFFSET (0x08)
#define MPI2_FW_HEADER_SIGNATURE1 (0xA55AFAA5)
/* Signature2 field */
#define MPI2_FW_HEADER_SIGNATURE2_OFFSET (0x0C)
#define MPI2_FW_HEADER_SIGNATURE2 (0x5AA55AFA)
/* defines for using the ProductID field */
#define MPI2_FW_HEADER_PID_TYPE_MASK (0xF000)
#define MPI2_FW_HEADER_PID_TYPE_SAS (0x2000)
#define MPI2_FW_HEADER_PID_PROD_MASK (0x0F00)
#define MPI2_FW_HEADER_PID_PROD_A (0x0000)
#define MPI2_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI (0x0200)
#define MPI2_FW_HEADER_PID_PROD_IR_SCSI (0x0700)
#define MPI2_FW_HEADER_PID_FAMILY_MASK (0x00FF)
/* SAS */
#define MPI2_FW_HEADER_PID_FAMILY_2108_SAS (0x0013)
#define MPI2_FW_HEADER_PID_FAMILY_2208_SAS (0x0014)
/* use MPI2_IOCFACTS_PROTOCOL_ defines for ProtocolFlags field */
/* use MPI2_IOCFACTS_CAPABILITY_ defines for IOCCapabilities field */
#define MPI2_FW_HEADER_IMAGESIZE_OFFSET (0x2C)
#define MPI2_FW_HEADER_NEXTIMAGE_OFFSET (0x30)
#define MPI2_FW_HEADER_VERNMHWAT_OFFSET (0x64)
#define MPI2_FW_HEADER_WHAT_SIGNATURE (0x29232840)
#define MPI2_FW_HEADER_SIZE (0x100)
/* Extended Image Header */
typedef struct _MPI2_EXT_IMAGE_HEADER
{
U8 ImageType; /* 0x00 */
U8 Reserved1; /* 0x01 */
U16 Reserved2; /* 0x02 */
U32 Checksum; /* 0x04 */
U32 ImageSize; /* 0x08 */
U32 NextImageHeaderOffset; /* 0x0C */
U32 PackageVersion; /* 0x10 */
U32 Reserved3; /* 0x14 */
U32 Reserved4; /* 0x18 */
U32 Reserved5; /* 0x1C */
U8 IdentifyString[32]; /* 0x20 */
} MPI2_EXT_IMAGE_HEADER, MPI2_POINTER PTR_MPI2_EXT_IMAGE_HEADER,
Mpi2ExtImageHeader_t, MPI2_POINTER pMpi2ExtImageHeader_t;
/* useful offsets */
#define MPI2_EXT_IMAGE_IMAGETYPE_OFFSET (0x00)
#define MPI2_EXT_IMAGE_IMAGESIZE_OFFSET (0x08)
#define MPI2_EXT_IMAGE_NEXTIMAGE_OFFSET (0x0C)
#define MPI2_EXT_IMAGE_HEADER_SIZE (0x40)
/* defines for the ImageType field */
#define MPI2_EXT_IMAGE_TYPE_UNSPECIFIED (0x00)
#define MPI2_EXT_IMAGE_TYPE_FW (0x01)
#define MPI2_EXT_IMAGE_TYPE_NVDATA (0x03)
#define MPI2_EXT_IMAGE_TYPE_BOOTLOADER (0x04)
#define MPI2_EXT_IMAGE_TYPE_INITIALIZATION (0x05)
#define MPI2_EXT_IMAGE_TYPE_FLASH_LAYOUT (0x06)
#define MPI2_EXT_IMAGE_TYPE_SUPPORTED_DEVICES (0x07)
#define MPI2_EXT_IMAGE_TYPE_MEGARAID (0x08)
#define MPI2_EXT_IMAGE_TYPE_ENCRYPTED_HASH (0x09)
#define MPI2_EXT_IMAGE_TYPE_MIN_PRODUCT_SPECIFIC (0x80)
#define MPI2_EXT_IMAGE_TYPE_MAX_PRODUCT_SPECIFIC (0xFF)
#define MPI2_EXT_IMAGE_TYPE_MAX \
(MPI2_EXT_IMAGE_TYPE_MAX_PRODUCT_SPECIFIC) /* deprecated */
/* FLASH Layout Extended Image Data */
/*
* Host code (drivers, BIOS, utilities, etc.) should leave this define set to
* one and check RegionsPerLayout at runtime.
*/
#ifndef MPI2_FLASH_NUMBER_OF_REGIONS
#define MPI2_FLASH_NUMBER_OF_REGIONS (1)
#endif
/*
* Host code (drivers, BIOS, utilities, etc.) should leave this define set to
* one and check NumberOfLayouts at runtime.
*/
#ifndef MPI2_FLASH_NUMBER_OF_LAYOUTS
#define MPI2_FLASH_NUMBER_OF_LAYOUTS (1)
#endif
typedef struct _MPI2_FLASH_REGION
{
U8 RegionType; /* 0x00 */
U8 Reserved1; /* 0x01 */
U16 Reserved2; /* 0x02 */
U32 RegionOffset; /* 0x04 */
U32 RegionSize; /* 0x08 */
U32 Reserved3; /* 0x0C */
} MPI2_FLASH_REGION, MPI2_POINTER PTR_MPI2_FLASH_REGION,
Mpi2FlashRegion_t, MPI2_POINTER pMpi2FlashRegion_t;
typedef struct _MPI2_FLASH_LAYOUT
{
U32 FlashSize; /* 0x00 */
U32 Reserved1; /* 0x04 */
U32 Reserved2; /* 0x08 */
U32 Reserved3; /* 0x0C */
MPI2_FLASH_REGION Region[MPI2_FLASH_NUMBER_OF_REGIONS];/* 0x10 */
} MPI2_FLASH_LAYOUT, MPI2_POINTER PTR_MPI2_FLASH_LAYOUT,
Mpi2FlashLayout_t, MPI2_POINTER pMpi2FlashLayout_t;
typedef struct _MPI2_FLASH_LAYOUT_DATA
{
U8 ImageRevision; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 SizeOfRegion; /* 0x02 */
U8 Reserved2; /* 0x03 */
U16 NumberOfLayouts; /* 0x04 */
U16 RegionsPerLayout; /* 0x06 */
U16 MinimumSectorAlignment; /* 0x08 */
U16 Reserved3; /* 0x0A */
U32 Reserved4; /* 0x0C */
MPI2_FLASH_LAYOUT Layout[MPI2_FLASH_NUMBER_OF_LAYOUTS];/* 0x10 */
} MPI2_FLASH_LAYOUT_DATA, MPI2_POINTER PTR_MPI2_FLASH_LAYOUT_DATA,
Mpi2FlashLayoutData_t, MPI2_POINTER pMpi2FlashLayoutData_t;
/* defines for the RegionType field */
#define MPI2_FLASH_REGION_UNUSED (0x00)
#define MPI2_FLASH_REGION_FIRMWARE (0x01)
#define MPI2_FLASH_REGION_BIOS (0x02)
#define MPI2_FLASH_REGION_NVDATA (0x03)
#define MPI2_FLASH_REGION_FIRMWARE_BACKUP (0x05)
#define MPI2_FLASH_REGION_MFG_INFORMATION (0x06)
#define MPI2_FLASH_REGION_CONFIG_1 (0x07)
#define MPI2_FLASH_REGION_CONFIG_2 (0x08)
#define MPI2_FLASH_REGION_MEGARAID (0x09)
#define MPI2_FLASH_REGION_INIT (0x0A)
/* ImageRevision */
#define MPI2_FLASH_LAYOUT_IMAGE_REVISION (0x00)
/* Supported Devices Extended Image Data */
/*
* Host code (drivers, BIOS, utilities, etc.) should leave this define set to
* one and check NumberOfDevices at runtime.
*/
#ifndef MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES
#define MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES (1)
#endif
typedef struct _MPI2_SUPPORTED_DEVICE
{
U16 DeviceID; /* 0x00 */
U16 VendorID; /* 0x02 */
U16 DeviceIDMask; /* 0x04 */
U16 Reserved1; /* 0x06 */
U8 LowPCIRev; /* 0x08 */
U8 HighPCIRev; /* 0x09 */
U16 Reserved2; /* 0x0A */
U32 Reserved3; /* 0x0C */
} MPI2_SUPPORTED_DEVICE, MPI2_POINTER PTR_MPI2_SUPPORTED_DEVICE,
Mpi2SupportedDevice_t, MPI2_POINTER pMpi2SupportedDevice_t;
typedef struct _MPI2_SUPPORTED_DEVICES_DATA
{
U8 ImageRevision; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 NumberOfDevices; /* 0x02 */
U8 Reserved2; /* 0x03 */
U32 Reserved3; /* 0x04 */
MPI2_SUPPORTED_DEVICE SupportedDevice[MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES]; /* 0x08 */
} MPI2_SUPPORTED_DEVICES_DATA, MPI2_POINTER PTR_MPI2_SUPPORTED_DEVICES_DATA,
Mpi2SupportedDevicesData_t, MPI2_POINTER pMpi2SupportedDevicesData_t;
/* ImageRevision */
#define MPI2_SUPPORTED_DEVICES_IMAGE_REVISION (0x00)
/* Init Extended Image Data */
typedef struct _MPI2_INIT_IMAGE_FOOTER
{
U32 BootFlags; /* 0x00 */
U32 ImageSize; /* 0x04 */
U32 Signature0; /* 0x08 */
U32 Signature1; /* 0x0C */
U32 Signature2; /* 0x10 */
U32 ResetVector; /* 0x14 */
} MPI2_INIT_IMAGE_FOOTER, MPI2_POINTER PTR_MPI2_INIT_IMAGE_FOOTER,
Mpi2InitImageFooter_t, MPI2_POINTER pMpi2InitImageFooter_t;
/* defines for the BootFlags field */
#define MPI2_INIT_IMAGE_BOOTFLAGS_OFFSET (0x00)
/* defines for the ImageSize field */
#define MPI2_INIT_IMAGE_IMAGESIZE_OFFSET (0x04)
/* defines for the Signature0 field */
#define MPI2_INIT_IMAGE_SIGNATURE0_OFFSET (0x08)
#define MPI2_INIT_IMAGE_SIGNATURE0 (0x5AA55AEA)
/* defines for the Signature1 field */
#define MPI2_INIT_IMAGE_SIGNATURE1_OFFSET (0x0C)
#define MPI2_INIT_IMAGE_SIGNATURE1 (0xA55AEAA5)
/* defines for the Signature2 field */
#define MPI2_INIT_IMAGE_SIGNATURE2_OFFSET (0x10)
#define MPI2_INIT_IMAGE_SIGNATURE2 (0x5AEAA55A)
/* Signature fields as individual bytes */
#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_0 (0xEA)
#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_1 (0x5A)
#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_2 (0xA5)
#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_3 (0x5A)
#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_4 (0xA5)
#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_5 (0xEA)
#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_6 (0x5A)
#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_7 (0xA5)
#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_8 (0x5A)
#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_9 (0xA5)
#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_A (0xEA)
#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_B (0x5A)
/* defines for the ResetVector field */
#define MPI2_INIT_IMAGE_RESETVECTOR_OFFSET (0x14)
/* Encrypted Hash Extended Image Data */
typedef struct _MPI25_ENCRYPTED_HASH_ENTRY {
U8 HashImageType; /* 0x00 */
U8 HashAlgorithm; /* 0x01 */
U8 EncryptionAlgorithm; /* 0x02 */
U8 Reserved1; /* 0x03 */
U32 Reserved2; /* 0x04 */
U32 EncryptedHash[1]; /* 0x08 */
} MPI25_ENCRYPTED_HASH_ENTRY, MPI2_POINTER PTR_MPI25_ENCRYPTED_HASH_ENTRY,
Mpi25EncryptedHashEntry_t, MPI2_POINTER pMpi25EncryptedHashEntry_t;
/* values for HashImageType */
#define MPI25_HASH_IMAGE_TYPE_UNUSED (0x00)
#define MPI25_HASH_IMAGE_TYPE_FIRMWARE (0x01)
#define MPI25_HASH_IMAGE_TYPE_BIOS (0x02)
/* values for HashAlgorithm */
#define MPI25_HASH_ALGORITHM_UNUSED (0x00)
#define MPI25_HASH_ALGORITHM_SHA256 (0x01)
/* values for EncryptionAlgorithm */
#define MPI25_ENCRYPTION_ALG_UNUSED (0x00)
#define MPI25_ENCRYPTION_ALG_RSA256 (0x01)
typedef struct _MPI25_ENCRYPTED_HASH_DATA {
U8 ImageVersion; /* 0x00 */
U8 NumHash; /* 0x01 */
U16 Reserved1; /* 0x02 */
U32 Reserved2; /* 0x04 */
MPI25_ENCRYPTED_HASH_ENTRY EncryptedHashEntry[1]; /* 0x08 */
} MPI25_ENCRYPTED_HASH_DATA, MPI2_POINTER PTR_MPI25_ENCRYPTED_HASH_DATA,
Mpi25EncryptedHashData_t, MPI2_POINTER pMpi25EncryptedHashData_t;
/****************************************************************************
* PowerManagementControl message
****************************************************************************/
/* PowerManagementControl Request message */
typedef struct _MPI2_PWR_MGMT_CONTROL_REQUEST {
U8 Feature; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U8 Parameter1; /* 0x0C */
U8 Parameter2; /* 0x0D */
U8 Parameter3; /* 0x0E */
U8 Parameter4; /* 0x0F */
U32 Reserved5; /* 0x10 */
U32 Reserved6; /* 0x14 */
} MPI2_PWR_MGMT_CONTROL_REQUEST, MPI2_POINTER PTR_MPI2_PWR_MGMT_CONTROL_REQUEST,
Mpi2PwrMgmtControlRequest_t, MPI2_POINTER pMpi2PwrMgmtControlRequest_t;
/* defines for the Feature field */
#define MPI2_PM_CONTROL_FEATURE_DA_PHY_POWER_COND (0x01)
#define MPI2_PM_CONTROL_FEATURE_PORT_WIDTH_MODULATION (0x02)
#define MPI2_PM_CONTROL_FEATURE_PCIE_LINK (0x03) /* obsolete */
#define MPI2_PM_CONTROL_FEATURE_IOC_SPEED (0x04)
#define MPI2_PM_CONTROL_FEATURE_MIN_PRODUCT_SPECIFIC (0x80)
#define MPI2_PM_CONTROL_FEATURE_MAX_PRODUCT_SPECIFIC (0xFF)
/* parameter usage for the MPI2_PM_CONTROL_FEATURE_DA_PHY_POWER_COND Feature */
/* Parameter1 contains a PHY number */
/* Parameter2 indicates power condition action using these defines */
#define MPI2_PM_CONTROL_PARAM2_PARTIAL (0x01)
#define MPI2_PM_CONTROL_PARAM2_SLUMBER (0x02)
#define MPI2_PM_CONTROL_PARAM2_EXIT_PWR_MGMT (0x03)
/* Parameter3 and Parameter4 are reserved */
/* parameter usage for the MPI2_PM_CONTROL_FEATURE_PORT_WIDTH_MODULATION
* Feature */
/* Parameter1 contains SAS port width modulation group number */
/* Parameter2 indicates IOC action using these defines */
#define MPI2_PM_CONTROL_PARAM2_REQUEST_OWNERSHIP (0x01)
#define MPI2_PM_CONTROL_PARAM2_CHANGE_MODULATION (0x02)
#define MPI2_PM_CONTROL_PARAM2_RELINQUISH_OWNERSHIP (0x03)
/* Parameter3 indicates desired modulation level using these defines */
#define MPI2_PM_CONTROL_PARAM3_25_PERCENT (0x00)
#define MPI2_PM_CONTROL_PARAM3_50_PERCENT (0x01)
#define MPI2_PM_CONTROL_PARAM3_75_PERCENT (0x02)
#define MPI2_PM_CONTROL_PARAM3_100_PERCENT (0x03)
/* Parameter4 is reserved */
/* parameter usage for the MPI2_PM_CONTROL_FEATURE_PCIE_LINK Feature */
/* Parameter1 indicates desired PCIe link speed using these defines */
#define MPI2_PM_CONTROL_PARAM1_PCIE_2_5_GBPS (0x00) /* obsolete */
#define MPI2_PM_CONTROL_PARAM1_PCIE_5_0_GBPS (0x01) /* obsolete */
#define MPI2_PM_CONTROL_PARAM1_PCIE_8_0_GBPS (0x02) /* obsolete */
/* Parameter2 indicates desired PCIe link width using these defines */
#define MPI2_PM_CONTROL_PARAM2_WIDTH_X1 (0x01) /* obsolete */
#define MPI2_PM_CONTROL_PARAM2_WIDTH_X2 (0x02) /* obsolete */
#define MPI2_PM_CONTROL_PARAM2_WIDTH_X4 (0x04) /* obsolete */
#define MPI2_PM_CONTROL_PARAM2_WIDTH_X8 (0x08) /* obsolete */
/* Parameter3 and Parameter4 are reserved */
/* parameter usage for the MPI2_PM_CONTROL_FEATURE_IOC_SPEED Feature */
/* Parameter1 indicates desired IOC hardware clock speed using these defines */
#define MPI2_PM_CONTROL_PARAM1_FULL_IOC_SPEED (0x01)
#define MPI2_PM_CONTROL_PARAM1_HALF_IOC_SPEED (0x02)
#define MPI2_PM_CONTROL_PARAM1_QUARTER_IOC_SPEED (0x04)
#define MPI2_PM_CONTROL_PARAM1_EIGHTH_IOC_SPEED (0x08)
/* Parameter2, Parameter3, and Parameter4 are reserved */
/* PowerManagementControl Reply message */
typedef struct _MPI2_PWR_MGMT_CONTROL_REPLY {
U8 Feature; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U16 Reserved5; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
} MPI2_PWR_MGMT_CONTROL_REPLY, MPI2_POINTER PTR_MPI2_PWR_MGMT_CONTROL_REPLY,
Mpi2PwrMgmtControlReply_t, MPI2_POINTER pMpi2PwrMgmtControlReply_t;
#endif
drivers/scsi/mpt2sas/mpi/mpi2_raid.h deleted 100644 → 0
View file @ 2a188cb4
/*
* Copyright (c) 2000-2014 LSI Corporation.
*
*
* Name: mpi2_raid.h
* Title: MPI Integrated RAID messages and structures
* Creation Date: April 26, 2007
*
* mpi2_raid.h Version: 02.00.10
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 08-31-07 02.00.01 Modifications to RAID Action request and reply,
* including the Actions and ActionData.
* 02-29-08 02.00.02 Added MPI2_RAID_ACTION_ADATA_DISABL_FULL_REBUILD.
* 05-21-08 02.00.03 Added MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS so that
* the PhysDisk array in MPI2_RAID_VOLUME_CREATION_STRUCT
* can be sized by the build environment.
* 07-30-09 02.00.04 Added proper define for the Use Default Settings bit of
* VolumeCreationFlags and marked the old one as obsolete.
* 05-12-10 02.00.05 Added MPI2_RAID_VOL_FLAGS_OP_MDC define.
* 08-24-10 02.00.06 Added MPI2_RAID_ACTION_COMPATIBILITY_CHECK along with
* related structures and defines.
* Added product-specific range to RAID Action values.
* 02-06-12 02.00.08 Added MPI2_RAID_ACTION_PHYSDISK_HIDDEN.
* 07-26-12 02.00.09 Added ElapsedSeconds field to MPI2_RAID_VOL_INDICATOR.
* Added MPI2_RAID_VOL_FLAGS_ELAPSED_SECONDS_VALID define.
* 04-17-13 02.00.10 Added MPI25_RAID_ACTION_ADATA_ALLOW_PI.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_RAID_H
#define MPI2_RAID_H
/*****************************************************************************
*
* Integrated RAID Messages
*
*****************************************************************************/
/****************************************************************************
* RAID Action messages
****************************************************************************/
/* ActionDataWord defines for use with MPI2_RAID_ACTION_CREATE_VOLUME action */
#define MPI25_RAID_ACTION_ADATA_ALLOW_PI (0x80000000)
/* ActionDataWord defines for use with MPI2_RAID_ACTION_DELETE_VOLUME action */
#define MPI2_RAID_ACTION_ADATA_KEEP_LBA0 (0x00000000)
#define MPI2_RAID_ACTION_ADATA_ZERO_LBA0 (0x00000001)
/* use MPI2_RAIDVOL0_SETTING_ defines from mpi2_cnfg.h for MPI2_RAID_ACTION_CHANGE_VOL_WRITE_CACHE action */
/* ActionDataWord defines for use with MPI2_RAID_ACTION_DISABLE_ALL_VOLUMES action */
#define MPI2_RAID_ACTION_ADATA_DISABL_FULL_REBUILD (0x00000001)
/* ActionDataWord for MPI2_RAID_ACTION_SET_RAID_FUNCTION_RATE Action */
typedef struct _MPI2_RAID_ACTION_RATE_DATA
{
U8 RateToChange; /* 0x00 */
U8 RateOrMode; /* 0x01 */
U16 DataScrubDuration; /* 0x02 */
} MPI2_RAID_ACTION_RATE_DATA, MPI2_POINTER PTR_MPI2_RAID_ACTION_RATE_DATA,
Mpi2RaidActionRateData_t, MPI2_POINTER pMpi2RaidActionRateData_t;
#define MPI2_RAID_ACTION_SET_RATE_RESYNC (0x00)
#define MPI2_RAID_ACTION_SET_RATE_DATA_SCRUB (0x01)
#define MPI2_RAID_ACTION_SET_RATE_POWERSAVE_MODE (0x02)
/* ActionDataWord for MPI2_RAID_ACTION_START_RAID_FUNCTION Action */
typedef struct _MPI2_RAID_ACTION_START_RAID_FUNCTION
{
U8 RAIDFunction; /* 0x00 */
U8 Flags; /* 0x01 */
U16 Reserved1; /* 0x02 */
} MPI2_RAID_ACTION_START_RAID_FUNCTION,
MPI2_POINTER PTR_MPI2_RAID_ACTION_START_RAID_FUNCTION,
Mpi2RaidActionStartRaidFunction_t,
MPI2_POINTER pMpi2RaidActionStartRaidFunction_t;
/* defines for the RAIDFunction field */
#define MPI2_RAID_ACTION_START_BACKGROUND_INIT (0x00)
#define MPI2_RAID_ACTION_START_ONLINE_CAP_EXPANSION (0x01)
#define MPI2_RAID_ACTION_START_CONSISTENCY_CHECK (0x02)
/* defines for the Flags field */
#define MPI2_RAID_ACTION_START_NEW (0x00)
#define MPI2_RAID_ACTION_START_RESUME (0x01)
/* ActionDataWord for MPI2_RAID_ACTION_STOP_RAID_FUNCTION Action */
typedef struct _MPI2_RAID_ACTION_STOP_RAID_FUNCTION
{
U8 RAIDFunction; /* 0x00 */
U8 Flags; /* 0x01 */
U16 Reserved1; /* 0x02 */
} MPI2_RAID_ACTION_STOP_RAID_FUNCTION,
MPI2_POINTER PTR_MPI2_RAID_ACTION_STOP_RAID_FUNCTION,
Mpi2RaidActionStopRaidFunction_t,
MPI2_POINTER pMpi2RaidActionStopRaidFunction_t;
/* defines for the RAIDFunction field */
#define MPI2_RAID_ACTION_STOP_BACKGROUND_INIT (0x00)
#define MPI2_RAID_ACTION_STOP_ONLINE_CAP_EXPANSION (0x01)
#define MPI2_RAID_ACTION_STOP_CONSISTENCY_CHECK (0x02)
/* defines for the Flags field */
#define MPI2_RAID_ACTION_STOP_ABORT (0x00)
#define MPI2_RAID_ACTION_STOP_PAUSE (0x01)
/* ActionDataWord for MPI2_RAID_ACTION_CREATE_HOT_SPARE Action */
typedef struct _MPI2_RAID_ACTION_HOT_SPARE
{
U8 HotSparePool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U16 DevHandle; /* 0x02 */
} MPI2_RAID_ACTION_HOT_SPARE, MPI2_POINTER PTR_MPI2_RAID_ACTION_HOT_SPARE,
Mpi2RaidActionHotSpare_t, MPI2_POINTER pMpi2RaidActionHotSpare_t;
/* ActionDataWord for MPI2_RAID_ACTION_DEVICE_FW_UPDATE_MODE Action */
typedef struct _MPI2_RAID_ACTION_FW_UPDATE_MODE
{
U8 Flags; /* 0x00 */
U8 DeviceFirmwareUpdateModeTimeout; /* 0x01 */
U16 Reserved1; /* 0x02 */
} MPI2_RAID_ACTION_FW_UPDATE_MODE,
MPI2_POINTER PTR_MPI2_RAID_ACTION_FW_UPDATE_MODE,
Mpi2RaidActionFwUpdateMode_t, MPI2_POINTER pMpi2RaidActionFwUpdateMode_t;
/* ActionDataWord defines for use with MPI2_RAID_ACTION_DEVICE_FW_UPDATE_MODE action */
#define MPI2_RAID_ACTION_ADATA_DISABLE_FW_UPDATE (0x00)
#define MPI2_RAID_ACTION_ADATA_ENABLE_FW_UPDATE (0x01)
typedef union _MPI2_RAID_ACTION_DATA
{
U32 Word;
MPI2_RAID_ACTION_RATE_DATA Rates;
MPI2_RAID_ACTION_START_RAID_FUNCTION StartRaidFunction;
MPI2_RAID_ACTION_STOP_RAID_FUNCTION StopRaidFunction;
MPI2_RAID_ACTION_HOT_SPARE HotSpare;
MPI2_RAID_ACTION_FW_UPDATE_MODE FwUpdateMode;
} MPI2_RAID_ACTION_DATA, MPI2_POINTER PTR_MPI2_RAID_ACTION_DATA,
Mpi2RaidActionData_t, MPI2_POINTER pMpi2RaidActionData_t;
/* RAID Action Request Message */
typedef struct _MPI2_RAID_ACTION_REQUEST
{
U8 Action; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 VolDevHandle; /* 0x04 */
U8 PhysDiskNum; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved2; /* 0x0A */
U32 Reserved3; /* 0x0C */
MPI2_RAID_ACTION_DATA ActionDataWord; /* 0x10 */
MPI2_SGE_SIMPLE_UNION ActionDataSGE; /* 0x14 */
} MPI2_RAID_ACTION_REQUEST, MPI2_POINTER PTR_MPI2_RAID_ACTION_REQUEST,
Mpi2RaidActionRequest_t, MPI2_POINTER pMpi2RaidActionRequest_t;
/* RAID Action request Action values */
#define MPI2_RAID_ACTION_INDICATOR_STRUCT (0x01)
#define MPI2_RAID_ACTION_CREATE_VOLUME (0x02)
#define MPI2_RAID_ACTION_DELETE_VOLUME (0x03)
#define MPI2_RAID_ACTION_DISABLE_ALL_VOLUMES (0x04)
#define MPI2_RAID_ACTION_ENABLE_ALL_VOLUMES (0x05)
#define MPI2_RAID_ACTION_PHYSDISK_OFFLINE (0x0A)
#define MPI2_RAID_ACTION_PHYSDISK_ONLINE (0x0B)
#define MPI2_RAID_ACTION_FAIL_PHYSDISK (0x0F)
#define MPI2_RAID_ACTION_ACTIVATE_VOLUME (0x11)
#define MPI2_RAID_ACTION_DEVICE_FW_UPDATE_MODE (0x15)
#define MPI2_RAID_ACTION_CHANGE_VOL_WRITE_CACHE (0x17)
#define MPI2_RAID_ACTION_SET_VOLUME_NAME (0x18)
#define MPI2_RAID_ACTION_SET_RAID_FUNCTION_RATE (0x19)
#define MPI2_RAID_ACTION_ENABLE_FAILED_VOLUME (0x1C)
#define MPI2_RAID_ACTION_CREATE_HOT_SPARE (0x1D)
#define MPI2_RAID_ACTION_DELETE_HOT_SPARE (0x1E)
#define MPI2_RAID_ACTION_SYSTEM_SHUTDOWN_INITIATED (0x20)
#define MPI2_RAID_ACTION_START_RAID_FUNCTION (0x21)
#define MPI2_RAID_ACTION_STOP_RAID_FUNCTION (0x22)
#define MPI2_RAID_ACTION_COMPATIBILITY_CHECK (0x23)
#define MPI2_RAID_ACTION_PHYSDISK_HIDDEN (0x24)
#define MPI2_RAID_ACTION_MIN_PRODUCT_SPECIFIC (0x80)
#define MPI2_RAID_ACTION_MAX_PRODUCT_SPECIFIC (0xFF)
/* RAID Volume Creation Structure */
/*
* The following define can be customized for the targeted product.
*/
#ifndef MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS
#define MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS (1)
#endif
typedef struct _MPI2_RAID_VOLUME_PHYSDISK
{
U8 RAIDSetNum; /* 0x00 */
U8 PhysDiskMap; /* 0x01 */
U16 PhysDiskDevHandle; /* 0x02 */
} MPI2_RAID_VOLUME_PHYSDISK, MPI2_POINTER PTR_MPI2_RAID_VOLUME_PHYSDISK,
Mpi2RaidVolumePhysDisk_t, MPI2_POINTER pMpi2RaidVolumePhysDisk_t;
/* defines for the PhysDiskMap field */
#define MPI2_RAIDACTION_PHYSDISK_PRIMARY (0x01)
#define MPI2_RAIDACTION_PHYSDISK_SECONDARY (0x02)
typedef struct _MPI2_RAID_VOLUME_CREATION_STRUCT
{
U8 NumPhysDisks; /* 0x00 */
U8 VolumeType; /* 0x01 */
U16 Reserved1; /* 0x02 */
U32 VolumeCreationFlags; /* 0x04 */
U32 VolumeSettings; /* 0x08 */
U8 Reserved2; /* 0x0C */
U8 ResyncRate; /* 0x0D */
U16 DataScrubDuration; /* 0x0E */
U64 VolumeMaxLBA; /* 0x10 */
U32 StripeSize; /* 0x18 */
U8 Name[16]; /* 0x1C */
MPI2_RAID_VOLUME_PHYSDISK PhysDisk[MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS];/* 0x2C */
} MPI2_RAID_VOLUME_CREATION_STRUCT,
MPI2_POINTER PTR_MPI2_RAID_VOLUME_CREATION_STRUCT,
Mpi2RaidVolumeCreationStruct_t, MPI2_POINTER pMpi2RaidVolumeCreationStruct_t;
/* use MPI2_RAID_VOL_TYPE_ defines from mpi2_cnfg.h for VolumeType */
/* defines for the VolumeCreationFlags field */
#define MPI2_RAID_VOL_CREATION_DEFAULT_SETTINGS (0x80000000)
#define MPI2_RAID_VOL_CREATION_BACKGROUND_INIT (0x00000004)
#define MPI2_RAID_VOL_CREATION_LOW_LEVEL_INIT (0x00000002)
#define MPI2_RAID_VOL_CREATION_MIGRATE_DATA (0x00000001)
/* The following is an obsolete define.
* It must be shifted left 24 bits in order to set the proper bit.
*/
#define MPI2_RAID_VOL_CREATION_USE_DEFAULT_SETTINGS (0x80)
/* RAID Online Capacity Expansion Structure */
typedef struct _MPI2_RAID_ONLINE_CAPACITY_EXPANSION
{
U32 Flags; /* 0x00 */
U16 DevHandle0; /* 0x04 */
U16 Reserved1; /* 0x06 */
U16 DevHandle1; /* 0x08 */
U16 Reserved2; /* 0x0A */
} MPI2_RAID_ONLINE_CAPACITY_EXPANSION,
MPI2_POINTER PTR_MPI2_RAID_ONLINE_CAPACITY_EXPANSION,
Mpi2RaidOnlineCapacityExpansion_t,
MPI2_POINTER pMpi2RaidOnlineCapacityExpansion_t;
/* RAID Compatibility Input Structure */
typedef struct _MPI2_RAID_COMPATIBILITY_INPUT_STRUCT {
U16 SourceDevHandle; /* 0x00 */
U16 CandidateDevHandle; /* 0x02 */
U32 Flags; /* 0x04 */
U32 Reserved1; /* 0x08 */
U32 Reserved2; /* 0x0C */
} MPI2_RAID_COMPATIBILITY_INPUT_STRUCT,
MPI2_POINTER PTR_MPI2_RAID_COMPATIBILITY_INPUT_STRUCT,
Mpi2RaidCompatibilityInputStruct_t,
MPI2_POINTER pMpi2RaidCompatibilityInputStruct_t;
/* defines for RAID Compatibility Structure Flags field */
#define MPI2_RAID_COMPAT_SOURCE_IS_VOLUME_FLAG (0x00000002)
#define MPI2_RAID_COMPAT_REPORT_SOURCE_INFO_FLAG (0x00000001)
/* RAID Volume Indicator Structure */
typedef struct _MPI2_RAID_VOL_INDICATOR
{
U64 TotalBlocks; /* 0x00 */
U64 BlocksRemaining; /* 0x08 */
U32 Flags; /* 0x10 */
U32 ElapsedSeconds; /* 0x14 */
} MPI2_RAID_VOL_INDICATOR, MPI2_POINTER PTR_MPI2_RAID_VOL_INDICATOR,
Mpi2RaidVolIndicator_t, MPI2_POINTER pMpi2RaidVolIndicator_t;
/* defines for RAID Volume Indicator Flags field */
#define MPI2_RAID_VOL_FLAGS_ELAPSED_SECONDS_VALID (0x80000000)
#define MPI2_RAID_VOL_FLAGS_OP_MASK (0x0000000F)
#define MPI2_RAID_VOL_FLAGS_OP_BACKGROUND_INIT (0x00000000)
#define MPI2_RAID_VOL_FLAGS_OP_ONLINE_CAP_EXPANSION (0x00000001)
#define MPI2_RAID_VOL_FLAGS_OP_CONSISTENCY_CHECK (0x00000002)
#define MPI2_RAID_VOL_FLAGS_OP_RESYNC (0x00000003)
#define MPI2_RAID_VOL_FLAGS_OP_MDC (0x00000004)
/* RAID Compatibility Result Structure */
typedef struct _MPI2_RAID_COMPATIBILITY_RESULT_STRUCT {
U8 State; /* 0x00 */
U8 Reserved1; /* 0x01 */
U16 Reserved2; /* 0x02 */
U32 GenericAttributes; /* 0x04 */
U32 OEMSpecificAttributes; /* 0x08 */
U32 Reserved3; /* 0x0C */
U32 Reserved4; /* 0x10 */
} MPI2_RAID_COMPATIBILITY_RESULT_STRUCT,
MPI2_POINTER PTR_MPI2_RAID_COMPATIBILITY_RESULT_STRUCT,
Mpi2RaidCompatibilityResultStruct_t,
MPI2_POINTER pMpi2RaidCompatibilityResultStruct_t;
/* defines for RAID Compatibility Result Structure State field */
#define MPI2_RAID_COMPAT_STATE_COMPATIBLE (0x00)
#define MPI2_RAID_COMPAT_STATE_NOT_COMPATIBLE (0x01)
/* defines for RAID Compatibility Result Structure GenericAttributes field */
#define MPI2_RAID_COMPAT_GENATTRIB_4K_SECTOR (0x00000010)
#define MPI2_RAID_COMPAT_GENATTRIB_MEDIA_MASK (0x0000000C)
#define MPI2_RAID_COMPAT_GENATTRIB_SOLID_STATE_DRIVE (0x00000008)
#define MPI2_RAID_COMPAT_GENATTRIB_HARD_DISK_DRIVE (0x00000004)
#define MPI2_RAID_COMPAT_GENATTRIB_PROTOCOL_MASK (0x00000003)
#define MPI2_RAID_COMPAT_GENATTRIB_SAS_PROTOCOL (0x00000002)
#define MPI2_RAID_COMPAT_GENATTRIB_SATA_PROTOCOL (0x00000001)
/* RAID Action Reply ActionData union */
typedef union _MPI2_RAID_ACTION_REPLY_DATA
{
U32 Word[6];
MPI2_RAID_VOL_INDICATOR RaidVolumeIndicator;
U16 VolDevHandle;
U8 VolumeState;
U8 PhysDiskNum;
MPI2_RAID_COMPATIBILITY_RESULT_STRUCT RaidCompatibilityResult;
} MPI2_RAID_ACTION_REPLY_DATA, MPI2_POINTER PTR_MPI2_RAID_ACTION_REPLY_DATA,
Mpi2RaidActionReplyData_t, MPI2_POINTER pMpi2RaidActionReplyData_t;
/* use MPI2_RAIDVOL0_SETTING_ defines from mpi2_cnfg.h for MPI2_RAID_ACTION_CHANGE_VOL_WRITE_CACHE action */
/* RAID Action Reply Message */
typedef struct _MPI2_RAID_ACTION_REPLY
{
U8 Action; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 VolDevHandle; /* 0x04 */
U8 PhysDiskNum; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved2; /* 0x0A */
U16 Reserved3; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
MPI2_RAID_ACTION_REPLY_DATA ActionData; /* 0x14 */
} MPI2_RAID_ACTION_REPLY, MPI2_POINTER PTR_MPI2_RAID_ACTION_REPLY,
Mpi2RaidActionReply_t, MPI2_POINTER pMpi2RaidActionReply_t;
#endif
drivers/scsi/mpt2sas/mpi/mpi2_sas.h deleted 100644 → 0
View file @ 2a188cb4
/*
* Copyright (c) 2000-2014 LSI Corporation.
*
*
* Name: mpi2_sas.h
* Title: MPI Serial Attached SCSI structures and definitions
* Creation Date: February 9, 2007
*
* mpi2_sas.h Version: 02.00.05
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 06-26-07 02.00.01 Added Clear All Persistent Operation to SAS IO Unit
* Control Request.
* 10-02-08 02.00.02 Added Set IOC Parameter Operation to SAS IO Unit Control
* Request.
* 10-28-09 02.00.03 Changed the type of SGL in MPI2_SATA_PASSTHROUGH_REQUEST
* to MPI2_SGE_IO_UNION since it supports chained SGLs.
* 05-12-10 02.00.04 Modified some comments.
* 08-11-10 02.00.05 Added NCQ operations to SAS IO Unit Control.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_SAS_H
#define MPI2_SAS_H
/*
* Values for SASStatus.
*/
#define MPI2_SASSTATUS_SUCCESS (0x00)
#define MPI2_SASSTATUS_UNKNOWN_ERROR (0x01)
#define MPI2_SASSTATUS_INVALID_FRAME (0x02)
#define MPI2_SASSTATUS_UTC_BAD_DEST (0x03)
#define MPI2_SASSTATUS_UTC_BREAK_RECEIVED (0x04)
#define MPI2_SASSTATUS_UTC_CONNECT_RATE_NOT_SUPPORTED (0x05)
#define MPI2_SASSTATUS_UTC_PORT_LAYER_REQUEST (0x06)
#define MPI2_SASSTATUS_UTC_PROTOCOL_NOT_SUPPORTED (0x07)
#define MPI2_SASSTATUS_UTC_STP_RESOURCES_BUSY (0x08)
#define MPI2_SASSTATUS_UTC_WRONG_DESTINATION (0x09)
#define MPI2_SASSTATUS_SHORT_INFORMATION_UNIT (0x0A)
#define MPI2_SASSTATUS_LONG_INFORMATION_UNIT (0x0B)
#define MPI2_SASSTATUS_XFER_RDY_INCORRECT_WRITE_DATA (0x0C)
#define MPI2_SASSTATUS_XFER_RDY_REQUEST_OFFSET_ERROR (0x0D)
#define MPI2_SASSTATUS_XFER_RDY_NOT_EXPECTED (0x0E)
#define MPI2_SASSTATUS_DATA_INCORRECT_DATA_LENGTH (0x0F)
#define MPI2_SASSTATUS_DATA_TOO_MUCH_READ_DATA (0x10)
#define MPI2_SASSTATUS_DATA_OFFSET_ERROR (0x11)
#define MPI2_SASSTATUS_SDSF_NAK_RECEIVED (0x12)
#define MPI2_SASSTATUS_SDSF_CONNECTION_FAILED (0x13)
#define MPI2_SASSTATUS_INITIATOR_RESPONSE_TIMEOUT (0x14)
/*
* Values for the SAS DeviceInfo field used in SAS Device Status Change Event
* data and SAS Configuration pages.
*/
#define MPI2_SAS_DEVICE_INFO_SEP (0x00004000)
#define MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE (0x00002000)
#define MPI2_SAS_DEVICE_INFO_LSI_DEVICE (0x00001000)
#define MPI2_SAS_DEVICE_INFO_DIRECT_ATTACH (0x00000800)
#define MPI2_SAS_DEVICE_INFO_SSP_TARGET (0x00000400)
#define MPI2_SAS_DEVICE_INFO_STP_TARGET (0x00000200)
#define MPI2_SAS_DEVICE_INFO_SMP_TARGET (0x00000100)
#define MPI2_SAS_DEVICE_INFO_SATA_DEVICE (0x00000080)
#define MPI2_SAS_DEVICE_INFO_SSP_INITIATOR (0x00000040)
#define MPI2_SAS_DEVICE_INFO_STP_INITIATOR (0x00000020)
#define MPI2_SAS_DEVICE_INFO_SMP_INITIATOR (0x00000010)
#define MPI2_SAS_DEVICE_INFO_SATA_HOST (0x00000008)
#define MPI2_SAS_DEVICE_INFO_MASK_DEVICE_TYPE (0x00000007)
#define MPI2_SAS_DEVICE_INFO_NO_DEVICE (0x00000000)
#define MPI2_SAS_DEVICE_INFO_END_DEVICE (0x00000001)
#define MPI2_SAS_DEVICE_INFO_EDGE_EXPANDER (0x00000002)
#define MPI2_SAS_DEVICE_INFO_FANOUT_EXPANDER (0x00000003)
/*****************************************************************************
*
* SAS Messages
*
*****************************************************************************/
/****************************************************************************
* SMP Passthrough messages
****************************************************************************/
/* SMP Passthrough Request Message */
typedef struct _MPI2_SMP_PASSTHROUGH_REQUEST
{
U8 PassthroughFlags; /* 0x00 */
U8 PhysicalPort; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 RequestDataLength; /* 0x04 */
U8 SGLFlags; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved1; /* 0x0A */
U32 Reserved2; /* 0x0C */
U64 SASAddress; /* 0x10 */
U32 Reserved3; /* 0x18 */
U32 Reserved4; /* 0x1C */
MPI2_SIMPLE_SGE_UNION SGL; /* 0x20 */
} MPI2_SMP_PASSTHROUGH_REQUEST, MPI2_POINTER PTR_MPI2_SMP_PASSTHROUGH_REQUEST,
Mpi2SmpPassthroughRequest_t, MPI2_POINTER pMpi2SmpPassthroughRequest_t;
/* values for PassthroughFlags field */
#define MPI2_SMP_PT_REQ_PT_FLAGS_IMMEDIATE (0x80)
/* use MPI2_SGLFLAGS_ defines from mpi2.h for the SGLFlags field */
/* SMP Passthrough Reply Message */
typedef struct _MPI2_SMP_PASSTHROUGH_REPLY
{
U8 PassthroughFlags; /* 0x00 */
U8 PhysicalPort; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 ResponseDataLength; /* 0x04 */
U8 SGLFlags; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved1; /* 0x0A */
U8 Reserved2; /* 0x0C */
U8 SASStatus; /* 0x0D */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U32 Reserved3; /* 0x14 */
U8 ResponseData[4]; /* 0x18 */
} MPI2_SMP_PASSTHROUGH_REPLY, MPI2_POINTER PTR_MPI2_SMP_PASSTHROUGH_REPLY,
Mpi2SmpPassthroughReply_t, MPI2_POINTER pMpi2SmpPassthroughReply_t;
/* values for PassthroughFlags field */
#define MPI2_SMP_PT_REPLY_PT_FLAGS_IMMEDIATE (0x80)
/* values for SASStatus field are at the top of this file */
/****************************************************************************
* SATA Passthrough messages
****************************************************************************/
/* SATA Passthrough Request Message */
typedef struct _MPI2_SATA_PASSTHROUGH_REQUEST
{
U16 DevHandle; /* 0x00 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 PassthroughFlags; /* 0x04 */
U8 SGLFlags; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved1; /* 0x0A */
U32 Reserved2; /* 0x0C */
U32 Reserved3; /* 0x10 */
U32 Reserved4; /* 0x14 */
U32 DataLength; /* 0x18 */
U8 CommandFIS[20]; /* 0x1C */
MPI2_SGE_IO_UNION SGL; /* 0x30 */
} MPI2_SATA_PASSTHROUGH_REQUEST, MPI2_POINTER PTR_MPI2_SATA_PASSTHROUGH_REQUEST,
Mpi2SataPassthroughRequest_t, MPI2_POINTER pMpi2SataPassthroughRequest_t;
/* values for PassthroughFlags field */
#define MPI2_SATA_PT_REQ_PT_FLAGS_EXECUTE_DIAG (0x0100)
#define MPI2_SATA_PT_REQ_PT_FLAGS_DMA (0x0020)
#define MPI2_SATA_PT_REQ_PT_FLAGS_PIO (0x0010)
#define MPI2_SATA_PT_REQ_PT_FLAGS_UNSPECIFIED_VU (0x0004)
#define MPI2_SATA_PT_REQ_PT_FLAGS_WRITE (0x0002)
#define MPI2_SATA_PT_REQ_PT_FLAGS_READ (0x0001)
/* use MPI2_SGLFLAGS_ defines from mpi2.h for the SGLFlags field */
/* SATA Passthrough Reply Message */
typedef struct _MPI2_SATA_PASSTHROUGH_REPLY
{
U16 DevHandle; /* 0x00 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 PassthroughFlags; /* 0x04 */
U8 SGLFlags; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved1; /* 0x0A */
U8 Reserved2; /* 0x0C */
U8 SASStatus; /* 0x0D */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U8 StatusFIS[20]; /* 0x14 */
U32 StatusControlRegisters; /* 0x28 */
U32 TransferCount; /* 0x2C */
} MPI2_SATA_PASSTHROUGH_REPLY, MPI2_POINTER PTR_MPI2_SATA_PASSTHROUGH_REPLY,
Mpi2SataPassthroughReply_t, MPI2_POINTER pMpi2SataPassthroughReply_t;
/* values for SASStatus field are at the top of this file */
/****************************************************************************
* SAS IO Unit Control messages
****************************************************************************/
/* SAS IO Unit Control Request Message */
typedef struct _MPI2_SAS_IOUNIT_CONTROL_REQUEST
{
U8 Operation; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 DevHandle; /* 0x04 */
U8 IOCParameter; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 Reserved4; /* 0x0C */
U8 PhyNum; /* 0x0E */
U8 PrimFlags; /* 0x0F */
U32 Primitive; /* 0x10 */
U8 LookupMethod; /* 0x14 */
U8 Reserved5; /* 0x15 */
U16 SlotNumber; /* 0x16 */
U64 LookupAddress; /* 0x18 */
U32 IOCParameterValue; /* 0x20 */
U32 Reserved7; /* 0x24 */
U32 Reserved8; /* 0x28 */
} MPI2_SAS_IOUNIT_CONTROL_REQUEST,
MPI2_POINTER PTR_MPI2_SAS_IOUNIT_CONTROL_REQUEST,
Mpi2SasIoUnitControlRequest_t, MPI2_POINTER pMpi2SasIoUnitControlRequest_t;
/* values for the Operation field */
#define MPI2_SAS_OP_CLEAR_ALL_PERSISTENT (0x02)
#define MPI2_SAS_OP_PHY_LINK_RESET (0x06)
#define MPI2_SAS_OP_PHY_HARD_RESET (0x07)
#define MPI2_SAS_OP_PHY_CLEAR_ERROR_LOG (0x08)
#define MPI2_SAS_OP_SEND_PRIMITIVE (0x0A)
#define MPI2_SAS_OP_FORCE_FULL_DISCOVERY (0x0B)
#define MPI2_SAS_OP_TRANSMIT_PORT_SELECT_SIGNAL (0x0C)
#define MPI2_SAS_OP_REMOVE_DEVICE (0x0D)
#define MPI2_SAS_OP_LOOKUP_MAPPING (0x0E)
#define MPI2_SAS_OP_SET_IOC_PARAMETER (0x0F)
#define MPI2_SAS_OP_DEV_ENABLE_NCQ (0x14)
#define MPI2_SAS_OP_DEV_DISABLE_NCQ (0x15)
#define MPI2_SAS_OP_PRODUCT_SPECIFIC_MIN (0x80)
/* values for the PrimFlags field */
#define MPI2_SAS_PRIMFLAGS_SINGLE (0x08)
#define MPI2_SAS_PRIMFLAGS_TRIPLE (0x02)
#define MPI2_SAS_PRIMFLAGS_REDUNDANT (0x01)
/* values for the LookupMethod field */
#define MPI2_SAS_LOOKUP_METHOD_SAS_ADDRESS (0x01)
#define MPI2_SAS_LOOKUP_METHOD_SAS_ENCLOSURE_SLOT (0x02)
#define MPI2_SAS_LOOKUP_METHOD_SAS_DEVICE_NAME (0x03)
/* SAS IO Unit Control Reply Message */
typedef struct _MPI2_SAS_IOUNIT_CONTROL_REPLY
{
U8 Operation; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 DevHandle; /* 0x04 */
U8 IOCParameter; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 Reserved4; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
} MPI2_SAS_IOUNIT_CONTROL_REPLY,
MPI2_POINTER PTR_MPI2_SAS_IOUNIT_CONTROL_REPLY,
Mpi2SasIoUnitControlReply_t, MPI2_POINTER pMpi2SasIoUnitControlReply_t;
#endif
drivers/scsi/mpt2sas/mpi/mpi2_tool.h deleted 100644 → 0
View file @ 2a188cb4
/*
* Copyright (c) 2000-2014 LSI Corporation.
*
*
* Name: mpi2_tool.h
* Title: MPI diagnostic tool structures and definitions
* Creation Date: March 26, 2007
*
* mpi2_tool.h Version: 02.00.12
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 12-18-07 02.00.01 Added Diagnostic Buffer Post and Diagnostic Release
* structures and defines.
* 02-29-08 02.00.02 Modified various names to make them 32-character unique.
* 05-06-09 02.00.03 Added ISTWI Read Write Tool and Diagnostic CLI Tool.
* 07-30-09 02.00.04 Added ExtendedType field to DiagnosticBufferPost request
* and reply messages.
* Added MPI2_DIAG_BUF_TYPE_EXTENDED.
* Incremented MPI2_DIAG_BUF_TYPE_COUNT.
* 05-12-10 02.00.05 Added Diagnostic Data Upload tool.
* 08-11-10 02.00.06 Added defines that were missing for Diagnostic Buffer
* Post Request.
* 05-25-11 02.00.07 Added Flags field and related defines to
* MPI2_TOOLBOX_ISTWI_READ_WRITE_REQUEST.
* 07-26-12 02.00.10 Modified MPI2_TOOLBOX_DIAGNOSTIC_CLI_REQUEST so that
* it uses MPI Chain SGE as well as MPI Simple SGE.
* 08-19-13 02.00.11 Added MPI2_TOOLBOX_TEXT_DISPLAY_TOOL and related info.
* 01-08-14 02.00.12 Added MPI2_TOOLBOX_CLEAN_BIT26_PRODUCT_SPECIFIC.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_TOOL_H
#define MPI2_TOOL_H
/*****************************************************************************
*
* Toolbox Messages
*
*****************************************************************************/
/* defines for the Tools */
#define MPI2_TOOLBOX_CLEAN_TOOL (0x00)
#define MPI2_TOOLBOX_MEMORY_MOVE_TOOL (0x01)
#define MPI2_TOOLBOX_DIAG_DATA_UPLOAD_TOOL (0x02)
#define MPI2_TOOLBOX_ISTWI_READ_WRITE_TOOL (0x03)
#define MPI2_TOOLBOX_BEACON_TOOL (0x05)
#define MPI2_TOOLBOX_DIAGNOSTIC_CLI_TOOL (0x06)
#define MPI2_TOOLBOX_TEXT_DISPLAY_TOOL (0x07)
/****************************************************************************
* Toolbox reply
****************************************************************************/
typedef struct _MPI2_TOOLBOX_REPLY
{
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U16 Reserved5; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
} MPI2_TOOLBOX_REPLY, MPI2_POINTER PTR_MPI2_TOOLBOX_REPLY,
Mpi2ToolboxReply_t, MPI2_POINTER pMpi2ToolboxReply_t;
/****************************************************************************
* Toolbox Clean Tool request
****************************************************************************/
typedef struct _MPI2_TOOLBOX_CLEAN_REQUEST
{
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U32 Flags; /* 0x0C */
} MPI2_TOOLBOX_CLEAN_REQUEST, MPI2_POINTER PTR_MPI2_TOOLBOX_CLEAN_REQUEST,
Mpi2ToolboxCleanRequest_t, MPI2_POINTER pMpi2ToolboxCleanRequest_t;
/* values for the Flags field */
#define MPI2_TOOLBOX_CLEAN_BOOT_SERVICES (0x80000000)
#define MPI2_TOOLBOX_CLEAN_PERSIST_MANUFACT_PAGES (0x40000000)
#define MPI2_TOOLBOX_CLEAN_OTHER_PERSIST_PAGES (0x20000000)
#define MPI2_TOOLBOX_CLEAN_FW_CURRENT (0x10000000)
#define MPI2_TOOLBOX_CLEAN_FW_BACKUP (0x08000000)
#define MPI2_TOOLBOX_CLEAN_BIT26_PRODUCT_SPECIFIC (0x04000000)
#define MPI2_TOOLBOX_CLEAN_MEGARAID (0x02000000)
#define MPI2_TOOLBOX_CLEAN_INITIALIZATION (0x01000000)
#define MPI2_TOOLBOX_CLEAN_FLASH (0x00000004)
#define MPI2_TOOLBOX_CLEAN_SEEPROM (0x00000002)
#define MPI2_TOOLBOX_CLEAN_NVSRAM (0x00000001)
/****************************************************************************
* Toolbox Memory Move request
****************************************************************************/
typedef struct _MPI2_TOOLBOX_MEM_MOVE_REQUEST {
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
MPI2_SGE_SIMPLE_UNION SGL; /* 0x0C */
} MPI2_TOOLBOX_MEM_MOVE_REQUEST, MPI2_POINTER PTR_MPI2_TOOLBOX_MEM_MOVE_REQUEST,
Mpi2ToolboxMemMoveRequest_t, MPI2_POINTER pMpi2ToolboxMemMoveRequest_t;
/****************************************************************************
* Toolbox Diagnostic Data Upload request
****************************************************************************/
typedef struct _MPI2_TOOLBOX_DIAG_DATA_UPLOAD_REQUEST {
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U8 SGLFlags; /* 0x0C */
U8 Reserved5; /* 0x0D */
U16 Reserved6; /* 0x0E */
U32 Flags; /* 0x10 */
U32 DataLength; /* 0x14 */
MPI2_SGE_SIMPLE_UNION SGL; /* 0x18 */
} MPI2_TOOLBOX_DIAG_DATA_UPLOAD_REQUEST,
MPI2_POINTER PTR_MPI2_TOOLBOX_DIAG_DATA_UPLOAD_REQUEST,
Mpi2ToolboxDiagDataUploadRequest_t,
MPI2_POINTER pMpi2ToolboxDiagDataUploadRequest_t;
/* use MPI2_SGLFLAGS_ defines from mpi2.h for the SGLFlags field */
typedef struct _MPI2_DIAG_DATA_UPLOAD_HEADER {
U32 DiagDataLength; /* 00h */
U8 FormatCode; /* 04h */
U8 Reserved1; /* 05h */
U16 Reserved2; /* 06h */
} MPI2_DIAG_DATA_UPLOAD_HEADER, MPI2_POINTER PTR_MPI2_DIAG_DATA_UPLOAD_HEADER,
Mpi2DiagDataUploadHeader_t, MPI2_POINTER pMpi2DiagDataUploadHeader_t;
/****************************************************************************
* Toolbox ISTWI Read Write Tool
****************************************************************************/
/* Toolbox ISTWI Read Write Tool request message */
typedef struct _MPI2_TOOLBOX_ISTWI_READ_WRITE_REQUEST {
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U32 Reserved5; /* 0x0C */
U32 Reserved6; /* 0x10 */
U8 DevIndex; /* 0x14 */
U8 Action; /* 0x15 */
U8 SGLFlags; /* 0x16 */
U8 Flags; /* 0x17 */
U16 TxDataLength; /* 0x18 */
U16 RxDataLength; /* 0x1A */
U32 Reserved8; /* 0x1C */
U32 Reserved9; /* 0x20 */
U32 Reserved10; /* 0x24 */
U32 Reserved11; /* 0x28 */
U32 Reserved12; /* 0x2C */
MPI2_SGE_SIMPLE_UNION SGL; /* 0x30 */
} MPI2_TOOLBOX_ISTWI_READ_WRITE_REQUEST,
MPI2_POINTER PTR_MPI2_TOOLBOX_ISTWI_READ_WRITE_REQUEST,
Mpi2ToolboxIstwiReadWriteRequest_t,
MPI2_POINTER pMpi2ToolboxIstwiReadWriteRequest_t;
/* values for the Action field */
#define MPI2_TOOL_ISTWI_ACTION_READ_DATA (0x01)
#define MPI2_TOOL_ISTWI_ACTION_WRITE_DATA (0x02)
#define MPI2_TOOL_ISTWI_ACTION_SEQUENCE (0x03)
#define MPI2_TOOL_ISTWI_ACTION_RESERVE_BUS (0x10)
#define MPI2_TOOL_ISTWI_ACTION_RELEASE_BUS (0x11)
#define MPI2_TOOL_ISTWI_ACTION_RESET (0x12)
/* use MPI2_SGLFLAGS_ defines from mpi2.h for the SGLFlags field */
/* values for the Flags field */
#define MPI2_TOOL_ISTWI_FLAG_AUTO_RESERVE_RELEASE (0x80)
#define MPI2_TOOL_ISTWI_FLAG_PAGE_ADDR_MASK (0x07)
/* Toolbox ISTWI Read Write Tool reply message */
typedef struct _MPI2_TOOLBOX_ISTWI_REPLY {
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U16 Reserved5; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U8 DevIndex; /* 0x14 */
U8 Action; /* 0x15 */
U8 IstwiStatus; /* 0x16 */
U8 Reserved6; /* 0x17 */
U16 TxDataCount; /* 0x18 */
U16 RxDataCount; /* 0x1A */
} MPI2_TOOLBOX_ISTWI_REPLY, MPI2_POINTER PTR_MPI2_TOOLBOX_ISTWI_REPLY,
Mpi2ToolboxIstwiReply_t, MPI2_POINTER pMpi2ToolboxIstwiReply_t;
/****************************************************************************
* Toolbox Beacon Tool request
****************************************************************************/
typedef struct _MPI2_TOOLBOX_BEACON_REQUEST
{
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U8 Reserved5; /* 0x0C */
U8 PhysicalPort; /* 0x0D */
U8 Reserved6; /* 0x0E */
U8 Flags; /* 0x0F */
} MPI2_TOOLBOX_BEACON_REQUEST, MPI2_POINTER PTR_MPI2_TOOLBOX_BEACON_REQUEST,
Mpi2ToolboxBeaconRequest_t, MPI2_POINTER pMpi2ToolboxBeaconRequest_t;
/* values for the Flags field */
#define MPI2_TOOLBOX_FLAGS_BEACONMODE_OFF (0x00)
#define MPI2_TOOLBOX_FLAGS_BEACONMODE_ON (0x01)
/****************************************************************************
* Toolbox Diagnostic CLI Tool
****************************************************************************/
#define MPI2_TOOLBOX_DIAG_CLI_CMD_LENGTH (0x5C)
/* MPI v2.0 Toolbox Diagnostic CLI Tool request message */
typedef struct _MPI2_TOOLBOX_DIAGNOSTIC_CLI_REQUEST {
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U8 SGLFlags; /* 0x0C */
U8 Reserved5; /* 0x0D */
U16 Reserved6; /* 0x0E */
U32 DataLength; /* 0x10 */
U8 DiagnosticCliCommand
[MPI2_TOOLBOX_DIAG_CLI_CMD_LENGTH]; /* 0x14 */
MPI2_MPI_SGE_IO_UNION SGL; /* 0x70 */
} MPI2_TOOLBOX_DIAGNOSTIC_CLI_REQUEST,
MPI2_POINTER PTR_MPI2_TOOLBOX_DIAGNOSTIC_CLI_REQUEST,
Mpi2ToolboxDiagnosticCliRequest_t,
MPI2_POINTER pMpi2ToolboxDiagnosticCliRequest_t;
/* use MPI2_SGLFLAGS_ defines from mpi2.h for the SGLFlags field */
/* Toolbox Diagnostic CLI Tool reply message */
typedef struct _MPI2_TOOLBOX_DIAGNOSTIC_CLI_REPLY {
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U16 Reserved5; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U32 ReturnedDataLength; /* 0x14 */
} MPI2_TOOLBOX_DIAGNOSTIC_CLI_REPLY,
MPI2_POINTER PTR_MPI2_TOOLBOX_DIAG_CLI_REPLY,
Mpi2ToolboxDiagnosticCliReply_t,
MPI2_POINTER pMpi2ToolboxDiagnosticCliReply_t;
/****************************************************************************
* Toolbox Console Text Display Tool
****************************************************************************/
/* Toolbox Console Text Display Tool request message */
typedef struct _MPI2_TOOLBOX_TEXT_DISPLAY_REQUEST {
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U8 Console; /* 0x0C */
U8 Flags; /* 0x0D */
U16 Reserved6; /* 0x0E */
U8 TextToDisplay[4]; /* 0x10 */
} MPI2_TOOLBOX_TEXT_DISPLAY_REQUEST,
MPI2_POINTER PTR_MPI2_TOOLBOX_TEXT_DISPLAY_REQUEST,
Mpi2ToolboxTextDisplayRequest_t,
MPI2_POINTER pMpi2ToolboxTextDisplayRequest_t;
/* defines for the Console field */
#define MPI2_TOOLBOX_CONSOLE_TYPE_MASK (0xF0)
#define MPI2_TOOLBOX_CONSOLE_TYPE_DEFAULT (0x00)
#define MPI2_TOOLBOX_CONSOLE_TYPE_UART (0x10)
#define MPI2_TOOLBOX_CONSOLE_TYPE_ETHERNET (0x20)
#define MPI2_TOOLBOX_CONSOLE_NUMBER_MASK (0x0F)
/* defines for the Flags field */
#define MPI2_TOOLBOX_CONSOLE_FLAG_TIMESTAMP (0x01)
/*****************************************************************************
*
* Diagnostic Buffer Messages
*
*****************************************************************************/
/****************************************************************************
* Diagnostic Buffer Post request
****************************************************************************/
typedef struct _MPI2_DIAG_BUFFER_POST_REQUEST
{
U8 ExtendedType; /* 0x00 */
U8 BufferType; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U64 BufferAddress; /* 0x0C */
U32 BufferLength; /* 0x14 */
U32 Reserved5; /* 0x18 */
U32 Reserved6; /* 0x1C */
U32 Flags; /* 0x20 */
U32 ProductSpecific[23]; /* 0x24 */
} MPI2_DIAG_BUFFER_POST_REQUEST, MPI2_POINTER PTR_MPI2_DIAG_BUFFER_POST_REQUEST,
Mpi2DiagBufferPostRequest_t, MPI2_POINTER pMpi2DiagBufferPostRequest_t;
/* values for the ExtendedType field */
#define MPI2_DIAG_EXTENDED_TYPE_UTILIZATION (0x02)
/* values for the BufferType field */
#define MPI2_DIAG_BUF_TYPE_TRACE (0x00)
#define MPI2_DIAG_BUF_TYPE_SNAPSHOT (0x01)
#define MPI2_DIAG_BUF_TYPE_EXTENDED (0x02)
/* count of the number of buffer types */
#define MPI2_DIAG_BUF_TYPE_COUNT (0x03)
/* values for the Flags field */
#define MPI2_DIAG_BUF_FLAG_RELEASE_ON_FULL (0x00000002)
#define MPI2_DIAG_BUF_FLAG_IMMEDIATE_RELEASE (0x00000001)
/****************************************************************************
* Diagnostic Buffer Post reply
****************************************************************************/
typedef struct _MPI2_DIAG_BUFFER_POST_REPLY
{
U8 ExtendedType; /* 0x00 */
U8 BufferType; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U16 Reserved5; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U32 TransferLength; /* 0x14 */
} MPI2_DIAG_BUFFER_POST_REPLY, MPI2_POINTER PTR_MPI2_DIAG_BUFFER_POST_REPLY,
Mpi2DiagBufferPostReply_t, MPI2_POINTER pMpi2DiagBufferPostReply_t;
/****************************************************************************
* Diagnostic Release request
****************************************************************************/
typedef struct _MPI2_DIAG_RELEASE_REQUEST
{
U8 Reserved1; /* 0x00 */
U8 BufferType; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
} MPI2_DIAG_RELEASE_REQUEST, MPI2_POINTER PTR_MPI2_DIAG_RELEASE_REQUEST,
Mpi2DiagReleaseRequest_t, MPI2_POINTER pMpi2DiagReleaseRequest_t;
/****************************************************************************
* Diagnostic Buffer Post reply
****************************************************************************/
typedef struct _MPI2_DIAG_RELEASE_REPLY
{
U8 Reserved1; /* 0x00 */
U8 BufferType; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U16 Reserved5; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
} MPI2_DIAG_RELEASE_REPLY, MPI2_POINTER PTR_MPI2_DIAG_RELEASE_REPLY,
Mpi2DiagReleaseReply_t, MPI2_POINTER pMpi2DiagReleaseReply_t;
#endif
drivers/scsi/mpt2sas/mpi/mpi2_type.h deleted 100644 → 0
View file @ 2a188cb4
/*
* Copyright (c) 2000-2014 LSI Corporation.
*
*
* Name: mpi2_type.h
* Title: MPI basic type definitions
* Creation Date: August 16, 2006
*
* mpi2_type.h Version: 02.00.00
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_TYPE_H
#define MPI2_TYPE_H
/*******************************************************************************
* Define MPI2_POINTER if it hasn't already been defined. By default
* MPI2_POINTER is defined to be a near pointer. MPI2_POINTER can be defined as
* a far pointer by defining MPI2_POINTER as "far *" before this header file is
* included.
*/
#ifndef MPI2_POINTER
#define MPI2_POINTER *
#endif
/* the basic types may have already been included by mpi_type.h */
#ifndef MPI_TYPE_H
/*****************************************************************************
*
* Basic Types
*
*****************************************************************************/
typedef u8 U8;
typedef __le16 U16;
typedef __le32 U32;
typedef __le64 U64 __attribute__((aligned(4)));
/*****************************************************************************
*
* Pointer Types
*
*****************************************************************************/
typedef U8 *PU8;
typedef U16 *PU16;
typedef U32 *PU32;
typedef U64 *PU64;
#endif
#endif
drivers/scsi/mpt2sas/mpt2sas_base.h
View file @ 3c586656
......@@ -297,8 +297,8 @@ typedef struct _MPI2_CONFIG_PAGE_MAN_10 {
U32 OEMSpecificFlags1; /* 20h */
U32 Reserved5[18]; /* 24h-60h*/
} MPI2_CONFIG_PAGE_MAN_10,
MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_10,
Mpi2ManufacturingPage10_t, MPI2_POINTER pMpi2ManufacturingPage10_t;
*PTR_MPI2_CONFIG_PAGE_MAN_10,
Mpi2ManufacturingPage10_t, *pMpi2ManufacturingPage10_t;
#define MFG_PAGE10_HIDE_SSDS_MASK (0x00000003)
#define MFG_PAGE10_HIDE_ALL_DISKS (0x00)
......
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