Commit 3cb7d1cd authored by Vivek Gautam's avatar Vivek Gautam Committed by Kukjin Kim

ARM: dts: Enable support for USB 3.0 PHY controller for exynos5420

Add device tree nodes for USB 3.0 PHY present alongwith
USB 3.0 controller Exynos 5420 SoC. This phy driver is
based on generic phy framework.
Signed-off-by: default avatarVivek Gautam <gautam.vivek@samsung.com>
Reviewed-by: default avatarTomasz Figa <t.figa@samsung.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent 6ac189fc
...@@ -47,6 +47,8 @@ aliases { ...@@ -47,6 +47,8 @@ aliases {
spi0 = &spi_0; spi0 = &spi_0;
spi1 = &spi_1; spi1 = &spi_1;
spi2 = &spi_2; spi2 = &spi_2;
usbdrdphy0 = &usbdrd_phy0;
usbdrdphy1 = &usbdrd_phy1;
}; };
cpus { cpus {
...@@ -755,4 +757,22 @@ sss: sss@10830000 { ...@@ -755,4 +757,22 @@ sss: sss@10830000 {
clock-names = "secss"; clock-names = "secss";
samsung,power-domain = <&g2d_pd>; samsung,power-domain = <&g2d_pd>;
}; };
usbdrd_phy0: phy@12100000 {
compatible = "samsung,exynos5420-usbdrd-phy";
reg = <0x12100000 0x100>;
clocks = <&clock CLK_USBD300>, <&clock CLK_SCLK_USBPHY300>;
clock-names = "phy", "ref";
samsung,pmu-syscon = <&pmu_system_controller>;
#phy-cells = <1>;
};
usbdrd_phy1: phy@12500000 {
compatible = "samsung,exynos5420-usbdrd-phy";
reg = <0x12500000 0x100>;
clocks = <&clock CLK_USBD301>, <&clock CLK_SCLK_USBPHY301>;
clock-names = "phy", "ref";
samsung,pmu-syscon = <&pmu_system_controller>;
#phy-cells = <1>;
};
}; };
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