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nexedi
linux
Commits
3d3bad5b
Commit
3d3bad5b
authored
Feb 23, 2005
by
Dave Jones
Browse files
Options
Browse Files
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Plain Diff
Merge delerium.kernelslacker.org:/mnt/data/src/bk/bk-linus
into delerium.kernelslacker.org:/mnt/data/src/bk/agpgart
parents
75be0272
af7c5d60
Changes
21
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Showing
21 changed files
with
329 additions
and
808 deletions
+329
-808
arch/i386/defconfig
arch/i386/defconfig
+0
-1
arch/x86_64/defconfig
arch/x86_64/defconfig
+0
-1
drivers/char/agp/Kconfig
drivers/char/agp/Kconfig
+0
-10
drivers/char/agp/Makefile
drivers/char/agp/Makefile
+0
-1
drivers/char/agp/agp.h
drivers/char/agp/agp.h
+9
-1
drivers/char/agp/ali-agp.c
drivers/char/agp/ali-agp.c
+1
-1
drivers/char/agp/amd-k7-agp.c
drivers/char/agp/amd-k7-agp.c
+48
-1
drivers/char/agp/amd64-agp.c
drivers/char/agp/amd64-agp.c
+1
-1
drivers/char/agp/ati-agp.c
drivers/char/agp/ati-agp.c
+1
-1
drivers/char/agp/backend.c
drivers/char/agp/backend.c
+6
-6
drivers/char/agp/efficeon-agp.c
drivers/char/agp/efficeon-agp.c
+1
-1
drivers/char/agp/frontend.c
drivers/char/agp/frontend.c
+20
-20
drivers/char/agp/generic.c
drivers/char/agp/generic.c
+212
-104
drivers/char/agp/i460-agp.c
drivers/char/agp/i460-agp.c
+1
-1
drivers/char/agp/intel-agp.c
drivers/char/agp/intel-agp.c
+5
-1
drivers/char/agp/intel-mch-agp.c
drivers/char/agp/intel-mch-agp.c
+0
-643
drivers/char/agp/nvidia-agp.c
drivers/char/agp/nvidia-agp.c
+1
-1
drivers/char/agp/sis-agp.c
drivers/char/agp/sis-agp.c
+1
-1
drivers/char/agp/sworks-agp.c
drivers/char/agp/sworks-agp.c
+1
-1
drivers/char/agp/uninorth-agp.c
drivers/char/agp/uninorth-agp.c
+1
-1
drivers/char/agp/via-agp.c
drivers/char/agp/via-agp.c
+20
-10
No files found.
arch/i386/defconfig
View file @
3d3bad5b
...
...
@@ -802,7 +802,6 @@ CONFIG_AGP=y
# CONFIG_AGP_AMD is not set
# CONFIG_AGP_AMD64 is not set
CONFIG_AGP_INTEL=y
CONFIG_AGP_INTEL_MCH=m
# CONFIG_AGP_NVIDIA is not set
# CONFIG_AGP_SIS is not set
# CONFIG_AGP_SWORKS is not set
...
...
arch/x86_64/defconfig
View file @
3d3bad5b
...
...
@@ -672,7 +672,6 @@ CONFIG_RTC=y
#
CONFIG_AGP=y
CONFIG_AGP_AMD64=y
# CONFIG_AGP_INTEL_MCH is not set
# CONFIG_DRM is not set
# CONFIG_MWAVE is not set
CONFIG_RAW_DRIVER=y
...
...
drivers/char/agp/Kconfig
View file @
3d3bad5b
...
...
@@ -89,16 +89,6 @@ config AGP_INTEL
use GLX or DRI, or if you have any Intel integrated graphics
chipsets. If unsure, say Y.
config AGP_INTEL_MCH
tristate "Intel i865 chipset support"
depends on AGP && X86
help
This option gives you AGP support for the GLX component of XFree86 4.x
on Intel chipsets that support Intel EM64T processors.
You should say Y here if you use XFree86 3.3.6 or 4.x and want to
use GLX or DRI. If unsure, say Y.
config AGP_NVIDIA
tristate "NVIDIA nForce/nForce2 chipset support"
depends on AGP && X86 && !X86_64
...
...
drivers/char/agp/Makefile
View file @
3d3bad5b
...
...
@@ -9,7 +9,6 @@ obj-$(CONFIG_AGP_ALPHA_CORE) += alpha-agp.o
obj-$(CONFIG_AGP_EFFICEON)
+=
efficeon-agp.o
obj-$(CONFIG_AGP_HP_ZX1)
+=
hp-agp.o
obj-$(CONFIG_AGP_I460)
+=
i460-agp.o
obj-$(CONFIG_AGP_INTEL_MCH)
+=
intel-mch-agp.o
obj-$(CONFIG_AGP_INTEL)
+=
intel-agp.o
obj-$(CONFIG_AGP_NVIDIA)
+=
nvidia-agp.o
obj-$(CONFIG_AGP_SIS)
+=
sis-agp.o
...
...
drivers/char/agp/agp.h
View file @
3d3bad5b
...
...
@@ -137,6 +137,7 @@ struct agp_bridge_data {
int
max_memory_agp
;
/* in number of pages */
int
aperture_size_idx
;
int
capndx
;
int
flags
;
char
major_version
;
char
minor_version
;
};
...
...
@@ -255,7 +256,7 @@ void *agp_generic_alloc_page(void);
void
agp_generic_destroy_page
(
void
*
addr
);
void
agp_free_key
(
int
key
);
int
agp_num_entries
(
void
);
u32
agp_collect_device_status
(
u32
mode
,
u32
command
);
u32
agp_collect_device_status
(
struct
agp_bridge_data
*
bridge
,
u32
mode
,
u32
command
);
void
agp_device_command
(
u32
command
,
int
agp_v3
);
int
agp_3_5_enable
(
struct
agp_bridge_data
*
bridge
);
void
global_cache_flush
(
void
);
...
...
@@ -315,4 +316,11 @@ extern int agp_try_unsupported_boot;
#define AGPCTRL_APERENB (1<<8)
#define AGPCTRL_GTLBEN (1<<7)
#define AGP2_RESERVED_MASK 0x00fffcc8
#define AGP3_RESERVED_MASK 0x00ff00cc
#define AGP_ERRATA_FASTWRITES 1<<0
#define AGP_ERRATA_SBA 1<<1
#define AGP_ERRATA_1X 1<<2
#endif
/* _AGP_BACKEND_PRIV_H */
drivers/char/agp/ali-agp.c
View file @
3d3bad5b
...
...
@@ -398,7 +398,7 @@ static int __init agp_ali_init(void)
{
if
(
agp_off
)
return
-
EINVAL
;
return
pci_
module_init
(
&
agp_ali_pci_driver
);
return
pci_
register_driver
(
&
agp_ali_pci_driver
);
}
static
void
__exit
agp_ali_cleanup
(
void
)
...
...
drivers/char/agp/amd-k7-agp.c
View file @
3d3bad5b
...
...
@@ -421,6 +421,53 @@ static int __devinit agp_amdk7_probe(struct pci_dev *pdev,
bridge
->
dev
=
pdev
;
bridge
->
capndx
=
cap_ptr
;
/* 751 Errata (22564_B-1.PDF)
erratum 20: strobe glitch with Nvidia NV10 GeForce cards.
system controller may experience noise due to strong drive strengths
*/
if
(
agp_bridge
->
dev
->
device
==
PCI_DEVICE_ID_AMD_FE_GATE_7006
)
{
u8
cap_ptr
=
0
;
struct
pci_dev
*
gfxcard
=
NULL
;
while
(
!
cap_ptr
)
{
gfxcard
=
pci_get_class
(
PCI_CLASS_DISPLAY_VGA
<<
8
,
gfxcard
);
if
(
!
gfxcard
)
{
printk
(
KERN_INFO
PFX
"Couldn't find an AGP VGA controller.
\n
"
);
return
-
ENODEV
;
}
cap_ptr
=
pci_find_capability
(
gfxcard
,
PCI_CAP_ID_AGP
);
if
(
!
cap_ptr
)
{
pci_dev_put
(
gfxcard
);
continue
;
}
}
/* With so many variants of NVidia cards, it's simpler just
to blacklist them all, and then whitelist them as needed
(if necessary at all). */
if
(
gfxcard
->
vendor
==
PCI_VENDOR_ID_NVIDIA
)
{
agp_bridge
->
flags
|=
AGP_ERRATA_1X
;
printk
(
KERN_INFO
PFX
"AMD 751 chipset with NVidia GeForce detected. Forcing to 1X due to errata.
\n
"
);
}
pci_dev_put
(
gfxcard
);
}
/* 761 Errata (23613_F.pdf)
* Revisions B0/B1 were a disaster.
* erratum 44: SYSCLK/AGPCLK skew causes 2X failures -- Force mode to 1X
* erratum 45: Timing problem prevents fast writes -- Disable fast write.
* erratum 46: Setup violation on AGP SBA pins - Disable side band addressing.
* With this lot disabled, we should prevent lockups. */
if
(
agp_bridge
->
dev
->
device
==
PCI_DEVICE_ID_AMD_FE_GATE_700E
)
{
u8
revision
=
0
;
pci_read_config_byte
(
pdev
,
PCI_REVISION_ID
,
&
revision
);
if
(
revision
==
0x10
||
revision
==
0x11
)
{
agp_bridge
->
flags
=
AGP_ERRATA_FASTWRITES
;
agp_bridge
->
flags
|=
AGP_ERRATA_SBA
;
agp_bridge
->
flags
|=
AGP_ERRATA_1X
;
printk
(
KERN_INFO
PFX
"AMD 761 chipset with errata detected - disabling AGP fast writes & SBA and forcing to 1X.
\n
"
);
}
}
/* Fill in the mode register */
pci_read_config_dword
(
pdev
,
bridge
->
capndx
+
PCI_AGP_STATUS
,
...
...
@@ -480,7 +527,7 @@ static int __init agp_amdk7_init(void)
{
if
(
agp_off
)
return
-
EINVAL
;
return
pci_
module_init
(
&
agp_amdk7_pci_driver
);
return
pci_
register_driver
(
&
agp_amdk7_pci_driver
);
}
static
void
__exit
agp_amdk7_cleanup
(
void
)
...
...
drivers/char/agp/amd64-agp.c
View file @
3d3bad5b
...
...
@@ -709,7 +709,7 @@ int __init agp_amd64_init(void)
if
(
agp_off
)
return
-
EINVAL
;
if
(
pci_
module_init
(
&
agp_amd64_pci_driver
)
>
0
)
{
if
(
pci_
register_driver
(
&
agp_amd64_pci_driver
)
>
0
)
{
struct
pci_dev
*
dev
;
if
(
!
agp_try_unsupported
&&
!
agp_try_unsupported_boot
)
{
printk
(
KERN_INFO
PFX
"No supported AGP bridge found.
\n
"
);
...
...
drivers/char/agp/ati-agp.c
View file @
3d3bad5b
...
...
@@ -531,7 +531,7 @@ static int __init agp_ati_init(void)
{
if
(
agp_off
)
return
-
EINVAL
;
return
pci_
module_init
(
&
agp_ati_pci_driver
);
return
pci_
register_driver
(
&
agp_ati_pci_driver
);
}
static
void
__exit
agp_ati_cleanup
(
void
)
...
...
drivers/char/agp/backend.c
View file @
3d3bad5b
...
...
@@ -18,12 +18,12 @@
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* JEFF HARTMANN, DAVE JONES, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
* JEFF HARTMANN, DAVE JONES, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
* OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* TODO:
* TODO:
* - Allocate more than order 0 pages to avoid too much linear map splitting.
*/
#include <linux/module.h>
...
...
@@ -160,7 +160,7 @@ static int agp_backend_initialize(struct agp_bridge_data *bridge)
goto
err_out
;
}
got_gatt
=
1
;
bridge
->
key_list
=
vmalloc
(
PAGE_SIZE
*
4
);
if
(
bridge
->
key_list
==
NULL
)
{
printk
(
KERN_ERR
PFX
"error allocating memory for key lists.
\n
"
);
...
...
@@ -168,7 +168,7 @@ static int agp_backend_initialize(struct agp_bridge_data *bridge)
goto
err_out
;
}
got_keylist
=
1
;
/* FIXME vmalloc'd memory not guaranteed contiguous */
memset
(
bridge
->
key_list
,
0
,
PAGE_SIZE
*
4
);
...
...
drivers/char/agp/efficeon-agp.c
View file @
3d3bad5b
...
...
@@ -448,7 +448,7 @@ static int __init agp_efficeon_init(void)
return
0
;
agp_initialised
=
1
;
return
pci_
module_init
(
&
agp_efficeon_pci_driver
);
return
pci_
register_driver
(
&
agp_efficeon_pci_driver
);
}
static
void
__exit
agp_efficeon_cleanup
(
void
)
...
...
drivers/char/agp/frontend.c
View file @
3d3bad5b
...
...
@@ -18,9 +18,9 @@
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* JEFF HARTMANN, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
* JEFF HARTMANN, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
* OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*/
...
...
@@ -152,8 +152,8 @@ static void agp_add_seg_to_client(struct agp_client *client,
/* Originally taken from linux/mm/mmap.c from the array
* protection_map.
* The original really should be exported to modules, or
* some routine which does the conversion for you
* The original really should be exported to modules, or
* some routine which does the conversion for you
*/
static
const
pgprot_t
my_protect_map
[
16
]
=
...
...
@@ -285,8 +285,8 @@ void agp_remove_file_private(struct agp_file_private * priv)
/* End - File flag list routines */
/*
* Wrappers for agp_free_memory & agp_allocate_memory
/*
* Wrappers for agp_free_memory & agp_allocate_memory
* These make sure that internal lists are kept updated.
*/
static
void
agp_free_memory_wrap
(
struct
agp_memory
*
memory
)
...
...
@@ -471,7 +471,7 @@ static void agp_controller_release_current(struct agp_controller *controller,
agp_backend_release
();
}
/*
/*
* Routines for managing client lists -
* These routines are for managing the list of auth'ed clients.
*/
...
...
@@ -993,24 +993,24 @@ static int agp_ioctl(struct inode *inode, struct file *file,
if
((
agp_fe
.
current_controller
==
NULL
)
&&
(
cmd
!=
AGPIOC_ACQUIRE
))
{
ret_val
=
-
EINVAL
;
goto
ioctl_out
;
goto
ioctl_out
;
}
if
((
agp_fe
.
backend_acquired
!=
TRUE
)
&&
(
cmd
!=
AGPIOC_ACQUIRE
))
{
ret_val
=
-
EBUSY
;
goto
ioctl_out
;
goto
ioctl_out
;
}
if
(
cmd
!=
AGPIOC_ACQUIRE
)
{
if
(
!
(
test_bit
(
AGP_FF_IS_CONTROLLER
,
&
curr_priv
->
access_flags
)))
{
ret_val
=
-
EPERM
;
goto
ioctl_out
;
goto
ioctl_out
;
}
/* Use the original pid of the controller,
* in case it's threaded */
if
(
agp_fe
.
current_controller
->
pid
!=
curr_priv
->
my_pid
)
{
ret_val
=
-
EBUSY
;
goto
ioctl_out
;
goto
ioctl_out
;
}
}
...
...
@@ -1022,35 +1022,35 @@ static int agp_ioctl(struct inode *inode, struct file *file,
case
AGPIOC_ACQUIRE
:
ret_val
=
agpioc_acquire_wrap
(
curr_priv
);
break
;
case
AGPIOC_RELEASE
:
ret_val
=
agpioc_release_wrap
(
curr_priv
);
break
;
case
AGPIOC_SETUP
:
ret_val
=
agpioc_setup_wrap
(
curr_priv
,
(
void
__user
*
)
arg
);
break
;
case
AGPIOC_RESERVE
:
ret_val
=
agpioc_reserve_wrap
(
curr_priv
,
(
void
__user
*
)
arg
);
break
;
case
AGPIOC_PROTECT
:
ret_val
=
agpioc_protect_wrap
(
curr_priv
);
break
;
case
AGPIOC_ALLOCATE
:
ret_val
=
agpioc_allocate_wrap
(
curr_priv
,
(
void
__user
*
)
arg
);
break
;
case
AGPIOC_DEALLOCATE
:
ret_val
=
agpioc_deallocate_wrap
(
curr_priv
,
(
int
)
arg
);
break
;
case
AGPIOC_BIND
:
ret_val
=
agpioc_bind_wrap
(
curr_priv
,
(
void
__user
*
)
arg
);
break
;
case
AGPIOC_UNBIND
:
ret_val
=
agpioc_unbind_wrap
(
curr_priv
,
(
void
__user
*
)
arg
);
break
;
...
...
drivers/char/agp/generic.c
View file @
3d3bad5b
/*
* AGPGART driver.
* Copyright (C) 2002-200
4
Dave Jones.
* Copyright (C) 2002-200
5
Dave Jones.
* Copyright (C) 1999 Jeff Hartmann.
* Copyright (C) 1999 Precision Insight, Inc.
* Copyright (C) 1999 Xi Graphics, Inc.
...
...
@@ -289,6 +289,19 @@ int agp_num_entries(void)
EXPORT_SYMBOL_GPL
(
agp_num_entries
);
static
int
check_bridge_mode
(
struct
pci_dev
*
dev
)
{
u32
agp3
;
u8
cap_ptr
;
cap_ptr
=
pci_find_capability
(
dev
,
PCI_CAP_ID_AGP
);
pci_read_config_dword
(
dev
,
cap_ptr
+
AGPSTAT
,
&
agp3
);
if
(
agp3
&
AGPSTAT_MODE_3_0
)
return
1
;
return
0
;
}
/**
* agp_copy_info - copy bridge state information
*
...
...
@@ -310,7 +323,10 @@ int agp_copy_info(struct agp_kern_info *info)
info
->
version
.
minor
=
agp_bridge
->
version
->
minor
;
info
->
chipset
=
agp_bridge
->
type
;
info
->
device
=
agp_bridge
->
dev
;
info
->
mode
=
agp_bridge
->
mode
;
if
(
check_bridge_mode
(
agp_bridge
->
dev
))
info
->
mode
=
agp_bridge
->
mode
&
~
AGP3_RESERVED_MASK
;
else
info
->
mode
=
agp_bridge
->
mode
&
~
AGP2_RESERVED_MASK
;
info
->
aper_base
=
agp_bridge
->
gart_bus_addr
;
info
->
aper_size
=
agp_return_size
();
info
->
max_memory
=
agp_bridge
->
max_memory_agp
;
...
...
@@ -403,71 +419,130 @@ EXPORT_SYMBOL(agp_unbind_memory);
/* Generic Agp routines - Start */
static
void
agp_v2_parse_one
(
u32
*
mode
,
u32
*
cmd
,
u32
*
tmp
)
static
void
agp_v2_parse_one
(
u32
*
requested_mode
,
u32
*
bridge_agpstat
,
u32
*
vga_agpstat
)
{
u32
tmp
;
if
(
*
requested_mode
&
AGP2_RESERVED_MASK
)
{
printk
(
KERN_INFO
PFX
"reserved bits set in mode 0x%x. Fixed.
\n
"
,
*
requested_mode
);
*
requested_mode
&=
~
AGP2_RESERVED_MASK
;
}
/* Check the speed bits make sense. Only one should be set. */
tmp
=
*
requested_mode
&
7
;
if
(
tmp
==
0
)
{
printk
(
KERN_INFO
PFX
"%s tried to set rate=x0. Setting to x1 mode.
\n
"
,
current
->
comm
);
*
requested_mode
|=
AGPSTAT2_1X
;
}
if
(
tmp
==
3
)
{
printk
(
KERN_INFO
PFX
"%s tried to set rate=x3. Setting to x2 mode.
\n
"
,
current
->
comm
);
*
requested_mode
|=
AGPSTAT2_2X
;
}
if
(
tmp
>
4
)
{
printk
(
KERN_INFO
PFX
"%s tried to set rate=x%d. Setting to x4 mode.
\n
"
,
current
->
comm
,
tmp
);
*
requested_mode
|=
AGPSTAT2_4X
;
}
/* disable SBA if it's not supported */
if
(
!
((
*
cmd
&
AGPSTAT_SBA
)
&&
(
*
tmp
&
AGPSTAT_SBA
)
&&
(
*
mode
&
AGPSTAT_SBA
)))
*
cmd
&=
~
AGPSTAT_SBA
;
if
(
!
((
*
bridge_agpstat
&
AGPSTAT_SBA
)
&&
(
*
vga_agpstat
&
AGPSTAT_SBA
)
&&
(
*
requested_
mode
&
AGPSTAT_SBA
)))
*
bridge_agpstat
&=
~
AGPSTAT_SBA
;
/* Set
speed
*/
if
(
!
((
*
cmd
&
AGPSTAT2_4X
)
&&
(
*
tmp
&
AGPSTAT2_4X
)
&&
(
*
mode
&
AGPSTAT2_4X
)))
*
cmd
&=
~
AGPSTAT2_4X
;
/* Set
rate
*/
if
(
!
((
*
bridge_agpstat
&
AGPSTAT2_4X
)
&&
(
*
vga_agpstat
&
AGPSTAT2_4X
)
&&
(
*
requested_
mode
&
AGPSTAT2_4X
)))
*
bridge_agpstat
&=
~
AGPSTAT2_4X
;
if
(
!
((
*
cmd
&
AGPSTAT2_2X
)
&&
(
*
tmp
&
AGPSTAT2_2X
)
&&
(
*
mode
&
AGPSTAT2_2X
)))
*
cmd
&=
~
AGPSTAT2_2X
;
if
(
!
((
*
bridge_agpstat
&
AGPSTAT2_2X
)
&&
(
*
vga_agpstat
&
AGPSTAT2_2X
)
&&
(
*
requested_
mode
&
AGPSTAT2_2X
)))
*
bridge_agpstat
&=
~
AGPSTAT2_2X
;
if
(
!
((
*
cmd
&
AGPSTAT2_1X
)
&&
(
*
tmp
&
AGPSTAT2_1X
)
&&
(
*
mode
&
AGPSTAT2_1X
)))
*
cmd
&=
~
AGPSTAT2_1X
;
if
(
!
((
*
bridge_agpstat
&
AGPSTAT2_1X
)
&&
(
*
vga_agpstat
&
AGPSTAT2_1X
)
&&
(
*
requested_
mode
&
AGPSTAT2_1X
)))
*
bridge_agpstat
&=
~
AGPSTAT2_1X
;
/* Now we know what mode it should be, clear out the unwanted bits. */
if
(
*
cmd
&
AGPSTAT2_4X
)
*
cmd
&=
~
(
AGPSTAT2_1X
|
AGPSTAT2_2X
);
/* 4X */
if
(
*
bridge_agpstat
&
AGPSTAT2_4X
)
*
bridge_agpstat
&=
~
(
AGPSTAT2_1X
|
AGPSTAT2_2X
);
/* 4X */
if
(
*
bridge_agpstat
&
AGPSTAT2_2X
)
*
bridge_agpstat
&=
~
(
AGPSTAT2_1X
|
AGPSTAT2_4X
);
/* 2X */
if
(
*
bridge_agpstat
&
AGPSTAT2_1X
)
*
bridge_agpstat
&=
~
(
AGPSTAT2_2X
|
AGPSTAT2_4X
);
/* 1X */
/* Apply any errata. */
if
(
agp_bridge
->
flags
&
AGP_ERRATA_FASTWRITES
)
*
bridge_agpstat
&=
~
AGPSTAT_FW
;
if
(
*
cmd
&
AGPSTAT2_2X
)
*
cmd
&=
~
(
AGPSTAT2_1X
|
AGPSTAT2_4X
);
/* 2X */
if
(
agp_bridge
->
flags
&
AGP_ERRATA_SBA
)
*
bridge_agpstat
&=
~
AGPSTAT_SBA
;
if
(
*
cmd
&
AGPSTAT2_1X
)
*
cmd
&=
~
(
AGPSTAT2_2X
|
AGPSTAT2_4X
);
/* 1X */
if
(
agp_bridge
->
flags
&
AGP_ERRATA_1X
)
{
*
bridge_agpstat
&=
~
(
AGPSTAT2_2X
|
AGPSTAT2_4X
);
*
bridge_agpstat
|=
AGPSTAT2_1X
;
}
/* If we've dropped down to 1X, disable fast writes. */
if
(
*
bridge_agpstat
&
AGPSTAT2_1X
)
*
bridge_agpstat
&=
~
AGPSTAT_FW
;
}
/*
*
mode = requested mode
.
*
cmd
= PCI_AGP_STATUS from agp bridge.
*
tmp
= PCI_AGP_STATUS from graphic card.
*
requested_mode = Mode requested by (typically) X
.
*
bridge_agpstat
= PCI_AGP_STATUS from agp bridge.
*
vga_agpstat
= PCI_AGP_STATUS from graphic card.
*/
static
void
agp_v3_parse_one
(
u32
*
mode
,
u32
*
cmd
,
u32
*
tmp
)
static
void
agp_v3_parse_one
(
u32
*
requested_mode
,
u32
*
bridge_agpstat
,
u32
*
vga_agpstat
)
{
u32
origcmd
=*
cmd
,
origtmp
=*
tmp
;
u32
origbridge
=*
bridge_agpstat
,
origvga
=*
vga_agpstat
;
u32
tmp
;
if
(
*
requested_mode
&
AGP3_RESERVED_MASK
)
{
printk
(
KERN_INFO
PFX
"reserved bits set in mode 0x%x. Fixed.
\n
"
,
*
requested_mode
);
*
requested_mode
&=
~
AGP3_RESERVED_MASK
;
}
/* Check the speed bits make sense. */
tmp
=
*
requested_mode
&
7
;
if
(
tmp
==
0
)
{
printk
(
KERN_INFO
PFX
"%s tried to set rate=x0. Setting to AGP3 x4 mode.
\n
"
,
current
->
comm
);
*
requested_mode
|=
AGPSTAT3_4X
;
}
if
(
tmp
==
3
)
{
printk
(
KERN_INFO
PFX
"%s tried to set rate=x3. Setting to AGP3 x4 mode.
\n
"
,
current
->
comm
);
*
requested_mode
|=
AGPSTAT3_4X
;
}
if
(
tmp
>
3
)
{
printk
(
KERN_INFO
PFX
"%s tried to set rate=x%d. Setting to AGP3 x8 mode.
\n
"
,
current
->
comm
,
tmp
);
*
requested_mode
|=
AGPSTAT3_8X
;
}
/* ARQSZ - Set the value to the maximum one.
* Don't allow the mode register to override values. */
*
cmd
=
((
*
cmd
&
~
AGPSTAT_ARQSZ
)
|
max_t
(
u32
,(
*
cmd
&
AGPSTAT_ARQSZ
),(
*
tmp
&
AGPSTAT_ARQSZ
)));
*
bridge_agpstat
=
((
*
bridge_agpstat
&
~
AGPSTAT_ARQSZ
)
|
max_t
(
u32
,(
*
bridge_agpstat
&
AGPSTAT_ARQSZ
),(
*
vga_agpstat
&
AGPSTAT_ARQSZ
)));
/* Calibration cycle.
* Don't allow the mode register to override values. */
*
cmd
=
((
*
cmd
&
~
AGPSTAT_CAL_MASK
)
|
min_t
(
u32
,(
*
cmd
&
AGPSTAT_CAL_MASK
),(
*
tmp
&
AGPSTAT_CAL_MASK
)));
*
bridge_agpstat
=
((
*
bridge_agpstat
&
~
AGPSTAT_CAL_MASK
)
|
min_t
(
u32
,(
*
bridge_agpstat
&
AGPSTAT_CAL_MASK
),(
*
vga_agpstat
&
AGPSTAT_CAL_MASK
)));
/* SBA *must* be supported for AGP v3 */
*
cmd
|=
AGPSTAT_SBA
;
*
bridge_agpstat
|=
AGPSTAT_SBA
;
/*
* Set speed.
* Check for invalid speeds. This can happen when applications
* written before the AGP 3.0 standard pass AGP2.x modes to AGP3 hardware
*/
if
(
*
mode
&
AGPSTAT_MODE_3_0
)
{
if
(
*
requested_
mode
&
AGPSTAT_MODE_3_0
)
{
/*
* Caller hasn't a clue what it
s doing. We are
in 3.0 mode,
* Caller hasn't a clue what it
is doing. Bridge is
in 3.0 mode,
* have been passed a 3.0 mode, but with 2.x speed bits set.
* AGP2.x 4x -> AGP3.0 4x.
*/
if
(
*
mode
&
AGPSTAT2_4X
)
{
if
(
*
requested_
mode
&
AGPSTAT2_4X
)
{
printk
(
KERN_INFO
PFX
"%s passes broken AGP3 flags (%x). Fixed.
\n
"
,
current
->
comm
,
*
mode
);
*
mode
&=
~
AGPSTAT2_4X
;
*
mode
|=
AGPSTAT3_4X
;
current
->
comm
,
*
requested_
mode
);
*
requested_
mode
&=
~
AGPSTAT2_4X
;
*
requested_
mode
|=
AGPSTAT3_4X
;
}
}
else
{
/*
...
...
@@ -476,27 +551,27 @@ static void agp_v3_parse_one(u32 *mode, u32 *cmd, u32 *tmp)
* Convert AGP 1x,2x,4x -> AGP 3.0 4x.
*/
printk
(
KERN_INFO
PFX
"%s passes broken AGP2 flags (%x) in AGP3 mode. Fixed.
\n
"
,
current
->
comm
,
*
mode
);
*
mode
&=
~
(
AGPSTAT2_4X
|
AGPSTAT2_2X
|
AGPSTAT2_1X
);
*
mode
|=
AGPSTAT3_4X
;
current
->
comm
,
*
requested_
mode
);
*
requested_
mode
&=
~
(
AGPSTAT2_4X
|
AGPSTAT2_2X
|
AGPSTAT2_1X
);
*
requested_
mode
|=
AGPSTAT3_4X
;
}
if
(
*
mode
&
AGPSTAT3_8X
)
{
if
(
!
(
*
cmd
&
AGPSTAT3_8X
))
{
*
cmd
&=
~
(
AGPSTAT3_8X
|
AGPSTAT3_RSVD
);
*
cmd
|=
AGPSTAT3_4X
;
if
(
*
requested_
mode
&
AGPSTAT3_8X
)
{
if
(
!
(
*
bridge_agpstat
&
AGPSTAT3_8X
))
{
*
bridge_agpstat
&=
~
(
AGPSTAT3_8X
|
AGPSTAT3_RSVD
);
*
bridge_agpstat
|=
AGPSTAT3_4X
;
printk
(
"%s requested AGPx8 but bridge not capable.
\n
"
,
current
->
comm
);
return
;
}
if
(
!
(
*
tmp
&
AGPSTAT3_8X
))
{
*
cmd
&=
~
(
AGPSTAT3_8X
|
AGPSTAT3_RSVD
);
*
cmd
|=
AGPSTAT3_4X
;
if
(
!
(
*
vga_agpstat
&
AGPSTAT3_8X
))
{
*
bridge_agpstat
&=
~
(
AGPSTAT3_8X
|
AGPSTAT3_RSVD
);
*
bridge_agpstat
|=
AGPSTAT3_4X
;
printk
(
"%s requested AGPx8 but graphic card not capable.
\n
"
,
current
->
comm
);
return
;
}
/* All set, bridge & device can do AGP x8*/
*
cmd
&=
~
(
AGPSTAT3_4X
|
AGPSTAT3_RSVD
);
return
;
*
bridge_agpstat
&=
~
(
AGPSTAT3_4X
|
AGPSTAT3_RSVD
);
goto
done
;
}
else
{
...
...
@@ -505,71 +580,105 @@ static void agp_v3_parse_one(u32 *mode, u32 *cmd, u32 *tmp)
* If the hardware can't do x4, we're up shit creek, and never
* should have got this far.
*/
*
cmd
&=
~
(
AGPSTAT3_8X
|
AGPSTAT3_RSVD
);
if
((
*
cmd
&
AGPSTAT3_4X
)
&&
(
*
tmp
&
AGPSTAT3_4X
))
*
cmd
|=
AGPSTAT3_4X
;
*
bridge_agpstat
&=
~
(
AGPSTAT3_8X
|
AGPSTAT3_RSVD
);
if
((
*
bridge_agpstat
&
AGPSTAT3_4X
)
&&
(
*
vga_agpstat
&
AGPSTAT3_4X
))
*
bridge_agpstat
|=
AGPSTAT3_4X
;
else
{
printk
(
KERN_INFO
PFX
"Badness. Don't know which AGP mode to set. "
"[
cmd:%x tmp:%x fell back to:- cmd:%x tmp
:%x]
\n
"
,
orig
cmd
,
origtmp
,
*
cmd
,
*
tmp
);
if
(
!
(
*
cmd
&
AGPSTAT3_4X
))
"[
bridge_agpstat:%x vga_agpstat:%x fell back to:- bridge_agpstat:%x vga_agpstat
:%x]
\n
"
,
orig
bridge
,
origvga
,
*
bridge_agpstat
,
*
vga_agpstat
);
if
(
!
(
*
bridge_agpstat
&
AGPSTAT3_4X
))
printk
(
KERN_INFO
PFX
"Bridge couldn't do AGP x4.
\n
"
);
if
(
!
(
*
tmp
&
AGPSTAT3_4X
))
if
(
!
(
*
vga_agpstat
&
AGPSTAT3_4X
))
printk
(
KERN_INFO
PFX
"Graphic card couldn't do AGP x4.
\n
"
);
return
;
}
}
done:
/* Apply any errata. */
if
(
agp_bridge
->
flags
&
AGP_ERRATA_FASTWRITES
)
*
bridge_agpstat
&=
~
AGPSTAT_FW
;
if
(
agp_bridge
->
flags
&
AGP_ERRATA_SBA
)
*
bridge_agpstat
&=
~
AGPSTAT_SBA
;
if
(
agp_bridge
->
flags
&
AGP_ERRATA_1X
)
{
*
bridge_agpstat
&=
~
(
AGPSTAT2_2X
|
AGPSTAT2_4X
);
*
bridge_agpstat
|=
AGPSTAT2_1X
;
}
}
//FIXME: This doesn't smell right.
//We need a function we pass an agp_device to.
u32
agp_collect_device_status
(
u32
mode
,
u32
cmd
)
/**
* agp_collect_device_status - determine correct agp_cmd from various agp_stat's
* @bridge: an agp_bridge_data struct allocated for the AGP host bridge.
* @requested_mode: requested agp_stat from userspace (Typically from X)
* @bridge_agpstat: current agp_stat from AGP bridge.
*
* This function will hunt for an AGP graphics card, and try to match
* the requested mode to the capabilities of both the bridge and the card.
*/
u32
agp_collect_device_status
(
struct
agp_bridge_data
*
bridge
,
u32
requested_mode
,
u32
bridge_agpstat
)
{
struct
pci_dev
*
device
=
NULL
;
u8
cap_ptr
;
u32
tmp
;
u32
agp3
;
for_each_pci_dev
(
device
)
{
u8
cap_ptr
=
0
;
u32
vga_agpstat
;
while
(
!
cap_ptr
)
{
device
=
pci_get_class
(
PCI_CLASS_DISPLAY_VGA
<<
8
,
device
);
if
(
!
device
)
{
printk
(
KERN_INFO
PFX
"Couldn't find an AGP VGA controller.
\n
"
);
return
0
;
}
cap_ptr
=
pci_find_capability
(
device
,
PCI_CAP_ID_AGP
);
if
(
!
cap_ptr
)
if
(
!
cap_ptr
)
{
pci_dev_put
(
device
);
continue
;
}
if
((
device
->
bus
->
self
->
vendor
!=
bridge
->
dev
->
vendor
)
&&
(
device
->
bus
->
self
->
device
!=
bridge
->
dev
->
device
))
{
pci_dev_put
(
device
);
cap_ptr
=
0
;
continue
;
//FIXME: We should probably skip anything here that
// isn't an AGP graphic card.
/*
* Ok, here we have a AGP device. Disable impossible
* settings, and adjust the readqueue to the minimum.
*/
pci_read_config_dword
(
device
,
cap_ptr
+
PCI_AGP_STATUS
,
&
tmp
);
/* adjust RQ depth */
cmd
=
((
cmd
&
~
AGPSTAT_RQ_DEPTH
)
|
min_t
(
u32
,
(
mode
&
AGPSTAT_RQ_DEPTH
),
min_t
(
u32
,
(
cmd
&
AGPSTAT_RQ_DEPTH
),
(
tmp
&
AGPSTAT_RQ_DEPTH
))));
/* disable FW if it's not supported */
if
(
!
((
cmd
&
AGPSTAT_FW
)
&&
(
tmp
&
AGPSTAT_FW
)
&&
(
mode
&
AGPSTAT_FW
)))
cmd
&=
~
AGPSTAT_FW
;
/* Check to see if we are operating in 3.0 mode */
pci_read_config_dword
(
device
,
cap_ptr
+
AGPSTAT
,
&
agp3
);
if
(
agp3
&
AGPSTAT_MODE_3_0
)
{
agp_v3_parse_one
(
&
mode
,
&
cmd
,
&
tmp
);
}
else
{
agp_v2_parse_one
(
&
mode
,
&
cmd
,
&
tmp
);
}
}
return
cmd
;
/*
* Ok, here we have a AGP device. Disable impossible
* settings, and adjust the readqueue to the minimum.
*/
pci_read_config_dword
(
device
,
cap_ptr
+
PCI_AGP_STATUS
,
&
vga_agpstat
);
/* adjust RQ depth */
bridge_agpstat
=
((
bridge_agpstat
&
~
AGPSTAT_RQ_DEPTH
)
|
min_t
(
u32
,
(
requested_mode
&
AGPSTAT_RQ_DEPTH
),
min_t
(
u32
,
(
bridge_agpstat
&
AGPSTAT_RQ_DEPTH
),
(
vga_agpstat
&
AGPSTAT_RQ_DEPTH
))));
/* disable FW if it's not supported */
if
(
!
((
bridge_agpstat
&
AGPSTAT_FW
)
&&
(
vga_agpstat
&
AGPSTAT_FW
)
&&
(
requested_mode
&
AGPSTAT_FW
)))
bridge_agpstat
&=
~
AGPSTAT_FW
;
/* Check to see if we are operating in 3.0 mode */
if
(
check_bridge_mode
(
agp_bridge
->
dev
))
agp_v3_parse_one
(
&
requested_mode
,
&
bridge_agpstat
,
&
vga_agpstat
);
else
agp_v2_parse_one
(
&
requested_mode
,
&
bridge_agpstat
,
&
vga_agpstat
);
pci_dev_put
(
device
);
return
bridge_agpstat
;
}
EXPORT_SYMBOL
(
agp_collect_device_status
);
void
agp_device_command
(
u32
command
,
int
agp_v3
)
void
agp_device_command
(
u32
bridge_agpstat
,
int
agp_v3
)
{
struct
pci_dev
*
device
=
NULL
;
int
mode
;
mode
=
command
&
0x7
;
mode
=
bridge_agpstat
&
0x7
;
if
(
agp_v3
)
mode
*=
4
;
...
...
@@ -580,7 +689,7 @@ void agp_device_command(u32 command, int agp_v3)
printk
(
KERN_INFO
PFX
"Putting AGP V%d device at %s into %dx mode
\n
"
,
agp_v3
?
3
:
2
,
pci_name
(
device
),
mode
);
pci_write_config_dword
(
device
,
agp
+
PCI_AGP_COMMAND
,
command
);
pci_write_config_dword
(
device
,
agp
+
PCI_AGP_COMMAND
,
bridge_agpstat
);
}
}
EXPORT_SYMBOL
(
agp_device_command
);
...
...
@@ -601,10 +710,9 @@ void get_agp_version(struct agp_bridge_data *bridge)
EXPORT_SYMBOL
(
get_agp_version
);
void
agp_generic_enable
(
u32
mode
)
void
agp_generic_enable
(
u32
requested_
mode
)
{
u32
command
,
temp
;
u32
agp3
;
u32
bridge_agpstat
,
temp
;
get_agp_version
(
agp_bridge
);
...
...
@@ -614,26 +722,26 @@ void agp_generic_enable(u32 mode)
agp_bridge
->
dev
->
slot_name
);
pci_read_config_dword
(
agp_bridge
->
dev
,
agp_bridge
->
capndx
+
PCI_AGP_STATUS
,
&
command
);
agp_bridge
->
capndx
+
PCI_AGP_STATUS
,
&
bridge_agpstat
);
command
=
agp_collect_device_status
(
mode
,
command
);
command
|=
AGPSTAT_AGP_ENABLE
;
bridge_agpstat
=
agp_collect_device_status
(
agp_bridge
,
requested_mode
,
bridge_agpstat
);
if
(
bridge_agpstat
==
0
)
/* Something bad happened. FIXME: Return error code? */
return
;
bridge_agpstat
|=
AGPSTAT_AGP_ENABLE
;
/* Do AGP version specific frobbing. */
if
(
agp_bridge
->
major_version
>=
3
)
{
pci_read_config_dword
(
agp_bridge
->
dev
,
agp_bridge
->
capndx
+
AGPSTAT
,
&
agp3
);
/* Check to see if we are operating in 3.0 mode */
if
(
agp3
&
AGPSTAT_MODE_3_0
)
{
if
(
check_bridge_mode
(
agp_bridge
->
dev
))
{
/* If we have 3.5, we can do the isoch stuff. */
if
(
agp_bridge
->
minor_version
>=
5
)
agp_3_5_enable
(
agp_bridge
);
agp_device_command
(
command
,
TRUE
);
agp_device_command
(
bridge_agpstat
,
TRUE
);
return
;
}
else
{
/* Disable calibration cycle in RX91<1> when not in AGP3.0 mode of operation.*/
command
&=
~
(
7
<<
10
)
;
bridge_agpstat
&=
~
(
7
<<
10
)
;
pci_read_config_dword
(
agp_bridge
->
dev
,
agp_bridge
->
capndx
+
AGPCTRL
,
&
temp
);
temp
|=
(
1
<<
9
);
pci_write_config_dword
(
agp_bridge
->
dev
,
agp_bridge
->
capndx
+
AGPCTRL
,
temp
);
...
...
@@ -644,7 +752,7 @@ void agp_generic_enable(u32 mode)
}
/* AGP v<3 */
agp_device_command
(
command
,
FALSE
);
agp_device_command
(
bridge_agpstat
,
FALSE
);
}
EXPORT_SYMBOL
(
agp_generic_enable
);
...
...
drivers/char/agp/i460-agp.c
View file @
3d3bad5b
...
...
@@ -624,7 +624,7 @@ static int __init agp_intel_i460_init(void)
{
if
(
agp_off
)
return
-
EINVAL
;
return
pci_
module_init
(
&
agp_intel_i460_pci_driver
);
return
pci_
register_driver
(
&
agp_intel_i460_pci_driver
);
}
static
void
__exit
agp_intel_i460_cleanup
(
void
)
...
...
drivers/char/agp/intel-agp.c
View file @
3d3bad5b
...
...
@@ -1758,6 +1758,8 @@ static int agp_intel_resume(struct pci_dev *pdev)
intel_i915_configure
();
else
if
(
bridge
->
driver
==
&
intel_830_driver
)
intel_i830_configure
();
else
if
(
bridge
->
driver
==
&
intel_810_driver
)
intel_i810_configure
();
return
0
;
}
...
...
@@ -1810,7 +1812,9 @@ static struct pci_driver agp_intel_pci_driver = {
static
int
__init
agp_intel_init
(
void
)
{
return
pci_module_init
(
&
agp_intel_pci_driver
);
if
(
agp_off
)
return
-
EINVAL
;
return
pci_register_driver
(
&
agp_intel_pci_driver
);
}
static
void
__exit
agp_intel_cleanup
(
void
)
...
...
drivers/char/agp/intel-mch-agp.c
deleted
100644 → 0
View file @
75be0272
/*
* Intel MCH AGPGART routines.
*/
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/agp_backend.h>
#include "agp.h"
#define AGP_DCACHE_MEMORY 1
#define AGP_PHYS_MEMORY 2
static
struct
gatt_mask
intel_i810_masks
[]
=
{
{.
mask
=
I810_PTE_VALID
,
.
type
=
0
},
{.
mask
=
(
I810_PTE_VALID
|
I810_PTE_LOCAL
),
.
type
=
AGP_DCACHE_MEMORY
},
{.
mask
=
I810_PTE_VALID
,
.
type
=
0
}
};
static
void
intel_i810_tlbflush
(
struct
agp_memory
*
mem
)
{
return
;
}
static
void
intel_i810_agp_enable
(
u32
mode
)
{
return
;
}
/*
* The i810/i830 requires a physical address to program its mouse
* pointer into hardware.
* However the Xserver still writes to it through the agp aperture.
*/
static
struct
agp_memory
*
alloc_agpphysmem_i8xx
(
size_t
pg_count
,
int
type
)
{
struct
agp_memory
*
new
;
void
*
addr
;
if
(
pg_count
!=
1
)
return
NULL
;
addr
=
agp_bridge
->
driver
->
agp_alloc_page
();
if
(
addr
==
NULL
)
return
NULL
;
new
=
agp_create_memory
(
1
);
if
(
new
==
NULL
)
return
NULL
;
new
->
memory
[
0
]
=
virt_to_phys
(
addr
);
new
->
page_count
=
1
;
new
->
num_scratch_pages
=
1
;
new
->
type
=
AGP_PHYS_MEMORY
;
new
->
physical
=
new
->
memory
[
0
];
return
new
;
}
static
void
intel_i810_free_by_type
(
struct
agp_memory
*
curr
)
{
agp_free_key
(
curr
->
key
);
if
(
curr
->
type
==
AGP_PHYS_MEMORY
)
{
agp_bridge
->
driver
->
agp_destroy_page
(
phys_to_virt
(
curr
->
memory
[
0
]));
vfree
(
curr
->
memory
);
}
kfree
(
curr
);
}
static
unsigned
long
intel_i810_mask_memory
(
unsigned
long
addr
,
int
type
)
{
/* Type checking must be done elsewhere */
return
addr
|
agp_bridge
->
driver
->
masks
[
type
].
mask
;
}
static
struct
aper_size_info_fixed
intel_i830_sizes
[]
=
{
{
128
,
32768
,
5
},
/* The 64M mode still requires a 128k gatt */
{
64
,
16384
,
5
}
};
static
struct
_intel_i830_private
{
struct
pci_dev
*
i830_dev
;
/* device one */
volatile
u8
__iomem
*
registers
;
int
gtt_entries
;
}
intel_i830_private
;
static
void
intel_i830_init_gtt_entries
(
void
)
{
u16
gmch_ctrl
;
int
gtt_entries
;
u8
rdct
;
int
local
=
0
;
static
const
int
ddt
[
4
]
=
{
0
,
16
,
32
,
64
};
pci_read_config_word
(
agp_bridge
->
dev
,
I830_GMCH_CTRL
,
&
gmch_ctrl
);
if
(
agp_bridge
->
dev
->
device
==
PCI_DEVICE_ID_INTEL_82830_HB
||
agp_bridge
->
dev
->
device
==
PCI_DEVICE_ID_INTEL_82845G_HB
)
{
switch
(
gmch_ctrl
&
I830_GMCH_GMS_MASK
)
{
case
I830_GMCH_GMS_STOLEN_512
:
gtt_entries
=
KB
(
512
)
-
KB
(
132
);
break
;
case
I830_GMCH_GMS_STOLEN_1024
:
gtt_entries
=
MB
(
1
)
-
KB
(
132
);
break
;
case
I830_GMCH_GMS_STOLEN_8192
:
gtt_entries
=
MB
(
8
)
-
KB
(
132
);
break
;
case
I830_GMCH_GMS_LOCAL
:
rdct
=
readb
(
intel_i830_private
.
registers
+
I830_RDRAM_CHANNEL_TYPE
);
gtt_entries
=
(
I830_RDRAM_ND
(
rdct
)
+
1
)
*
MB
(
ddt
[
I830_RDRAM_DDT
(
rdct
)]);
local
=
1
;
break
;
default:
gtt_entries
=
0
;
break
;
}
}
else
{
switch
(
gmch_ctrl
&
I830_GMCH_GMS_MASK
)
{
case
I855_GMCH_GMS_STOLEN_1M
:
gtt_entries
=
MB
(
1
)
-
KB
(
132
);
break
;
case
I855_GMCH_GMS_STOLEN_4M
:
gtt_entries
=
MB
(
4
)
-
KB
(
132
);
break
;
case
I855_GMCH_GMS_STOLEN_8M
:
gtt_entries
=
MB
(
8
)
-
KB
(
132
);
break
;
case
I855_GMCH_GMS_STOLEN_16M
:
gtt_entries
=
MB
(
16
)
-
KB
(
132
);
break
;
case
I855_GMCH_GMS_STOLEN_32M
:
gtt_entries
=
MB
(
32
)
-
KB
(
132
);
break
;
default:
gtt_entries
=
0
;
break
;
}
}
if
(
gtt_entries
>
0
)
printk
(
KERN_INFO
PFX
"Detected %dK %s memory.
\n
"
,
gtt_entries
/
KB
(
1
),
local
?
"local"
:
"stolen"
);
else
printk
(
KERN_INFO
PFX
"No pre-allocated video memory detected.
\n
"
);
gtt_entries
/=
KB
(
4
);
intel_i830_private
.
gtt_entries
=
gtt_entries
;
}
/* The intel i830 automatically initializes the agp aperture during POST.
* Use the memory already set aside for in the GTT.
*/
static
int
intel_i830_create_gatt_table
(
void
)
{
int
page_order
;
struct
aper_size_info_fixed
*
size
;
int
num_entries
;
u32
temp
;
size
=
agp_bridge
->
current_size
;
page_order
=
size
->
page_order
;
num_entries
=
size
->
num_entries
;
agp_bridge
->
gatt_table_real
=
NULL
;
pci_read_config_dword
(
intel_i830_private
.
i830_dev
,
I810_MMADDR
,
&
temp
);
temp
&=
0xfff80000
;
intel_i830_private
.
registers
=
(
volatile
u8
__iomem
*
)
ioremap
(
temp
,
128
*
4096
);
if
(
!
intel_i830_private
.
registers
)
return
-
ENOMEM
;
temp
=
readl
(
intel_i830_private
.
registers
+
I810_PGETBL_CTL
)
&
0xfffff000
;
global_cache_flush
();
/* FIXME: ?? */
/* we have to call this as early as possible after the MMIO base address is known */
intel_i830_init_gtt_entries
();
agp_bridge
->
gatt_table
=
NULL
;
agp_bridge
->
gatt_bus_addr
=
temp
;
return
0
;
}
/* Return the gatt table to a sane state. Use the top of stolen
* memory for the GTT.
*/
static
int
intel_i830_free_gatt_table
(
void
)
{
return
0
;
}
static
int
intel_i830_fetch_size
(
void
)
{
u16
gmch_ctrl
;
struct
aper_size_info_fixed
*
values
;
values
=
A_SIZE_FIX
(
agp_bridge
->
driver
->
aperture_sizes
);
if
(
agp_bridge
->
dev
->
device
!=
PCI_DEVICE_ID_INTEL_82830_HB
&&
agp_bridge
->
dev
->
device
!=
PCI_DEVICE_ID_INTEL_82845G_HB
)
{
/* 855GM/852GM/865G has 128MB aperture size */
agp_bridge
->
previous_size
=
agp_bridge
->
current_size
=
(
void
*
)
values
;
agp_bridge
->
aperture_size_idx
=
0
;
return
values
[
0
].
size
;
}
pci_read_config_word
(
agp_bridge
->
dev
,
I830_GMCH_CTRL
,
&
gmch_ctrl
);
if
((
gmch_ctrl
&
I830_GMCH_MEM_MASK
)
==
I830_GMCH_MEM_128M
)
{
agp_bridge
->
previous_size
=
agp_bridge
->
current_size
=
(
void
*
)
values
;
agp_bridge
->
aperture_size_idx
=
0
;
return
values
[
0
].
size
;
}
else
{
agp_bridge
->
previous_size
=
agp_bridge
->
current_size
=
(
void
*
)
values
;
agp_bridge
->
aperture_size_idx
=
1
;
return
values
[
1
].
size
;
}
return
0
;
}
static
int
intel_i830_configure
(
void
)
{
struct
aper_size_info_fixed
*
current_size
;
u32
temp
;
u16
gmch_ctrl
;
int
i
;
current_size
=
A_SIZE_FIX
(
agp_bridge
->
current_size
);
pci_read_config_dword
(
intel_i830_private
.
i830_dev
,
I810_GMADDR
,
&
temp
);
agp_bridge
->
gart_bus_addr
=
(
temp
&
PCI_BASE_ADDRESS_MEM_MASK
);
pci_read_config_word
(
agp_bridge
->
dev
,
I830_GMCH_CTRL
,
&
gmch_ctrl
);
gmch_ctrl
|=
I830_GMCH_ENABLED
;
pci_write_config_word
(
agp_bridge
->
dev
,
I830_GMCH_CTRL
,
gmch_ctrl
);
writel
(
agp_bridge
->
gatt_bus_addr
|
I810_PGETBL_ENABLED
,
intel_i830_private
.
registers
+
I810_PGETBL_CTL
);
readl
(
intel_i830_private
.
registers
+
I810_PGETBL_CTL
);
/* PCI Posting. */
if
(
agp_bridge
->
driver
->
needs_scratch_page
)
{
for
(
i
=
intel_i830_private
.
gtt_entries
;
i
<
current_size
->
num_entries
;
i
++
)
{
writel
(
agp_bridge
->
scratch_page
,
intel_i830_private
.
registers
+
I810_PTE_BASE
+
(
i
*
4
));
readl
(
intel_i830_private
.
registers
+
I810_PTE_BASE
+
(
i
*
4
));
/* PCI Posting. */
}
}
global_cache_flush
();
return
0
;
}
static
void
intel_i830_cleanup
(
void
)
{
iounmap
((
void
__iomem
*
)
intel_i830_private
.
registers
);
}
static
int
intel_i830_insert_entries
(
struct
agp_memory
*
mem
,
off_t
pg_start
,
int
type
)
{
int
i
,
j
,
num_entries
;
void
*
temp
;
temp
=
agp_bridge
->
current_size
;
num_entries
=
A_SIZE_FIX
(
temp
)
->
num_entries
;
if
(
pg_start
<
intel_i830_private
.
gtt_entries
)
{
printk
(
KERN_DEBUG
PFX
"pg_start == 0x%.8lx,intel_i830_private.gtt_entries == 0x%.8x
\n
"
,
pg_start
,
intel_i830_private
.
gtt_entries
);
printk
(
KERN_INFO
PFX
"Trying to insert into local/stolen memory
\n
"
);
return
-
EINVAL
;
}
if
((
pg_start
+
mem
->
page_count
)
>
num_entries
)
return
-
EINVAL
;
/* The i830 can't check the GTT for entries since its read only,
* depend on the caller to make the correct offset decisions.
*/
if
((
type
!=
0
&&
type
!=
AGP_PHYS_MEMORY
)
||
(
mem
->
type
!=
0
&&
mem
->
type
!=
AGP_PHYS_MEMORY
))
return
-
EINVAL
;
global_cache_flush
();
/* FIXME: ?? */
for
(
i
=
0
,
j
=
pg_start
;
i
<
mem
->
page_count
;
i
++
,
j
++
)
{
writel
(
agp_bridge
->
driver
->
mask_memory
(
mem
->
memory
[
i
],
mem
->
type
),
intel_i830_private
.
registers
+
I810_PTE_BASE
+
(
j
*
4
));
readl
(
intel_i830_private
.
registers
+
I810_PTE_BASE
+
(
j
*
4
));
/* PCI Posting. */
}
global_cache_flush
();
agp_bridge
->
driver
->
tlb_flush
(
mem
);
return
0
;
}
static
int
intel_i830_remove_entries
(
struct
agp_memory
*
mem
,
off_t
pg_start
,
int
type
)
{
int
i
;
global_cache_flush
();
if
(
pg_start
<
intel_i830_private
.
gtt_entries
)
{
printk
(
KERN_INFO
PFX
"Trying to disable local/stolen memory
\n
"
);
return
-
EINVAL
;
}
for
(
i
=
pg_start
;
i
<
(
mem
->
page_count
+
pg_start
);
i
++
)
{
writel
(
agp_bridge
->
scratch_page
,
intel_i830_private
.
registers
+
I810_PTE_BASE
+
(
i
*
4
));
readl
(
intel_i830_private
.
registers
+
I810_PTE_BASE
+
(
i
*
4
));
/* PCI Posting. */
}
global_cache_flush
();
agp_bridge
->
driver
->
tlb_flush
(
mem
);
return
0
;
}
static
struct
agp_memory
*
intel_i830_alloc_by_type
(
size_t
pg_count
,
int
type
)
{
if
(
type
==
AGP_PHYS_MEMORY
)
return
alloc_agpphysmem_i8xx
(
pg_count
,
type
);
/* always return NULL for other allocation types for now */
return
NULL
;
}
static
int
intel_8xx_fetch_size
(
void
)
{
u8
temp
;
int
i
;
struct
aper_size_info_8
*
values
;
pci_read_config_byte
(
agp_bridge
->
dev
,
INTEL_APSIZE
,
&
temp
);
values
=
A_SIZE_8
(
agp_bridge
->
driver
->
aperture_sizes
);
for
(
i
=
0
;
i
<
agp_bridge
->
driver
->
num_aperture_sizes
;
i
++
)
{
if
(
temp
==
values
[
i
].
size_value
)
{
agp_bridge
->
previous_size
=
agp_bridge
->
current_size
=
(
void
*
)
(
values
+
i
);
agp_bridge
->
aperture_size_idx
=
i
;
return
values
[
i
].
size
;
}
}
return
0
;
}
static
void
intel_8xx_tlbflush
(
struct
agp_memory
*
mem
)
{
u32
temp
;
pci_read_config_dword
(
agp_bridge
->
dev
,
INTEL_AGPCTRL
,
&
temp
);
pci_write_config_dword
(
agp_bridge
->
dev
,
INTEL_AGPCTRL
,
temp
&
~
(
1
<<
7
));
pci_read_config_dword
(
agp_bridge
->
dev
,
INTEL_AGPCTRL
,
&
temp
);
pci_write_config_dword
(
agp_bridge
->
dev
,
INTEL_AGPCTRL
,
temp
|
(
1
<<
7
));
}
static
void
intel_8xx_cleanup
(
void
)
{
u16
temp
;
struct
aper_size_info_8
*
previous_size
;
previous_size
=
A_SIZE_8
(
agp_bridge
->
previous_size
);
pci_read_config_word
(
agp_bridge
->
dev
,
INTEL_NBXCFG
,
&
temp
);
pci_write_config_word
(
agp_bridge
->
dev
,
INTEL_NBXCFG
,
temp
&
~
(
1
<<
9
));
pci_write_config_byte
(
agp_bridge
->
dev
,
INTEL_APSIZE
,
previous_size
->
size_value
);
}
static
int
intel_845_configure
(
void
)
{
u32
temp
;
u8
temp2
;
struct
aper_size_info_8
*
current_size
;
current_size
=
A_SIZE_8
(
agp_bridge
->
current_size
);
/* aperture size */
pci_write_config_byte
(
agp_bridge
->
dev
,
INTEL_APSIZE
,
current_size
->
size_value
);
/* address to map to */
pci_read_config_dword
(
agp_bridge
->
dev
,
AGP_APBASE
,
&
temp
);
agp_bridge
->
gart_bus_addr
=
(
temp
&
PCI_BASE_ADDRESS_MEM_MASK
);
/* attbase - aperture base */
pci_write_config_dword
(
agp_bridge
->
dev
,
INTEL_ATTBASE
,
agp_bridge
->
gatt_bus_addr
);
/* agpctrl */
pci_write_config_dword
(
agp_bridge
->
dev
,
INTEL_AGPCTRL
,
0x0000
);
/* agpm */
pci_read_config_byte
(
agp_bridge
->
dev
,
INTEL_I845_AGPM
,
&
temp2
);
pci_write_config_byte
(
agp_bridge
->
dev
,
INTEL_I845_AGPM
,
temp2
|
(
1
<<
1
));
/* clear any possible error conditions */
pci_write_config_word
(
agp_bridge
->
dev
,
INTEL_I845_ERRSTS
,
0x001c
);
return
0
;
}
/* Setup function */
static
struct
gatt_mask
intel_generic_masks
[]
=
{
{.
mask
=
0x00000017
,
.
type
=
0
}
};
static
struct
aper_size_info_8
intel_8xx_sizes
[
7
]
=
{
{
256
,
65536
,
6
,
0
},
{
128
,
32768
,
5
,
32
},
{
64
,
16384
,
4
,
48
},
{
32
,
8192
,
3
,
56
},
{
16
,
4096
,
2
,
60
},
{
8
,
2048
,
1
,
62
},
{
4
,
1024
,
0
,
63
}
};
static
struct
agp_bridge_driver
intel_830_driver
=
{
.
owner
=
THIS_MODULE
,
.
aperture_sizes
=
intel_i830_sizes
,
.
size_type
=
FIXED_APER_SIZE
,
.
num_aperture_sizes
=
2
,
.
needs_scratch_page
=
TRUE
,
.
configure
=
intel_i830_configure
,
.
fetch_size
=
intel_i830_fetch_size
,
.
cleanup
=
intel_i830_cleanup
,
.
tlb_flush
=
intel_i810_tlbflush
,
.
mask_memory
=
intel_i810_mask_memory
,
.
masks
=
intel_i810_masks
,
.
agp_enable
=
intel_i810_agp_enable
,
.
cache_flush
=
global_cache_flush
,
.
create_gatt_table
=
intel_i830_create_gatt_table
,
.
free_gatt_table
=
intel_i830_free_gatt_table
,
.
insert_memory
=
intel_i830_insert_entries
,
.
remove_memory
=
intel_i830_remove_entries
,
.
alloc_by_type
=
intel_i830_alloc_by_type
,
.
free_by_type
=
intel_i810_free_by_type
,
.
agp_alloc_page
=
agp_generic_alloc_page
,
.
agp_destroy_page
=
agp_generic_destroy_page
,
};
static
struct
agp_bridge_driver
intel_845_driver
=
{
.
owner
=
THIS_MODULE
,
.
aperture_sizes
=
intel_8xx_sizes
,
.
size_type
=
U8_APER_SIZE
,
.
num_aperture_sizes
=
7
,
.
configure
=
intel_845_configure
,
.
fetch_size
=
intel_8xx_fetch_size
,
.
cleanup
=
intel_8xx_cleanup
,
.
tlb_flush
=
intel_8xx_tlbflush
,
.
mask_memory
=
agp_generic_mask_memory
,
.
masks
=
intel_generic_masks
,
.
agp_enable
=
agp_generic_enable
,
.
cache_flush
=
global_cache_flush
,
.
create_gatt_table
=
agp_generic_create_gatt_table
,
.
free_gatt_table
=
agp_generic_free_gatt_table
,
.
insert_memory
=
agp_generic_insert_memory
,
.
remove_memory
=
agp_generic_remove_memory
,
.
alloc_by_type
=
agp_generic_alloc_by_type
,
.
free_by_type
=
agp_generic_free_by_type
,
.
agp_alloc_page
=
agp_generic_alloc_page
,
.
agp_destroy_page
=
agp_generic_destroy_page
,
};
static
int
find_i830
(
u16
device
)
{
struct
pci_dev
*
i830_dev
;
i830_dev
=
pci_get_device
(
PCI_VENDOR_ID_INTEL
,
device
,
NULL
);
if
(
i830_dev
&&
PCI_FUNC
(
i830_dev
->
devfn
)
!=
0
)
{
i830_dev
=
pci_get_device
(
PCI_VENDOR_ID_INTEL
,
device
,
i830_dev
);
}
if
(
!
i830_dev
)
return
0
;
intel_i830_private
.
i830_dev
=
i830_dev
;
return
1
;
}
static
int
__devinit
agp_intelmch_probe
(
struct
pci_dev
*
pdev
,
const
struct
pci_device_id
*
ent
)
{
struct
agp_bridge_data
*
bridge
;
struct
resource
*
r
;
char
*
name
=
"(unknown)"
;
u8
cap_ptr
=
0
;
cap_ptr
=
pci_find_capability
(
pdev
,
PCI_CAP_ID_AGP
);
if
(
!
cap_ptr
)
return
-
ENODEV
;
bridge
=
agp_alloc_bridge
();
if
(
!
bridge
)
return
-
ENOMEM
;
switch
(
pdev
->
device
)
{
case
PCI_DEVICE_ID_INTEL_82865_HB
:
if
(
find_i830
(
PCI_DEVICE_ID_INTEL_82865_IG
))
{
bridge
->
driver
=
&
intel_830_driver
;
}
else
{
bridge
->
driver
=
&
intel_845_driver
;
}
name
=
"865"
;
break
;
case
PCI_DEVICE_ID_INTEL_82875_HB
:
bridge
->
driver
=
&
intel_845_driver
;
name
=
"i875"
;
break
;
default:
printk
(
KERN_ERR
PFX
"Unsupported Intel chipset (device id: %04x)
\n
"
,
pdev
->
device
);
return
-
ENODEV
;
};
bridge
->
dev
=
pdev
;
bridge
->
capndx
=
cap_ptr
;
if
(
bridge
->
driver
==
&
intel_830_driver
)
bridge
->
dev_private_data
=
&
intel_i830_private
;
printk
(
KERN_INFO
PFX
"Detected an Intel %s Chipset.
\n
"
,
name
);
/*
* The following fixes the case where the BIOS has "forgotten" to
* provide an address range for the GART.
* 20030610 - hamish@zot.org
*/
r
=
&
pdev
->
resource
[
0
];
if
(
!
r
->
start
&&
r
->
end
)
{
if
(
pci_assign_resource
(
pdev
,
0
))
{
printk
(
KERN_ERR
PFX
"could not assign resource 0
\n
"
);
return
-
ENODEV
;
}
}
/*
* If the device has not been properly setup, the following will catch
* the problem and should stop the system from crashing.
* 20030610 - hamish@zot.org
*/
if
(
pci_enable_device
(
pdev
))
{
printk
(
KERN_ERR
PFX
"Unable to Enable PCI device
\n
"
);
return
-
ENODEV
;
}
/* Fill in the mode register */
if
(
cap_ptr
)
{
pci_read_config_dword
(
pdev
,
bridge
->
capndx
+
PCI_AGP_STATUS
,
&
bridge
->
mode
);
}
pci_set_drvdata
(
pdev
,
bridge
);
return
agp_add_bridge
(
bridge
);
}
static
void
__devexit
agp_intelmch_remove
(
struct
pci_dev
*
pdev
)
{
struct
agp_bridge_data
*
bridge
=
pci_get_drvdata
(
pdev
);
agp_remove_bridge
(
bridge
);
if
(
intel_i830_private
.
i830_dev
)
pci_dev_put
(
intel_i830_private
.
i830_dev
);
agp_put_bridge
(
bridge
);
}
static
int
agp_intelmch_resume
(
struct
pci_dev
*
pdev
)
{
struct
agp_bridge_data
*
bridge
=
pci_get_drvdata
(
pdev
);
pci_restore_state
(
pdev
);
if
(
bridge
->
driver
==
&
intel_845_driver
)
intel_845_configure
();
return
0
;
}
static
struct
pci_device_id
agp_intelmch_pci_table
[]
=
{
{
.
class
=
(
PCI_CLASS_BRIDGE_HOST
<<
8
),
.
class_mask
=
~
0
,
.
vendor
=
PCI_VENDOR_ID_INTEL
,
.
device
=
PCI_DEVICE_ID_INTEL_82865_HB
,
.
subvendor
=
PCI_ANY_ID
,
.
subdevice
=
PCI_ANY_ID
,
},
{
.
class
=
(
PCI_CLASS_BRIDGE_HOST
<<
8
),
.
class_mask
=
~
0
,
.
vendor
=
PCI_VENDOR_ID_INTEL
,
.
device
=
PCI_DEVICE_ID_INTEL_82875_HB
,
.
subvendor
=
PCI_ANY_ID
,
.
subdevice
=
PCI_ANY_ID
,
},
{
}
};
MODULE_DEVICE_TABLE
(
pci
,
agp_intelmch_pci_table
);
static
struct
pci_driver
agp_intelmch_pci_driver
=
{
.
name
=
"agpgart-intel-mch"
,
.
id_table
=
agp_intelmch_pci_table
,
.
probe
=
agp_intelmch_probe
,
.
remove
=
agp_intelmch_remove
,
.
resume
=
agp_intelmch_resume
,
};
/* intel_agp_init() must not be declared static for explicit
early initialization to work (ie i810fb) */
int
__init
agp_intelmch_init
(
void
)
{
static
int
agp_initialised
=
0
;
if
(
agp_initialised
==
1
)
return
0
;
agp_initialised
=
1
;
return
pci_module_init
(
&
agp_intelmch_pci_driver
);
}
static
void
__exit
agp_intelmch_cleanup
(
void
)
{
pci_unregister_driver
(
&
agp_intelmch_pci_driver
);
}
module_init
(
agp_intelmch_init
);
module_exit
(
agp_intelmch_cleanup
);
MODULE_AUTHOR
(
"Dave Jones <davej@codemonkey.org.uk>"
);
MODULE_LICENSE
(
"GPL"
);
drivers/char/agp/nvidia-agp.c
View file @
3d3bad5b
...
...
@@ -407,7 +407,7 @@ static int __init agp_nvidia_init(void)
{
if
(
agp_off
)
return
-
EINVAL
;
return
pci_
module_init
(
&
agp_nvidia_pci_driver
);
return
pci_
register_driver
(
&
agp_nvidia_pci_driver
);
}
static
void
__exit
agp_nvidia_cleanup
(
void
)
...
...
drivers/char/agp/sis-agp.c
View file @
3d3bad5b
...
...
@@ -342,7 +342,7 @@ static int __init agp_sis_init(void)
{
if
(
agp_off
)
return
-
EINVAL
;
return
pci_
module_init
(
&
agp_sis_pci_driver
);
return
pci_
register_driver
(
&
agp_sis_pci_driver
);
}
static
void
__exit
agp_sis_cleanup
(
void
)
...
...
drivers/char/agp/sworks-agp.c
View file @
3d3bad5b
...
...
@@ -541,7 +541,7 @@ static int __init agp_serverworks_init(void)
{
if
(
agp_off
)
return
-
EINVAL
;
return
pci_
module_init
(
&
agp_serverworks_pci_driver
);
return
pci_
register_driver
(
&
agp_serverworks_pci_driver
);
}
static
void
__exit
agp_serverworks_cleanup
(
void
)
...
...
drivers/char/agp/uninorth-agp.c
View file @
3d3bad5b
...
...
@@ -375,7 +375,7 @@ static int __init agp_uninorth_init(void)
{
if
(
agp_off
)
return
-
EINVAL
;
return
pci_
module_init
(
&
agp_uninorth_pci_driver
);
return
pci_
register_driver
(
&
agp_uninorth_pci_driver
);
}
static
void
__exit
agp_uninorth_cleanup
(
void
)
...
...
drivers/char/agp/via-agp.c
View file @
3d3bad5b
/*
* VIA AGPGART routines.
* VIA AGPGART routines.
*/
#include <linux/types.h>
...
...
@@ -36,6 +36,7 @@ static int via_fetch_size(void)
return
values
[
i
].
size
;
}
}
printk
(
KERN_ERR
PFX
"Unknown aperture size from AGP bridge (0x%x)
\n
"
,
temp
);
return
0
;
}
...
...
@@ -78,12 +79,19 @@ static void via_cleanup(void)
static
void
via_tlbflush
(
struct
agp_memory
*
mem
)
{
pci_write_config_dword
(
agp_bridge
->
dev
,
VIA_GARTCTRL
,
0x0000008f
);
pci_write_config_dword
(
agp_bridge
->
dev
,
VIA_GARTCTRL
,
0x0000000f
);
u32
temp
;
pci_read_config_dword
(
agp_bridge
->
dev
,
VIA_GARTCTRL
,
&
temp
);
temp
|=
(
1
<<
7
);
temp
&=
~
0x7f
;
pci_write_config_dword
(
agp_bridge
->
dev
,
VIA_GARTCTRL
,
temp
);
temp
&=
~
(
1
<<
7
);
temp
&=
~
0x7f
;
pci_write_config_dword
(
agp_bridge
->
dev
,
VIA_GARTCTRL
,
temp
);
}
static
struct
aper_size_info_8
via_generic_sizes
[
7
]
=
static
struct
aper_size_info_8
via_generic_sizes
[
9
]
=
{
{
256
,
65536
,
6
,
0
},
{
128
,
32768
,
5
,
128
},
...
...
@@ -91,7 +99,9 @@ static struct aper_size_info_8 via_generic_sizes[7] =
{
32
,
8192
,
3
,
224
},
{
16
,
4096
,
2
,
240
},
{
8
,
2048
,
1
,
248
},
{
4
,
1024
,
0
,
252
}
{
4
,
1024
,
0
,
252
},
{
2
,
512
,
0
,
254
},
{
1
,
256
,
0
,
255
}
};
...
...
@@ -121,7 +131,7 @@ static int via_configure_agp3(void)
{
u32
temp
;
struct
aper_size_info_16
*
current_size
;
current_size
=
A_SIZE_16
(
agp_bridge
->
current_size
);
/* address to map too */
...
...
@@ -132,13 +142,13 @@ static int via_configure_agp3(void)
pci_write_config_dword
(
agp_bridge
->
dev
,
VIA_AGP3_ATTBASE
,
agp_bridge
->
gatt_bus_addr
&
0xfffff000
);
/* 1. Enable GTLB in RX90<7>, all AGP aperture access needs to fetch
/* 1. Enable GTLB in RX90<7>, all AGP aperture access needs to fetch
* translation table first.
* 2. Enable AGP aperture in RX91<0>. This bit controls the enabling of the
* graphics AGP aperture for the AGP3.0 port.
*/
pci_read_config_dword
(
agp_bridge
->
dev
,
VIA_AGP3_GARTCTRL
,
&
temp
);
pci_write_config_dword
(
agp_bridge
->
dev
,
VIA_AGP3_GARTCTRL
,
temp
|
(
3
<<
7
));
pci_write_config_dword
(
agp_bridge
->
dev
,
VIA_AGP3_GARTCTRL
,
temp
|
(
3
<<
7
));
return
0
;
}
...
...
@@ -189,7 +199,7 @@ struct agp_bridge_driver via_driver = {
.
owner
=
THIS_MODULE
,
.
aperture_sizes
=
via_generic_sizes
,
.
size_type
=
U8_APER_SIZE
,
.
num_aperture_sizes
=
7
,
.
num_aperture_sizes
=
9
,
.
configure
=
via_configure
,
.
fetch_size
=
via_fetch_size
,
.
cleanup
=
via_cleanup
,
...
...
@@ -525,7 +535,7 @@ static int __init agp_via_init(void)
{
if
(
agp_off
)
return
-
EINVAL
;
return
pci_
module_init
(
&
agp_via_pci_driver
);
return
pci_
register_driver
(
&
agp_via_pci_driver
);
}
static
void
__exit
agp_via_cleanup
(
void
)
...
...
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