Commit 3da09a51 authored by Michal Simek's avatar Michal Simek Committed by David S. Miller

phy: Add Marvell 88E1116R phy ID

This phy is on Xilinx ZC702 zynq development board.
Signed-off-by: default avatarAnirudha Sarangi <anirudh@xilinx.com>
Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent f5e1cabf
...@@ -116,6 +116,8 @@ ...@@ -116,6 +116,8 @@
#define MII_M1011_PHY_STATUS_RESOLVED 0x0800 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800
#define MII_M1011_PHY_STATUS_LINK 0x0400 #define MII_M1011_PHY_STATUS_LINK 0x0400
#define MII_M1116R_CONTROL_REG_MAC 21
MODULE_DESCRIPTION("Marvell PHY driver"); MODULE_DESCRIPTION("Marvell PHY driver");
MODULE_AUTHOR("Andy Fleming"); MODULE_AUTHOR("Andy Fleming");
...@@ -372,6 +374,55 @@ static int m88e1318_config_aneg(struct phy_device *phydev) ...@@ -372,6 +374,55 @@ static int m88e1318_config_aneg(struct phy_device *phydev)
return m88e1121_config_aneg(phydev); return m88e1121_config_aneg(phydev);
} }
static int m88e1116r_config_init(struct phy_device *phydev)
{
int temp;
int err;
temp = phy_read(phydev, MII_BMCR);
temp |= BMCR_RESET;
err = phy_write(phydev, MII_BMCR, temp);
if (err < 0)
return err;
mdelay(500);
err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 0);
if (err < 0)
return err;
temp = phy_read(phydev, MII_M1011_PHY_SCR);
temp |= (7 << 12); /* max number of gigabit attempts */
temp |= (1 << 11); /* enable downshift */
temp |= MII_M1011_PHY_SCR_AUTO_CROSS;
err = phy_write(phydev, MII_M1011_PHY_SCR, temp);
if (err < 0)
return err;
err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 2);
if (err < 0)
return err;
temp = phy_read(phydev, MII_M1116R_CONTROL_REG_MAC);
temp |= (1 << 5);
temp |= (1 << 4);
err = phy_write(phydev, MII_M1116R_CONTROL_REG_MAC, temp);
if (err < 0)
return err;
err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 0);
if (err < 0)
return err;
temp = phy_read(phydev, MII_BMCR);
temp |= BMCR_RESET;
err = phy_write(phydev, MII_BMCR, temp);
if (err < 0)
return err;
mdelay(500);
return 0;
}
static int m88e1111_config_init(struct phy_device *phydev) static int m88e1111_config_init(struct phy_device *phydev)
{ {
int err; int err;
...@@ -940,6 +991,19 @@ static struct phy_driver marvell_drivers[] = { ...@@ -940,6 +991,19 @@ static struct phy_driver marvell_drivers[] = {
.config_intr = &marvell_config_intr, .config_intr = &marvell_config_intr,
.driver = { .owner = THIS_MODULE }, .driver = { .owner = THIS_MODULE },
}, },
{
.phy_id = MARVELL_PHY_ID_88E1116R,
.phy_id_mask = MARVELL_PHY_ID_MASK,
.name = "Marvell 88E1116R",
.features = PHY_GBIT_FEATURES,
.flags = PHY_HAS_INTERRUPT,
.config_init = &m88e1116r_config_init,
.config_aneg = &genphy_config_aneg,
.read_status = &genphy_read_status,
.ack_interrupt = &marvell_ack_interrupt,
.config_intr = &marvell_config_intr,
.driver = { .owner = THIS_MODULE },
},
}; };
static int __init marvell_init(void) static int __init marvell_init(void)
...@@ -967,6 +1031,7 @@ static struct mdio_device_id __maybe_unused marvell_tbl[] = { ...@@ -967,6 +1031,7 @@ static struct mdio_device_id __maybe_unused marvell_tbl[] = {
{ MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK }, { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
{ MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK }, { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
{ MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK }, { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
{ MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
{ } { }
}; };
......
...@@ -14,6 +14,7 @@ ...@@ -14,6 +14,7 @@
#define MARVELL_PHY_ID_88E1149R 0x01410e50 #define MARVELL_PHY_ID_88E1149R 0x01410e50
#define MARVELL_PHY_ID_88E1240 0x01410e30 #define MARVELL_PHY_ID_88E1240 0x01410e30
#define MARVELL_PHY_ID_88E1318S 0x01410e90 #define MARVELL_PHY_ID_88E1318S 0x01410e90
#define MARVELL_PHY_ID_88E1116R 0x01410e40
/* struct phy_device dev_flags definitions */ /* struct phy_device dev_flags definitions */
#define MARVELL_PHY_M1145_FLAGS_RESISTANCE 0x00000001 #define MARVELL_PHY_M1145_FLAGS_RESISTANCE 0x00000001
......
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