Commit 3df01077 authored by Moshe Shemesh's avatar Moshe Shemesh Committed by Saeed Mahameed

net/mlx5: Add structure and defines for pci sync for fw update event

Add needed structure layouts and defines for pci sync for fw update
event. The downstream patches will include event handlers for this event
type.
Signed-off-by: default avatarMoshe Shemesh <moshe@mellanox.com>
Reviewed-by: default avatarTariq Toukan <tariqt@mellanox.com>
Signed-off-by: default avatarSaeed Mahameed <saeedm@mellanox.com>
parent 06939536
...@@ -364,6 +364,7 @@ enum { ...@@ -364,6 +364,7 @@ enum {
enum { enum {
MLX5_GENERAL_SUBTYPE_DELAY_DROP_TIMEOUT = 0x1, MLX5_GENERAL_SUBTYPE_DELAY_DROP_TIMEOUT = 0x1,
MLX5_GENERAL_SUBTYPE_PCI_POWER_CHANGE_EVENT = 0x5, MLX5_GENERAL_SUBTYPE_PCI_POWER_CHANGE_EVENT = 0x5,
MLX5_GENERAL_SUBTYPE_PCI_SYNC_FOR_FW_UPDATE_EVENT = 0x8,
}; };
enum { enum {
...@@ -689,6 +690,19 @@ struct mlx5_eqe_temp_warning { ...@@ -689,6 +690,19 @@ struct mlx5_eqe_temp_warning {
__be64 sensor_warning_lsb; __be64 sensor_warning_lsb;
} __packed; } __packed;
#define SYNC_RST_STATE_MASK 0xf
enum sync_rst_state_type {
MLX5_SYNC_RST_STATE_RESET_REQUEST = 0x0,
MLX5_SYNC_RST_STATE_RESET_NOW = 0x1,
MLX5_SYNC_RST_STATE_RESET_ABORT = 0x2,
};
struct mlx5_eqe_sync_fw_update {
u8 reserved_at_0[3];
u8 sync_rst_state;
};
union ev_data { union ev_data {
__be32 raw[7]; __be32 raw[7];
struct mlx5_eqe_cmd cmd; struct mlx5_eqe_cmd cmd;
...@@ -707,6 +721,7 @@ union ev_data { ...@@ -707,6 +721,7 @@ union ev_data {
struct mlx5_eqe_dct dct; struct mlx5_eqe_dct dct;
struct mlx5_eqe_temp_warning temp_warning; struct mlx5_eqe_temp_warning temp_warning;
struct mlx5_eqe_xrq_err xrq_err; struct mlx5_eqe_xrq_err xrq_err;
struct mlx5_eqe_sync_fw_update sync_fw_update;
} __packed; } __packed;
struct mlx5_eqe { struct mlx5_eqe {
......
...@@ -1317,7 +1317,9 @@ struct mlx5_ifc_cmd_hca_cap_bits { ...@@ -1317,7 +1317,9 @@ struct mlx5_ifc_cmd_hca_cap_bits {
u8 wol_p[0x1]; u8 wol_p[0x1];
u8 stat_rate_support[0x10]; u8 stat_rate_support[0x10];
u8 reserved_at_1f0[0xc]; u8 reserved_at_1f0[0x1];
u8 pci_sync_for_fw_update_event[0x1];
u8 reserved_at_1f2[0xa];
u8 cqe_version[0x4]; u8 cqe_version[0x4];
u8 compact_address_vector[0x1]; u8 compact_address_vector[0x1];
......
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