Commit 3e98fdac authored by Javi Merino's avatar Javi Merino Committed by Catalin Marinas

arm64: kernel: make the pen of the secondary a 64-bit unsigned value

Change the prototype of write_pen_release() accordingly and clarify
that's holding the hardware id of the secondary that's going to boot.
This is in preparation of getting HWIDs parsed from the DT.
Signed-off-by: default avatarJavi Merino <javi.merino@arm.com>
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent de79a64d
...@@ -26,6 +26,8 @@ ...@@ -26,6 +26,8 @@
#define ID_AA64ISAR0_EL1 "id_aa64isar0_el1" #define ID_AA64ISAR0_EL1 "id_aa64isar0_el1"
#define ID_AA64MMFR0_EL1 "id_aa64mmfr0_el1" #define ID_AA64MMFR0_EL1 "id_aa64mmfr0_el1"
#define INVALID_HWID ULONG_MAX
#define read_cpuid(reg) ({ \ #define read_cpuid(reg) ({ \
u64 __val; \ u64 __val; \
asm("mrs %0, " reg : "=r" (__val)); \ asm("mrs %0, " reg : "=r" (__val)); \
......
...@@ -53,7 +53,7 @@ ...@@ -53,7 +53,7 @@
* where to place its SVC stack * where to place its SVC stack
*/ */
struct secondary_data secondary_data; struct secondary_data secondary_data;
volatile unsigned long secondary_holding_pen_release = -1; volatile unsigned long secondary_holding_pen_release = INVALID_HWID;
enum ipi_msg_type { enum ipi_msg_type {
IPI_RESCHEDULE, IPI_RESCHEDULE,
...@@ -70,7 +70,7 @@ static DEFINE_RAW_SPINLOCK(boot_lock); ...@@ -70,7 +70,7 @@ static DEFINE_RAW_SPINLOCK(boot_lock);
* in coherency or not. This is necessary for the hotplug code to work * in coherency or not. This is necessary for the hotplug code to work
* reliably. * reliably.
*/ */
static void __cpuinit write_pen_release(int val) static void __cpuinit write_pen_release(u64 val)
{ {
void *start = (void *)&secondary_holding_pen_release; void *start = (void *)&secondary_holding_pen_release;
unsigned long size = sizeof(secondary_holding_pen_release); unsigned long size = sizeof(secondary_holding_pen_release);
...@@ -105,7 +105,7 @@ static int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) ...@@ -105,7 +105,7 @@ static int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
timeout = jiffies + (1 * HZ); timeout = jiffies + (1 * HZ);
while (time_before(jiffies, timeout)) { while (time_before(jiffies, timeout)) {
if (secondary_holding_pen_release == -1UL) if (secondary_holding_pen_release == INVALID_HWID)
break; break;
udelay(10); udelay(10);
} }
...@@ -116,7 +116,7 @@ static int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) ...@@ -116,7 +116,7 @@ static int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
*/ */
raw_spin_unlock(&boot_lock); raw_spin_unlock(&boot_lock);
return secondary_holding_pen_release != -1 ? -ENOSYS : 0; return secondary_holding_pen_release != INVALID_HWID ? -ENOSYS : 0;
} }
static DECLARE_COMPLETION(cpu_running); static DECLARE_COMPLETION(cpu_running);
...@@ -190,7 +190,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void) ...@@ -190,7 +190,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
* Let the primary processor know we're out of the * Let the primary processor know we're out of the
* pen, then head off into the C entry point * pen, then head off into the C entry point
*/ */
write_pen_release(-1); write_pen_release(INVALID_HWID);
/* /*
* Synchronise with the boot thread. * Synchronise with the boot thread.
......
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