Commit 3f7c7302 authored by Soren Brinkmann's avatar Soren Brinkmann Committed by Olof Johansson

ARM: dts: zynq: Add SDHCI nodes

Add nodes for the Arasan SDHCI controller to Zynq dts files.
Signed-off-by: default avatarSoren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parent 4dd18edc
...@@ -102,6 +102,26 @@ gem1: ethernet@e000c000 { ...@@ -102,6 +102,26 @@ gem1: ethernet@e000c000 {
clock-names = "pclk", "hclk", "tx_clk"; clock-names = "pclk", "hclk", "tx_clk";
}; };
sdhci0: ps7-sdhci@e0100000 {
compatible = "arasan,sdhci-8.9a";
status = "disabled";
clock-names = "clk_xin", "clk_ahb";
clocks = <&clkc 21>, <&clkc 32>;
interrupt-parent = <&intc>;
interrupts = <0 24 4>;
reg = <0xe0100000 0x1000>;
} ;
sdhci1: ps7-sdhci@e0101000 {
compatible = "arasan,sdhci-8.9a";
status = "disabled";
clock-names = "clk_xin", "clk_ahb";
clocks = <&clkc 22>, <&clkc 33>;
interrupt-parent = <&intc>;
interrupts = <0 47 4>;
reg = <0xe0101000 0x1000>;
} ;
slcr: slcr@f8000000 { slcr: slcr@f8000000 {
compatible = "xlnx,zynq-slcr"; compatible = "xlnx,zynq-slcr";
reg = <0xF8000000 0x1000>; reg = <0xF8000000 0x1000>;
......
...@@ -34,6 +34,10 @@ &gem0 { ...@@ -34,6 +34,10 @@ &gem0 {
phy-mode = "rgmii"; phy-mode = "rgmii";
}; };
&sdhci0 {
status = "okay";
};
&uart1 { &uart1 {
status = "okay"; status = "okay";
}; };
...@@ -35,6 +35,10 @@ &gem0 { ...@@ -35,6 +35,10 @@ &gem0 {
phy-mode = "rgmii"; phy-mode = "rgmii";
}; };
&sdhci0 {
status = "okay";
};
&uart1 { &uart1 {
status = "okay"; status = "okay";
}; };
...@@ -35,6 +35,10 @@ &gem0 { ...@@ -35,6 +35,10 @@ &gem0 {
phy-mode = "rgmii"; phy-mode = "rgmii";
}; };
&sdhci0 {
status = "okay";
};
&uart1 { &uart1 {
status = "okay"; status = "okay";
}; };
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