Commit 41e2fce4 authored by Matt's avatar Matt Committed by Jaroslav Kysela

[ALSA] hda: enable unsolicited responses

HDA Intel driver
Patch enables unsolicited responses on the HDA controller. Without
the UREN bit set, the controller will not place unsolicited responses
in a RIRB.
Signed-off-by: default avatarMatt <matt@embeddedalley.com>
Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
parent bbd4615c
...@@ -178,6 +178,9 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 }; ...@@ -178,6 +178,9 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 };
#define ICH6_INT_CTRL_EN 0x40000000 /* controller interrupt enable bit */ #define ICH6_INT_CTRL_EN 0x40000000 /* controller interrupt enable bit */
#define ICH6_INT_GLOBAL_EN 0x80000000 /* global interrupt enable bit */ #define ICH6_INT_GLOBAL_EN 0x80000000 /* global interrupt enable bit */
/* GCTL unsolicited response enable bit */
#define ICH6_GCTL_UREN (1<<8)
/* GCTL reset bit */ /* GCTL reset bit */
#define ICH6_GCTL_RESET (1<<0) #define ICH6_GCTL_RESET (1<<0)
...@@ -562,6 +565,9 @@ static int azx_reset(azx_t *chip) ...@@ -562,6 +565,9 @@ static int azx_reset(azx_t *chip)
return -EBUSY; return -EBUSY;
} }
/* Accept unsolicited responses */
azx_writel(chip, GCTL, azx_readl(chip, GCTL) | ICH6_GCTL_UREN);
/* detect codecs */ /* detect codecs */
if (! chip->codec_mask) { if (! chip->codec_mask) {
chip->codec_mask = azx_readw(chip, STATESTS); chip->codec_mask = azx_readw(chip, STATESTS);
......
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