Commit 465ca5d6 authored by Maciej W. Rozycki's avatar Maciej W. Rozycki Committed by Ralf Baechle

MIPS: __strncpy_from_user_asm CPU_DADDI_WORKAROUNDS bug fix

This corrects assembler warnings and broken code generated in
__strncpy_from_user_asm:

arch/mips/lib/strncpy_user.S: Assembler messages:
arch/mips/lib/strncpy_user.S:52: Warning: Macro instruction expanded into
multiple instructions in a branch delay slot

with the CPU_DADDI_WORKAROUNDS option set.  The function schedules delay
slots manually where there is really no need to as GAS is happy to do it
all itself, so undo it all and remove `.set noreorder'.
Signed-off-by: default avatarMaciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6685/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 2db4bc34
......@@ -35,7 +35,6 @@ LEAF(__strncpy_from_\func\()_asm)
bnez v0, .Lfault\@
FEXPORT(__strncpy_from_\func\()_nocheck_asm)
.set noreorder
move t0, zero
move v1, a1
.ifeqs "\func","kernel"
......@@ -45,21 +44,21 @@ FEXPORT(__strncpy_from_\func\()_nocheck_asm)
.endif
PTR_ADDIU v1, 1
R10KCBARRIER(0(ra))
beqz v0, 2f
sb v0, (a0)
beqz v0, 2f
PTR_ADDIU t0, 1
bne t0, a2, 1b
PTR_ADDIU a0, 1
bne t0, a2, 1b
2: PTR_ADDU v0, a1, t0
xor v0, a1
bltz v0, .Lfault\@
nop
jr ra # return n
move v0, t0
jr ra # return n
END(__strncpy_from_\func\()_asm)
.Lfault\@: jr ra
.Lfault\@:
li v0, -EFAULT
jr ra
.section __ex_table,"a"
PTR 1b, .Lfault\@
......
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