Commit 47654a16 authored by Stephen Boyd's avatar Stephen Boyd Committed by Peter Chen

usb: chipidea: msm: Restore wrapper settings after reset

When the RESET bit is set in the USBCMD register it resets quite
a few of the wrapper's registers to their reset state. This
includes the GENCONFIG and GENCONFIG2 registers. Currently this
is done by the usb phy and ehci-msm drivers writing into the
controller wrapper's MMIO address space. Let's consolidate the
register writes into the wrapper driver instead so that we
clearly split the wrapper from the phys.
Acked-by: default avatarPeter Chen <peter.chen@nxp.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: default avatarStephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: default avatarPeter Chen <peter.chen@nxp.com>
parent 2fc305be
...@@ -14,11 +14,22 @@ ...@@ -14,11 +14,22 @@
#include <linux/mfd/syscon.h> #include <linux/mfd/syscon.h>
#include <linux/regmap.h> #include <linux/regmap.h>
#include <linux/io.h> #include <linux/io.h>
#include <linux/extcon.h>
#include <linux/of.h>
#include "ci.h" #include "ci.h"
#define HS_PHY_AHB_MODE 0x0098 #define HS_PHY_AHB_MODE 0x0098
#define HS_PHY_GENCONFIG 0x009c
#define HS_PHY_TXFIFO_IDLE_FORCE_DIS BIT(4)
#define HS_PHY_GENCONFIG_2 0x00a0
#define HS_PHY_SESS_VLD_CTRL_EN BIT(7)
#define HS_PHY_ULPI_TX_PKT_EN_CLR_FIX BIT(19)
#define HSPHY_SESS_VLD_CTRL BIT(25)
/* Vendor base starts at 0x200 beyond CI base */ /* Vendor base starts at 0x200 beyond CI base */
#define HS_PHY_SEC_CTRL 0x0078 #define HS_PHY_SEC_CTRL 0x0078
#define HS_PHY_DIG_CLAMP_N BIT(16) #define HS_PHY_DIG_CLAMP_N BIT(16)
...@@ -29,6 +40,7 @@ struct ci_hdrc_msm { ...@@ -29,6 +40,7 @@ struct ci_hdrc_msm {
struct clk *iface_clk; struct clk *iface_clk;
struct clk *fs_clk; struct clk *fs_clk;
bool secondary_phy; bool secondary_phy;
bool hsic;
void __iomem *base; void __iomem *base;
}; };
...@@ -48,6 +60,24 @@ static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event) ...@@ -48,6 +60,24 @@ static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event)
/* use AHB transactor, allow posted data writes */ /* use AHB transactor, allow posted data writes */
hw_write_id_reg(ci, HS_PHY_AHB_MODE, 0xffffffff, 0x8); hw_write_id_reg(ci, HS_PHY_AHB_MODE, 0xffffffff, 0x8);
/* workaround for rx buffer collision issue */
hw_write_id_reg(ci, HS_PHY_GENCONFIG,
HS_PHY_TXFIFO_IDLE_FORCE_DIS, 0);
if (!msm_ci->hsic)
hw_write_id_reg(ci, HS_PHY_GENCONFIG_2,
HS_PHY_ULPI_TX_PKT_EN_CLR_FIX, 0);
if (!IS_ERR(ci->platdata->vbus_extcon.edev)) {
hw_write_id_reg(ci, HS_PHY_GENCONFIG_2,
HS_PHY_SESS_VLD_CTRL_EN,
HS_PHY_SESS_VLD_CTRL_EN);
hw_write(ci, OP_USBCMD, HSPHY_SESS_VLD_CTRL,
HSPHY_SESS_VLD_CTRL);
}
usb_phy_init(ci->usb_phy); usb_phy_init(ci->usb_phy);
break; break;
case CI_HDRC_CONTROLLER_STOPPED_EVENT: case CI_HDRC_CONTROLLER_STOPPED_EVENT:
...@@ -116,6 +146,7 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev) ...@@ -116,6 +146,7 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
struct reset_control *reset; struct reset_control *reset;
struct resource *res; struct resource *res;
int ret; int ret;
struct device_node *ulpi_node, *phy_node;
dev_dbg(&pdev->dev, "ci_hdrc_msm_probe\n"); dev_dbg(&pdev->dev, "ci_hdrc_msm_probe\n");
...@@ -181,6 +212,14 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev) ...@@ -181,6 +212,14 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
if (ret) if (ret)
goto err_mux; goto err_mux;
ulpi_node = of_find_node_by_name(pdev->dev.of_node, "ulpi");
if (ulpi_node) {
phy_node = of_get_next_available_child(ulpi_node, NULL);
ci->hsic = of_device_is_compatible(phy_node, "qcom,usb-hsic-phy");
of_node_put(phy_node);
}
of_node_put(ulpi_node);
plat_ci = ci_hdrc_add_device(&pdev->dev, plat_ci = ci_hdrc_add_device(&pdev->dev,
pdev->resource, pdev->num_resources, pdev->resource, pdev->num_resources,
&ci_hdrc_msm_platdata); &ci_hdrc_msm_platdata);
......
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