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Commit 4bce4b2a authored by Linus Torvalds's avatar Linus Torvalds
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Merge bk://bk.arm.linux.org.uk 

into home.transmeta.com:/home/torvalds/v2.5/linux
parents a800d54e 752e2bd2
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arch/arm/Makefile
View file @ 4bce4b2a
......@@ -26,11 +26,14 @@ apcs-$(CONFIG_CPU_32) :=-mapcs-32
apcs-$(CONFIG_CPU_26) :=-mapcs-26 -mcpu=arm3 -Os
# This selects which instruction set is used.
# Note that GCC is lame - it doesn't numerically define an
# architecture version macro, but instead defines a whole
# series of macros.
arch-y :=
arch-$(CONFIG_CPU_32v3) :=-march=armv3
arch-$(CONFIG_CPU_32v4) :=-march=armv4
arch-$(CONFIG_CPU_32v5) :=-march=armv5
arch-$(CONFIG_CPU_XSCALE) :=-march=armv4 -Wa,-mxscale #-march=armv5te
arch-$(CONFIG_CPU_32v3) :=-D__LINUX_ARM_ARCH__=3 -march=armv3
arch-$(CONFIG_CPU_32v4) :=-D__LINUX_ARM_ARCH__=4 -march=armv4
arch-$(CONFIG_CPU_32v5) :=-D__LINUX_ARM_ARCH__=5 -march=armv5
arch-$(CONFIG_CPU_XSCALE) :=-D__LINUX_ARM_ARCH__=5 -march=armv4 -Wa,-mxscale #-march=armv5te
# This selects how we optimise for the processor.
tune-y :=
......
arch/arm/boot/compressed/head-l7200.S
View file @ 4bce4b2a
......@@ -8,6 +8,7 @@
*/
#include <linux/config.h>
#include <asm/mach-types.h>
#ifndef CONFIG_ARCH_L7200
#error What am I doing here...
......@@ -26,4 +27,4 @@ __L7200_start:
ble 1b
mov r8, #0 @ Zero it out
mov r7, #19 @ Set architecture ID
mov r7, #MACH_TYPE_L7200 @ Set architecture ID
arch/arm/boot/compressed/head.S
View file @ 4bce4b2a
/*
* linux/arch/arm/boot/compressed/head.S
*
* Copyright (C) 1996-1999 Russell King
* Copyright (C) 1996-2002 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
......@@ -161,7 +161,6 @@ not_relocated: mov r0, #0
cmp r2, r3
blo 1b
mrc p15, 0, r6, c0, c0 @ get processor ID
bl cache_on
mov r1, sp @ malloc space above stack
......@@ -200,7 +199,8 @@ not_relocated: mov r0, #0
*/
add r1, r5, r0 @ end of decompressed kernel
adr r2, reloc_start
adr r3, reloc_end
ldr r3, LC1
add r3, r2, r3
1: ldmia r2!, {r8 - r13} @ copy relocation code
stmia r1!, {r8 - r13}
ldmia r2!, {r8 - r13}
......@@ -229,8 +229,9 @@ LC0: .word LC0 @ r1
.word _load_addr @ r4
.word _start @ r5
.word _got_start @ r6
.word _got_end @ r7
.word user_stack+4096 @ r8
.word _got_end @ ip
.word user_stack+4096 @ sp
LC1: .word reloc_end - reloc_start
.size LC0, . - LC0
/*
......@@ -255,7 +256,7 @@ LC0: .word LC0 @ r1
cache_on: mov r3, #8 @ cache_on function
b call_cache_fn
__cache_on: sub r3, r4, #16384 @ Page directory size
__setup_mmu: sub r3, r4, #16384 @ Page directory size
bic r3, r3, #0xff @ Align the pointer
bic r3, r3, #0x3f00
/*
......@@ -291,20 +292,35 @@ __cache_on: sub r3, r4, #16384 @ Page directory size
str r1, [r0], #4
add r1, r1, #1048576
str r1, [r0]
mov pc, lr
__armv4_cache_on:
mov r12, lr
bl __setup_mmu
mov r0, #0
mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
mcr p15, 0, r0, c8, c7 @ flush I,D TLBs
mcr p15, 0, r3, c2, c0 @ load page table pointer
mov r0, #-1
mcr p15, 0, r0, c3, c0 @ load domain access register
mrc p15, 0, r0, c1, c0
mcr p15, 0, r0, c8, c7, 0 @ flush I,D TLBs
mrc p15, 0, r0, c1, c0, 0 @ read control reg
orr r0, r0, #0x1000 @ I-cache enable
orr r0, r0, #0x0030
b __common_cache_on
__arm6_cache_on:
mov r12, lr
bl __setup_mmu
mov r0, #0
mcr p15, 0, r0, c7, c0, 0 @ invalidate whole cache v3
mcr p15, 0, r0, c5, c0, 0 @ invalidate whole TLB v3
mov r0, #0x30
__common_cache_on:
#ifndef DEBUG
orr r0, r0, #0x003d @ Write buffer, mmu
orr r0, r0, #0x000d @ Write buffer, mmu
#endif
mcr p15, 0, r0, c1, c0
mov pc, lr
mov r1, #-1
mcr p15, 0, r3, c2, c0, 0 @ load page table pointer
mcr p15, 0, r1, c3, c0, 0 @ load domain access control
mcr p15, 0, r0, c1, c0, 0 @ load control register
mov pc, r12
/*
* All code following this line is relocatable. It is relocated by
......@@ -349,11 +365,12 @@ call_kernel: bl cache_clean_flush
* r1 = corrupted
* r2 = corrupted
* r3 = block offset
* r6 = CPU ID
* r6 = corrupted
* r12 = corrupted
*/
call_cache_fn: adr r12, proc_types
mrc p15, 0, r6, c0, c0 @ get processor ID
1: ldr r1, [r12, #0] @ get value
ldr r2, [r12, #4] @ get mask
eor r1, r1, r6 @ (real ^ match)
......@@ -380,9 +397,12 @@ call_cache_fn: adr r12, proc_types
proc_types:
.word 0x41560600 @ ARM6/610
.word 0xffffffe0
b __arm6_cache_off
b __arm6_cache_off @ works, but slow
b __arm6_cache_off
mov pc, lr
@ b __arm6_cache_on @ untested
@ b __arm6_cache_off
@ b __armv3_cache_flush
.word 0x41007000 @ ARM7/710
.word 0xfff8fe00
......@@ -392,31 +412,31 @@ proc_types:
.word 0x41807200 @ ARM720T (writethrough)
.word 0xffffff00
b __cache_on
b __armv4_cache_on
b __armv4_cache_off
mov pc, lr
.word 0x41129200 @ ARM920T
.word 0xff00fff0
b __cache_on
b __armv4_cache_on
b __armv4_cache_off
b __armv4_cache_flush
.word 0x4401a100 @ sa110 / sa1100
.word 0xffffffe0
b __cache_on
b __armv4_cache_on
b __armv4_cache_off
b __armv4_cache_flush
.word 0x6901b110 @ sa1110
.word 0xfffffff0
b __cache_on
b __armv4_cache_on
b __armv4_cache_off
b __armv4_cache_flush
.word 0x69050000 @ xscale
.word 0xffff0000
b __cache_on
b __armv4_cache_on
b __armv4_cache_off
b __armv4_cache_flush
......@@ -450,7 +470,7 @@ __armv4_cache_off:
mov pc, lr
__arm6_cache_off:
mov r0, #0x00000060 @ ARM6 control reg.
mov r0, #0x00000030 @ ARM6 control reg.
b __armv3_cache_off
__arm7_cache_off:
......@@ -458,10 +478,10 @@ __arm7_cache_off:
b __armv3_cache_off
__armv3_cache_off:
mcr p15, 0, r0, c1, c0 @ turn MMU and cache off
mcr p15, 0, r0, c1, c0, 0 @ turn MMU and cache off
mov r0, #0
mcr p15, 0, r0, c7, c0 @ invalidate whole cache v3
mcr p15, 0, r0, c5, c0 @ invalidate whole TLB v3
mcr p15, 0, r0, c7, c0, 0 @ invalidate whole cache v3
mcr p15, 0, r0, c5, c0, 0 @ invalidate whole TLB v3
mov pc, lr
/*
......@@ -490,6 +510,11 @@ __armv4_cache_flush:
mcr p15, 0, r1, c7, c10, 4 @ drain WB
mov pc, lr
__armv3_cache_flush:
mov r1, #0
mcr p15, 0, r0, c7, c0, 0 @ invalidate whole cache v3
mov pc, lr
/*
* Various debugging routines for printing hex characters and
* memory, which again must be relocatable.
......
arch/arm/kernel/bios32.c
View file @ 4bce4b2a
......@@ -545,73 +545,8 @@ static void __init pcibios_init_hw(struct hw_pci *hw)
}
}
extern struct hw_pci ebsa285_pci;
extern struct hw_pci cats_pci;
extern struct hw_pci netwinder_pci;
extern struct hw_pci personal_server_pci;
extern struct hw_pci ftv_pci;
extern struct hw_pci shark_pci;
extern struct hw_pci integrator_pci;
extern struct hw_pci iq80310_pci;
void __init pcibios_init(void)
void __init pci_common_init(struct hw_pci *hw)
{
struct hw_pci *hw = NULL;
do {
#ifdef CONFIG_ARCH_EBSA285
if (machine_is_ebsa285()) {
hw = &ebsa285_pci;
break;
}
#endif
#ifdef CONFIG_ARCH_SHARK
if (machine_is_shark()) {
hw = &shark_pci;
break;
}
#endif
#ifdef CONFIG_ARCH_CATS
if (machine_is_cats()) {
hw = &cats_pci;
break;
}
#endif
#ifdef CONFIG_ARCH_NETWINDER
if (machine_is_netwinder()) {
hw = &netwinder_pci;
break;
}
#endif
#ifdef CONFIG_ARCH_PERSONAL_SERVER
if (machine_is_personal_server()) {
hw = &personal_server_pci;
break;
}
#endif
#ifdef CONFIG_ARCH_FTVPCI
if (machine_is_ftvpci()) {
hw = &ftv_pci;
break;
}
#endif
#ifdef CONFIG_ARCH_INTEGRATOR
if (machine_is_integrator()) {
hw = &integrator_pci;
break;
}
#endif
#ifdef CONFIG_ARCH_IQ80310
if (machine_is_iq80310()) {
hw = &iq80310_pci;
break;
}
#endif
} while (0);
if (hw == NULL)
return;
if (hw->preinit)
hw->preinit();
pcibios_init_hw(hw);
......
arch/arm/kernel/dma.c
View file @ 4bce4b2a
......@@ -120,6 +120,10 @@ void set_dma_sg (dmach_t channel, struct scatterlist *sg, int nr_sg)
{
dma_t *dma = dma_chan + channel;
if (dma->active)
printk(KERN_ERR "dma%d: altering DMA SG while "
"DMA active\n", channel);
dma->sg = sg;
dma->sgcount = nr_sg;
dma->using_sg = 1;
......@@ -218,6 +222,14 @@ void disable_dma (dmach_t channel)
BUG();
}
/*
* Is the specified DMA channel active?
*/
int dma_channel_active(dmach_t channel)
{
return dma_chan[channel].active;
}
void set_dma_page(dmach_t channel, char pagenr)
{
printk(KERN_ERR "dma%d: trying to set_dma_page\n", channel);
......
arch/arm/kernel/ecard.c
View file @ 4bce4b2a
......@@ -541,7 +541,7 @@ static expansioncard_ops_t ecard_default_ops = {
*
* They are not meant to be called directly, but via enable/disable_irq.
*/
static void ecard_irq_mask(unsigned int irqnr)
static void ecard_irq_unmask(unsigned int irqnr)
{
ecard_t *ec = slot_to_ecard(irqnr - 32);
......@@ -557,7 +557,7 @@ static void ecard_irq_mask(unsigned int irqnr)
}
}
static void ecard_irq_unmask(unsigned int irqnr)
static void ecard_irq_mask(unsigned int irqnr)
{
ecard_t *ec = slot_to_ecard(irqnr - 32);
......@@ -945,20 +945,20 @@ ecard_probe(int slot, card_type_t type)
break;
}
ec->irq = 32 + slot;
#ifdef IO_EC_MEMC8_BASE
if (slot == 8)
ec->irq = 11;
#endif
/*
* hook the interrupt handlers
*/
if (ec->irq != 0 && ec->irq >= 32) {
if (slot < 8) {
ec->irq = 32 + slot;
set_irq_chip(ec->irq, &ecard_chip);
set_irq_handler(ec->irq, do_level_IRQ);
set_irq_flags(ec->irq, IRQF_VALID);
}
#ifdef IO_EC_MEMC8_BASE
if (slot == 8)
ec->irq = 11;
#endif
#ifdef CONFIG_ARCH_RPC
/* On RiscPC, only first two slots have DMA capability */
if (slot < 2)
......
arch/arm/kernel/head.S
View file @ 4bce4b2a
/*
* linux/arch/arm/kernel/head-armv.S
*
* Copyright (C) 1994-1999 Russell King
* Copyright (C) 1994-2002 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* 32-bit kernel startup code for all architectures
* Kernel startup code for all 32-bit CPUs
*/
#include <linux/config.h>
#include <linux/linkage.h>
......@@ -17,12 +17,10 @@
#include <asm/procinfo.h>
#include <asm/mach/arch.h>
#define K(a,b,c) ((a) << 24 | (b) << 12 | (c))
/*
* We place the page tables 16K below TEXTADDR. Therefore, we must make sure
* that TEXTADDR is correctly set. Currently, we expect the least significant
* "short" to be 0x8000, but we could probably relax this restriction to
* 16 bits to be 0x8000, but we could probably relax this restriction to
* TEXTADDR > PAGE_OFFSET + 0x4000
*
* Note that swapper_pg_dir is the virtual address of the page tables, and
......@@ -35,159 +33,119 @@
#error TEXTADDR must start at 0xXXXX8000
#endif
.globl swapper_pg_dir
.equ swapper_pg_dir, TEXTADDR - 0x4000
.globl swapper_pg_dir
.equ swapper_pg_dir, TEXTADDR - 0x4000
.macro pgtbl, reg, rambase
adr \reg, stext
sub \reg, \reg, #0x4000
.endm
.macro pgtbl, reg, rambase
adr \reg, stext
sub \reg, \reg, #0x4000
.endm
/*
* Since the page table is closely related to the kernel start address, we
* can convert the page table base address to the base address of the section
* containing both.
*/
.macro krnladr, rd, pgtable, rambase
bic \rd, \pgtable, #0x000ff000
.endm
.macro krnladr, rd, pgtable, rambase
bic \rd, \pgtable, #0x000ff000
.endm
/*
* Kernel startup entry point.
* Kernel startup entry point.
* ---------------------------
*
* The rules are:
* r0 - should be 0
* r1 - unique architecture number
* MMU - off
* I-cache - on or off
* D-cache - off
* This is normally called from the decompressor code. The requirements
* are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0,
* r1 = machine nr.
*
* See linux/arch/arm/tools/mach-types for the complete list of numbers
* for r1.
*/
.section ".text.init",#alloc,#execinstr
.type stext, #function
ENTRY(stext)
mov r12, r0
/*
* NOTE! Any code which is placed here should be done for one of
* the following reasons:
* This code is mostly position independent, so if you link the kernel at
* 0xc0008000, you call this at __pa(0xc0008000).
*
* 1. Compatability with old production boot firmware (ie, users
* actually have and are booting the kernel with the old firmware)
* and therefore will be eventually removed.
* 2. Cover the case when there is no boot firmware. This is not
* ideal, but in this case, it should ONLY set r0 and r1 to the
* appropriate value.
*/
#if defined(CONFIG_ARCH_NETWINDER)
/*
* Compatability cruft for old NetWinder NeTTroms. This
* code is currently scheduled for destruction in 2.5.xx
* See linux/arch/arm/tools/mach-types for the complete list of machine
* numbers for r1.
*
* We're trying to keep crap to a minimum; DO NOT add any machine specific
* crap here - that's what the boot loader (or in extreme, well justified
* circumstances, zImage) is for.
*/
.rept 8
mov r0, r0
.endr
adr r2, 1f
ldmdb r2, {r7, r8}
and r3, r2, #0xc000
teq r3, #0x8000
beq __entry
bic r3, r2, #0xc000
orr r3, r3, #0x8000
mov r0, r3
mov r4, #64
sub r5, r8, r7
b 1f
.word _stext
.word __bss_start
1:
.rept 4
ldmia r2!, {r6, r7, r8, r9}
stmia r3!, {r6, r7, r8, r9}
.endr
subs r4, r4, #64
bcs 1b
movs r4, r5
mov r5, #0
movne pc, r0
.section ".text.init",#alloc,#execinstr
.type stext, #function
ENTRY(stext)
mov r12, r0
mov r0, #PSR_F_BIT | PSR_I_BIT | MODE_SVC @ make sure svc mode
msr cpsr_c, r0 @ and all irqs disabled
bl __lookup_processor_type
teq r10, #0 @ invalid processor?
moveq r0, #'p' @ yes, error 'p'
beq __error
bl __lookup_architecture_type
teq r7, #0 @ invalid architecture?
moveq r0, #'a' @ yes, error 'a'
beq __error
bl __create_page_tables
/*
* The following calls CPU specific code in a position independent
* manner. See arch/arm/mm/proc-*.S for details. r10 = base of
* xxx_proc_info structure selected by __lookup_architecture_type
* above. On return, the CPU will be ready for the MMU to be
* turned on, and r0 will hold the CPU control register value.
*/
adr lr, __turn_mmu_on @ return (PIC) address
add pc, r10, #12
.type __switch_data, %object
__switch_data:
.long __mmap_switched
.long __bss_start @ r4
.long _end @ r5
.long processor_id @ r6
.long __machine_arch_type @ r7
.long cr_alignment @ r8
.long init_thread_union+8192 @ sp
mov r1, #MACH_TYPE_NETWINDER @ (will go in 2.5)
mov r12, #2 << 24 @ scheduled for removal in 2.5.xx
orr r12, r12, #5 << 12
__entry:
#endif
#if defined(CONFIG_ARCH_L7200)
/*
* FIXME - No bootloader, so manually set 'r1' with our architecture number.
* Enable the MMU. This completely changes the structure of the visible
* memory space. You will not be able to trace execution through this.
* If you have an enquiry about this, *please* check the linux-arm-kernel
* mailing list archives BEFORE sending another post to the list.
*/
mov r1, #MACH_TYPE_L7200
.align 5
.type __turn_mmu_on, %function
__turn_mmu_on:
ldr lr, __switch_data
#ifdef CONFIG_ALIGNMENT_TRAP
orr r0, r0, #2 @ ...........A.
#endif
mcr p15, 0, r0, c1, c0
mov r0, r0
mov r0, r0
mov r0, r0
mov pc, lr
mov r0, #PSR_F_BIT | PSR_I_BIT | MODE_SVC @ make sure svc mode
msr cpsr_c, r0 @ and all irqs disabled
bl __lookup_processor_type
teq r10, #0 @ invalid processor?
moveq r0, #'p' @ yes, error 'p'
beq __error
bl __lookup_architecture_type
teq r7, #0 @ invalid architecture?
moveq r0, #'a' @ yes, error 'a'
beq __error
bl __create_page_tables
adr lr, __ret @ return address
add pc, r10, #12 @ initialise processor
@ (return control reg)
.type __switch_data, %object
__switch_data: .long __mmap_switched
.long compat
.long __bss_start
.long _end
.long processor_id
.long __machine_arch_type
.long cr_alignment
.long init_thread_union+8192
.type __ret, %function
__ret: ldr lr, __switch_data
mcr p15, 0, r0, c1, c0
mov r0, r0
mov r0, r0
mov r0, r0
mov pc, lr
/*
* This code follows on after the page
* table switch and jump above.
*
* r0 = processor control register
* r1 = machine ID
* r9 = processor ID
*/
.align 5
/*
* The following fragment of code is executed with the MMU on, and uses
* absolute addresses; this is not position independent.
*
* r0 = processor control register
* r1 = machine ID
* r9 = processor ID
* r12 = value of r0 when kernel was called (currently always zero)
*/
.align 5
__mmap_switched:
adr r3, __switch_data + 4
ldmia r3, {r2, r4, r5, r6, r7, r8, sp}@ r2 = compat
@ sp = stack pointer
str r12, [r2]
mov fp, #0 @ Clear BSS (and zero fp)
1: cmp r4, r5
strcc fp, [r4],#4
bcc 1b
adr r3, __switch_data + 4
ldmia r3, {r4, r5, r6, r7, r8, sp}
mov fp, #0 @ Clear BSS (and zero fp)
1: cmp r4, r5
strcc fp, [r4],#4
bcc 1b
str r9, [r6] @ Save processor ID
str r1, [r7] @ Save machine type
bic r2, r0, #2 @ Clear 'A' bit
stmia r8, {r0, r2} @ Save control register values
b start_kernel
str r9, [r6] @ Save processor ID
str r1, [r7] @ Save machine type
#ifdef CONFIG_ALIGNMENT_TRAP
orr r0, r0, #2 @ ...........A.
#endif
bic r2, r0, #2 @ Clear 'A' bit
stmia r8, {r0, r2} @ Save control register values
b start_kernel
......@@ -205,116 +163,116 @@ __mmap_switched:
* r8 = page table flags
*/
__create_page_tables:
pgtbl r4, r5 @ page table address
/*
* Clear the 16K level 1 swapper page table
*/
mov r0, r4
mov r3, #0
add r2, r0, #0x4000
1: str r3, [r0], #4
str r3, [r0], #4
str r3, [r0], #4
str r3, [r0], #4
teq r0, r2
bne 1b
/*
* Create identity mapping for first MB of kernel to
* cater for the MMU enable. This identity mapping
* will be removed by paging_init()
*/
krnladr r2, r4, r5 @ start of kernel
add r3, r8, r2 @ flags + kernel base
str r3, [r4, r2, lsr #18] @ identity mapping
/*
* Now setup the pagetables for our kernel direct
* mapped region. We round TEXTADDR down to the
* nearest megabyte boundary.
*/
add r0, r4, #(TEXTADDR & 0xff000000) >> 18 @ start of kernel
bic r2, r3, #0x00f00000
str r2, [r0] @ PAGE_OFFSET + 0MB
add r0, r0, #(TEXTADDR & 0x00f00000) >> 18
str r3, [r0], #4 @ KERNEL + 0MB
add r3, r3, #1 << 20
str r3, [r0], #4 @ KERNEL + 1MB
add r3, r3, #1 << 20
str r3, [r0], #4 @ KERNEL + 2MB
add r3, r3, #1 << 20
str r3, [r0], #4 @ KERNEL + 3MB
/*
* Ensure that the first section of RAM is present.
* we assume that:
* 1. the RAM is aligned to a 32MB boundary
* 2. the kernel is executing in the same 32MB chunk
* as the start of RAM.
*/
bic r0, r0, #0x01f00000 >> 18 @ round down
and r2, r5, #0xfe000000 @ round down
add r3, r8, r2 @ flags + rambase
str r3, [r0]
bic r8, r8, #0x0c @ turn off cacheable
@ and bufferable bits
pgtbl r4, r5 @ page table address
/*
* Clear the 16K level 1 swapper page table
*/
mov r0, r4
mov r3, #0
add r2, r0, #0x4000
1: str r3, [r0], #4
str r3, [r0], #4
str r3, [r0], #4
str r3, [r0], #4
teq r0, r2
bne 1b
/*
* Create identity mapping for first MB of kernel to
* cater for the MMU enable. This identity mapping
* will be removed by paging_init()
*/
krnladr r2, r4, r5 @ start of kernel
add r3, r8, r2 @ flags + kernel base
str r3, [r4, r2, lsr #18] @ identity mapping
/*
* Now setup the pagetables for our kernel direct
* mapped region. We round TEXTADDR down to the
* nearest megabyte boundary.
*/
add r0, r4, #(TEXTADDR & 0xff000000) >> 18 @ start of kernel
bic r2, r3, #0x00f00000
str r2, [r0] @ PAGE_OFFSET + 0MB
add r0, r0, #(TEXTADDR & 0x00f00000) >> 18
str r3, [r0], #4 @ KERNEL + 0MB
add r3, r3, #1 << 20
str r3, [r0], #4 @ KERNEL + 1MB
add r3, r3, #1 << 20
str r3, [r0], #4 @ KERNEL + 2MB
add r3, r3, #1 << 20
str r3, [r0], #4 @ KERNEL + 3MB
/*
* Ensure that the first section of RAM is present.
* we assume that:
* 1. the RAM is aligned to a 32MB boundary
* 2. the kernel is executing in the same 32MB chunk
* as the start of RAM.
*/
bic r0, r0, #0x01f00000 >> 18 @ round down
and r2, r5, #0xfe000000 @ round down
add r3, r8, r2 @ flags + rambase
str r3, [r0]
bic r8, r8, #0x0c @ turn off cacheable
@ and bufferable bits
#ifdef CONFIG_DEBUG_LL
/*
* Map in IO space for serial debugging.
* This allows debug messages to be output
* via a serial console before paging_init.
*/
add r0, r4, r7
rsb r3, r7, #0x4000 @ PTRS_PER_PGD*sizeof(long)
cmp r3, #0x0800
addge r2, r0, #0x0800
addlt r2, r0, r3
orr r3, r6, r8
1: str r3, [r0], #4
add r3, r3, #1 << 20
teq r0, r2
bne 1b
/*
* Map in IO space for serial debugging.
* This allows debug messages to be output
* via a serial console before paging_init.
*/
add r0, r4, r7
rsb r3, r7, #0x4000 @ PTRS_PER_PGD*sizeof(long)
cmp r3, #0x0800
addge r2, r0, #0x0800
addlt r2, r0, r3
orr r3, r6, r8
1: str r3, [r0], #4
add r3, r3, #1 << 20
teq r0, r2
bne 1b
#if defined(CONFIG_ARCH_NETWINDER) || defined(CONFIG_ARCH_CATS)
/*
* If we're using the NetWinder, we need to map in
* the 16550-type serial port for the debug messages
*/
teq r1, #MACH_TYPE_NETWINDER
teqne r1, #MACH_TYPE_CATS
bne 1f
add r0, r4, #0x3fc0
mov r3, #0x7c000000
orr r3, r3, r8
str r3, [r0], #4
add r3, r3, #1 << 20
str r3, [r0], #4
/*
* If we're using the NetWinder, we need to map in
* the 16550-type serial port for the debug messages
*/
teq r1, #MACH_TYPE_NETWINDER
teqne r1, #MACH_TYPE_CATS
bne 1f
add r0, r4, #0x3fc0 @ ff000000
mov r3, #0x7c000000
orr r3, r3, r8
str r3, [r0], #4
add r3, r3, #1 << 20
str r3, [r0], #4
1:
#endif
#endif
#ifdef CONFIG_ARCH_RPC
/*
* Map in screen at 0x02000000 & SCREEN2_BASE
* Similar reasons here - for debug. This is
* only for Acorn RiscPC architectures.
*/
add r0, r4, #0x80 @ 02000000
mov r3, #0x02000000
orr r3, r3, r8
str r3, [r0]
add r0, r4, #0x3600 @ d8000000
str r3, [r0]
/*
* Map in screen at 0x02000000 & SCREEN2_BASE
* Similar reasons here - for debug. This is
* only for Acorn RiscPC architectures.
*/
add r0, r4, #0x80 @ 02000000
mov r3, #0x02000000
orr r3, r3, r8
str r3, [r0]
add r0, r4, #0x3600 @ d8000000
str r3, [r0]
#endif
mov pc, lr
mov pc, lr
/*
* Exception handling. Something went wrong and we can't
* proceed. We ought to tell the user, but since we
* don't have any guarantee that we're even running on
* the right architecture, we do virtually nothing.
* Exception handling. Something went wrong and we can't proceed. We
* ought to tell the user, but since we don't have any guarantee that
* we're even running on the right architecture, we do virtually nothing.
*
* r0 = ascii error character:
* a = invalid architecture
* p = invalid processor
......@@ -324,31 +282,32 @@ __create_page_tables:
*/
__error:
#ifdef CONFIG_DEBUG_LL
mov r8, r0 @ preserve r0
adr r0, err_str
bl printascii
mov r0, r8
bl printch
mov r8, r0 @ preserve r0
adr r0, err_str
bl printascii
mov r0, r8
bl printch
#endif
#ifdef CONFIG_ARCH_RPC
/*
* Turn the screen red on a error - RiscPC only.
*/
mov r0, #0x02000000
mov r3, #0x11
orr r3, r3, r3, lsl #8
orr r3, r3, r3, lsl #16
str r3, [r0], #4
str r3, [r0], #4
str r3, [r0], #4
str r3, [r0], #4
mov r0, #0x02000000
mov r3, #0x11
orr r3, r3, r3, lsl #8
orr r3, r3, r3, lsl #16
str r3, [r0], #4
str r3, [r0], #4
str r3, [r0], #4
str r3, [r0], #4
#endif
1: mov r0, r0
b 1b
1: mov r0, r0
b 1b
#ifdef CONFIG_DEBUG_LL
err_str: .asciz "\nError: "
.align
err_str:
.asciz "\nError: "
.align
#endif
/*
......@@ -365,31 +324,31 @@ err_str: .asciz "\nError: "
* r10 = pointer to processor structure
*/
__lookup_processor_type:
adr r5, 2f
ldmia r5, {r7, r9, r10}
sub r5, r5, r10 @ convert addresses
add r7, r7, r5 @ to our address space
add r10, r9, r5
mrc p15, 0, r9, c0, c0 @ get processor id
1: ldmia r10, {r5, r6, r8} @ value, mask, mmuflags
and r6, r6, r9 @ mask wanted bits
teq r5, r6
moveq pc, lr
add r10, r10, #PROC_INFO_SZ @ sizeof(proc_info_list)
cmp r10, r7
blt 1b
mov r10, #0 @ unknown processor
mov pc, lr
adr r5, 2f
ldmia r5, {r7, r9, r10}
sub r5, r5, r10 @ convert addresses
add r7, r7, r5 @ to our address space
add r10, r9, r5
mrc p15, 0, r9, c0, c0 @ get processor id
1: ldmia r10, {r5, r6, r8} @ value, mask, mmuflags
and r6, r6, r9 @ mask wanted bits
teq r5, r6
moveq pc, lr
add r10, r10, #PROC_INFO_SZ @ sizeof(proc_info_list)
cmp r10, r7
blt 1b
mov r10, #0 @ unknown processor
mov pc, lr
/*
* Look in include/asm-arm/procinfo.h and arch/arm/kernel/arch.[ch] for
* more information about the __proc_info and __arch_info structures.
*/
2: .long __proc_info_end
.long __proc_info_begin
.long 2b
.long __arch_info_begin
.long __arch_info_end
2: .long __proc_info_end
.long __proc_info_begin
.long 2b
.long __arch_info_begin
.long __arch_info_end
/*
* Lookup machine architecture in the linker-build list of architectures.
......@@ -405,18 +364,18 @@ __lookup_processor_type:
* r7 = byte offset into page tables for IO
*/
__lookup_architecture_type:
adr r4, 2b
ldmia r4, {r2, r3, r5, r6, r7} @ throw away r2, r3
sub r5, r4, r5 @ convert addresses
add r4, r6, r5 @ to our address space
add r7, r7, r5
1: ldr r5, [r4] @ get machine type
teq r5, r1
beq 2f
add r4, r4, #SIZEOF_MACHINE_DESC
cmp r4, r7
blt 1b
mov r7, #0 @ unknown architecture
mov pc, lr
2: ldmib r4, {r5, r6, r7} @ found, get results
mov pc, lr
adr r4, 2b
ldmia r4, {r2, r3, r5, r6, r7} @ throw away r2, r3
sub r5, r4, r5 @ convert addresses
add r4, r6, r5 @ to our address space
add r7, r7, r5
1: ldr r5, [r4] @ get machine type
teq r5, r1 @ matches loader number?
beq 2f @ found
add r4, r4, #SIZEOF_MACHINE_DESC @ next machine_desc
cmp r4, r7
blt 1b
mov r7, #0 @ unknown architecture
mov pc, lr
2: ldmib r4, {r5, r6, r7} @ found, get results
mov pc, lr
arch/arm/kernel/process.c
View file @ 4bce4b2a
......@@ -386,16 +386,16 @@ pid_t kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
pid_t __ret;
__asm__ __volatile__(
"orr r0, %1, %2 @ kernel_thread sys_clone
mov r1, #0
"__syscall(clone)"
movs %0, r0 @ if we are the child
bne 1f
mov fp, #0 @ ensure that fp is zero
mov r0, %4
mov lr, pc
mov pc, %3
b sys_exit
"orr r0, %1, %2 @ kernel_thread sys_clone \n\
mov r1, #0 \n\
"__syscall(clone)" \n\
movs %0, r0 @ if we are the child \n\
bne 1f \n\
mov fp, #0 @ ensure that fp is zero \n\
mov r0, %4 \n\
mov lr, pc \n\
mov pc, %3 \n\
b sys_exit \n\
1: "
: "=r" (__ret)
: "Ir" (flags), "I" (CLONE_VM), "r" (fn), "r" (arg)
......
arch/arm/kernel/semaphore.c
View file @ 4bce4b2a
......@@ -178,76 +178,76 @@ int __down_trylock(struct semaphore * sem)
* value in some cases..
*/
#ifdef CONFIG_CPU_26
asm(" .align 5
.globl __down_failed
__down_failed:
stmfd sp!, {r0 - r3, lr}
mov r0, ip
bl __down
ldmfd sp!, {r0 - r3, pc}^
.align 5
.globl __down_interruptible_failed
__down_interruptible_failed:
stmfd sp!, {r0 - r3, lr}
mov r0, ip
bl __down_interruptible
mov ip, r0
ldmfd sp!, {r0 - r3, pc}^
.align 5
.globl __down_trylock_failed
__down_trylock_failed:
stmfd sp!, {r0 - r3, lr}
mov r0, ip
bl __down_trylock
mov ip, r0
ldmfd sp!, {r0 - r3, pc}^
.align 5
.globl __up_wakeup
__up_wakeup:
stmfd sp!, {r0 - r3, lr}
mov r0, ip
bl __up
ldmfd sp!, {r0 - r3, pc}^
asm(" .align 5 \n\
.globl __down_failed \n\
__down_failed: \n\
stmfd sp!, {r0 - r3, lr} \n\
mov r0, ip \n\
bl __down \n\
ldmfd sp!, {r0 - r3, pc}^ \n\
\n\
.align 5 \n\
.globl __down_interruptible_failed \n\
__down_interruptible_failed: \n\
stmfd sp!, {r0 - r3, lr} \n\
mov r0, ip \n\
bl __down_interruptible \n\
mov ip, r0 \n\
ldmfd sp!, {r0 - r3, pc}^ \n\
\n\
.align 5 \n\
.globl __down_trylock_failed \n\
__down_trylock_failed: \n\
stmfd sp!, {r0 - r3, lr} \n\
mov r0, ip \n\
bl __down_trylock \n\
mov ip, r0 \n\
ldmfd sp!, {r0 - r3, pc}^ \n\
\n\
.align 5 \n\
.globl __up_wakeup \n\
__up_wakeup: \n\
stmfd sp!, {r0 - r3, lr} \n\
mov r0, ip \n\
bl __up \n\
ldmfd sp!, {r0 - r3, pc}^ \n\
");
#else
/* 32 bit version */
asm(" .align 5
.globl __down_failed
__down_failed:
stmfd sp!, {r0 - r3, lr}
mov r0, ip
bl __down
ldmfd sp!, {r0 - r3, pc}
.align 5
.globl __down_interruptible_failed
__down_interruptible_failed:
stmfd sp!, {r0 - r3, lr}
mov r0, ip
bl __down_interruptible
mov ip, r0
ldmfd sp!, {r0 - r3, pc}
.align 5
.globl __down_trylock_failed
__down_trylock_failed:
stmfd sp!, {r0 - r3, lr}
mov r0, ip
bl __down_trylock
mov ip, r0
ldmfd sp!, {r0 - r3, pc}
.align 5
.globl __up_wakeup
__up_wakeup:
stmfd sp!, {r0 - r3, lr}
mov r0, ip
bl __up
ldmfd sp!, {r0 - r3, pc}
asm(" .align 5 \n\
.globl __down_failed \n\
__down_failed: \n\
stmfd sp!, {r0 - r3, lr} \n\
mov r0, ip \n\
bl __down \n\
ldmfd sp!, {r0 - r3, pc} \n\
\n\
.align 5 \n\
.globl __down_interruptible_failed \n\
__down_interruptible_failed: \n\
stmfd sp!, {r0 - r3, lr} \n\
mov r0, ip \n\
bl __down_interruptible \n\
mov ip, r0 \n\
ldmfd sp!, {r0 - r3, pc} \n\
\n\
.align 5 \n\
.globl __down_trylock_failed \n\
__down_trylock_failed: \n\
stmfd sp!, {r0 - r3, lr} \n\
mov r0, ip \n\
bl __down_trylock \n\
mov ip, r0 \n\
ldmfd sp!, {r0 - r3, pc} \n\
\n\
.align 5 \n\
.globl __up_wakeup \n\
__up_wakeup: \n\
stmfd sp!, {r0 - r3, lr} \n\
mov r0, ip \n\
bl __up \n\
ldmfd sp!, {r0 - r3, pc} \n\
");
#endif
arch/arm/kernel/setup.c
View file @ 4bce4b2a
......@@ -61,7 +61,6 @@ extern int root_mountflags;
extern int _stext, _text, _etext, _edata, _end;
unsigned int processor_id;
unsigned int compat;
unsigned int __machine_arch_type;
unsigned int system_rev;
unsigned int system_serial_low;
......@@ -289,11 +288,6 @@ static struct machine_desc * __init setup_machine(unsigned int nr)
}
printk("Machine: %s\n", list->name);
if (compat)
printk(KERN_WARNING "Using compatibility code "
"scheduled for removal in v%d.%d.%d\n",
compat >> 24, (compat >> 12) & 0x3ff,
compat & 0x3ff);
return list;
}
......
arch/arm/kernel/signal.c
View file @ 4bce4b2a
......@@ -618,7 +618,7 @@ int do_signal(sigset_t *oldset, struct pt_regs *regs, int syscall)
continue;
switch (signr) {
case SIGCONT: case SIGCHLD: case SIGWINCH:
case SIGCONT: case SIGCHLD: case SIGWINCH: case SIGURG:
continue;
case SIGTSTP: case SIGTTIN: case SIGTTOU:
......
arch/arm/lib/csumpartial.S
View file @ 4bce4b2a
......@@ -49,7 +49,7 @@ td3 .req lr
/* we are now half-word aligned */
.less8_wordlp:
#ifdef __ARM_ARCH_4__
#if __LINUX_ARM_ARCH__ >= 4
ldrh td0, [buf], #2
sub len, len, #2
#else
......@@ -83,7 +83,7 @@ td3 .req lr
adcnes sum, sum, td0, lsl #byte(1) @ update checksum
tst buf, #2 @ 32-bit aligned?
#ifdef __ARM_ARCH_4__
#if __LINUX_ARM_ARCH__ >= 4
ldrneh td0, [buf], #2 @ make 32-bit aligned
subne len, len, #2
#else
......
arch/arm/lib/longlong.h
View file @ 4bce4b2a
......@@ -75,7 +75,7 @@
#if defined (__arm__)
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
__asm__ ("adds %1, %4, %5
__asm__ ("adds %1, %4, %5 \n\
adc %0, %2, %3" \
: "=r" ((USItype) (sh)), \
"=&r" ((USItype) (sl)) \
......@@ -84,7 +84,7 @@
"%r" ((USItype) (al)), \
"rI" ((USItype) (bl)))
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
__asm__ ("subs %1, %4, %5
__asm__ ("subs %1, %4, %5 \n\
sbc %0, %2, %3" \
: "=r" ((USItype) (sh)), \
"=&r" ((USItype) (sl)) \
......@@ -94,18 +94,18 @@
"rI" ((USItype) (bl)))
#define umul_ppmm(xh, xl, a, b) \
{register USItype __t0, __t1, __t2; \
__asm__ ("%@ Inlined umul_ppmm
mov %2, %5, lsr #16
mov %0, %6, lsr #16
bic %3, %5, %2, lsl #16
bic %4, %6, %0, lsl #16
mul %1, %3, %4
mul %4, %2, %4
mul %3, %0, %3
mul %0, %2, %0
adds %3, %4, %3
addcs %0, %0, #65536
adds %1, %1, %3, lsl #16
__asm__ ("%@ Inlined umul_ppmm \n\
mov %2, %5, lsr #16 \n\
mov %0, %6, lsr #16 \n\
bic %3, %5, %2, lsl #16 \n\
bic %4, %6, %0, lsl #16 \n\
mul %1, %3, %4 \n\
mul %4, %2, %4 \n\
mul %3, %0, %3 \n\
mul %0, %2, %0 \n\
adds %3, %4, %3 \n\
addcs %0, %0, #65536 \n\
adds %1, %1, %3, lsl #16 \n\
adc %0, %0, %3, lsr #16" \
: "=&r" ((USItype) (xh)), \
"=r" ((USItype) (xl)), \
......
arch/arm/lib/muldi3.c
View file @ 4bce4b2a
......@@ -33,18 +33,18 @@ Boston, MA 02111-1307, USA. */
#define umul_ppmm(xh, xl, a, b) \
{register USItype __t0, __t1, __t2; \
__asm__ ("%@ Inlined umul_ppmm
mov %2, %5, lsr #16
mov %0, %6, lsr #16
bic %3, %5, %2, lsl #16
bic %4, %6, %0, lsl #16
mul %1, %3, %4
mul %4, %2, %4
mul %3, %0, %3
mul %0, %2, %0
adds %3, %4, %3
addcs %0, %0, #65536
adds %1, %1, %3, lsl #16
__asm__ ("%@ Inlined umul_ppmm \n\
mov %2, %5, lsr #16 \n\
mov %0, %6, lsr #16 \n\
bic %3, %5, %2, lsl #16 \n\
bic %4, %6, %0, lsl #16 \n\
mul %1, %3, %4 \n\
mul %4, %2, %4 \n\
mul %3, %0, %3 \n\
mul %0, %2, %0 \n\
adds %3, %4, %3 \n\
addcs %0, %0, #65536 \n\
adds %1, %1, %3, lsl #16 \n\
adc %0, %0, %3, lsr #16" \
: "=&r" ((USItype) (xh)), \
"=r" ((USItype) (xl)), \
......
arch/arm/mach-footbridge/cats-pci.c
View file @ 4bce4b2a
......@@ -11,6 +11,7 @@
#include <asm/irq.h>
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
/* cats host-specific stuff */
static int irqmap_cats[] __initdata = { IRQ_PCI, IRQ_IN0, IRQ_IN1, IRQ_IN3 };
......@@ -34,7 +35,7 @@ static int __init cats_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
* why not the standard PCI swizzle? does this prevent 4-port tulip
* cards being used (ie, pci-pci bridge based cards)?
*/
struct hw_pci cats_pci __initdata = {
static struct hw_pci cats_pci __initdata = {
swizzle: NULL,
map_irq: cats_map_irq,
nr_controllers: 1,
......@@ -43,3 +44,12 @@ struct hw_pci cats_pci __initdata = {
preinit: dc21285_preinit,
postinit: dc21285_postinit,
};
static int cats_pci_init(void)
{
if (machine_is_cats())
pci_common_init(&cats_pci);
return 0;
}
subsys_initcall(cats_pci_init);
arch/arm/mach-footbridge/dc21285.c
View file @ 4bce4b2a
/*
* linux/arch/arm/kernel/dec21285.c: PCI functions for DC21285
*
* Copyright (C) 1998-2000 Russell King, Phil Blundell
* Copyright (C) 1998-2001 Russell King
* Copyright (C) 1998-2000 Phil Blundell
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
......@@ -261,31 +262,45 @@ static void dc21285_parity_irq(int irq, void *dev_id, struct pt_regs *regs)
add_timer(timer);
}
void __init dc21285_setup_resources(struct resource **resource)
int __init dc21285_setup(int nr, struct pci_sys_data *sys)
{
struct resource *busmem, *busmempf;
struct resource *res;
busmem = kmalloc(sizeof(*busmem), GFP_KERNEL);
busmempf = kmalloc(sizeof(*busmempf), GFP_KERNEL);
memset(busmem, 0, sizeof(*busmem));
memset(busmempf, 0, sizeof(*busmempf));
if (nr || !footbridge_cfn_mode())
return 0;
busmem->flags = IORESOURCE_MEM;
busmem->name = "Footbridge non-prefetch";
busmempf->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
busmempf->name = "Footbridge prefetch";
res = kmalloc(sizeof(struct resource) * 2, GFP_KERNEL);
if (!res) {
printk("out of memory for root bus resources");
return 0;
}
memset(res, 0, sizeof(struct resource) * 2);
allocate_resource(&iomem_resource, busmempf, 0x20000000,
0x80000000, 0xffffffff, 0x20000000, NULL, NULL);
allocate_resource(&iomem_resource, busmem, 0x40000000,
res[0].flags = IORESOURCE_MEM;
res[0].name = "Footbridge non-prefetch";
res[1].flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
res[1].name = "Footbridge prefetch";
allocate_resource(&iomem_resource, &res[1], 0x20000000,
0xa0000000, 0xffffffff, 0x20000000, NULL, NULL);
allocate_resource(&iomem_resource, &res[0], 0x40000000,
0x80000000, 0xffffffff, 0x40000000, NULL, NULL);
resource[0] = &ioport_resource;
resource[1] = busmem;
resource[2] = busmempf;
sys->resource[0] = &ioport_resource;
sys->resource[1] = &res[0];
sys->resource[2] = &res[1];
sys->mem_offset = DC21285_PCI_MEM;
return 1;
}
struct pci_bus * __init dc21285_scan_bus(int nr, struct pci_sys_data *sys)
{
return pci_scan_bus(0, &dc21285_ops, sys);
}
void __init dc21285_init(void *sysdata)
void __init dc21285_preinit(void)
{
unsigned int mem_size, mem_mask;
int cfn_mode;
......@@ -313,17 +328,13 @@ void __init dc21285_init(void *sysdata)
"central function" : "addin");
if (cfn_mode) {
static struct resource csrmem, csrio;
static struct resource csrio;
csrio.flags = IORESOURCE_IO;
csrio.name = "Footbridge";
csrmem.flags = IORESOURCE_MEM;
csrmem.name = "Footbridge";
allocate_resource(&ioport_resource, &csrio, 128,
0xff00, 0xffff, 128, NULL, NULL);
allocate_resource(&iomem_resource, &csrmem, 128,
0xf4000000, 0xf8000000, 128, NULL, NULL);
/*
* Map our SDRAM at a known address in PCI space, just in case
......@@ -331,22 +342,12 @@ void __init dc21285_init(void *sysdata)
* necessary, since some VGA cards forcefully use PCI addresses
* in the range 0x000a0000 to 0x000c0000. (eg, S3 cards).
*/
*CSR_PCICSRBASE = csrmem.start;
*CSR_PCICSRBASE = 0xf4000000;
*CSR_PCICSRIOBASE = csrio.start;
*CSR_PCISDRAMBASE = __virt_to_bus(PAGE_OFFSET);
*CSR_PCIROMBASE = 0;
*CSR_PCICMD = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
PCI_COMMAND_INVALIDATE | PCICMD_ERROR_BITS;
pci_scan_bus(0, &dc21285_ops, sysdata);
/*
* Clear any existing errors - we aren't
* interested in historical data...
*/
*CSR_SA110_CNTL = (*CSR_SA110_CNTL & 0xffffde07) |
SA110_CNTL_RXSERR;
*CSR_PCICMD = (*CSR_PCICMD & 0xffff) | PCICMD_ERROR_BITS;
} else if (footbridge_cfn_mode() != 0) {
/*
* If we are not compiled to accept "add-in" mode, then
......@@ -357,6 +358,19 @@ void __init dc21285_init(void *sysdata)
panic("PCI: this kernel is compiled for central "
"function mode only");
}
}
void __init dc21285_postinit(void)
{
if (footbridge_cfn_mode()) {
/*
* Clear any existing errors - we aren't
* interested in historical data...
*/
*CSR_SA110_CNTL = (*CSR_SA110_CNTL & 0xffffde07) |
SA110_CNTL_RXSERR;
*CSR_PCICMD = (*CSR_PCICMD & 0xffff) | PCICMD_ERROR_BITS;
}
/*
* Initialise PCI error IRQ after we've finished probing
......
arch/arm/mach-footbridge/ebsa285-pci.c
View file @ 4bce4b2a
......@@ -11,6 +11,7 @@
#include <asm/irq.h>
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
static int irqmap_ebsa285[] __initdata = { IRQ_IN3, IRQ_IN1, IRQ_IN0, IRQ_PCI };
......@@ -27,7 +28,7 @@ static int __init ebsa285_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
return irqmap_ebsa285[(slot + pin) & 3];
}
struct hw_pci ebsa285_pci __initdata = {
static struct hw_pci ebsa285_pci __initdata = {
swizzle: pci_std_swizzle,
map_irq: ebsa285_map_irq,
nr_controllers: 1,
......@@ -36,3 +37,12 @@ struct hw_pci ebsa285_pci __initdata = {
preinit: dc21285_preinit,
postinit: dc21285_postinit,
};
static int __init ebsa285_init_pci(void)
{
if (machine_is_ebsa285())
pci_common_init(&ebsa285_pci);
return 0;
}
subsys_initcall(ebsa285_init_pci);
arch/arm/mach-footbridge/netwinder-pci.c
View file @ 4bce4b2a
......@@ -11,6 +11,7 @@
#include <asm/irq.h>
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
/*
* We now use the slot ID instead of the device identifiers to select
......@@ -41,7 +42,7 @@ static int __init netwinder_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
}
}
struct hw_pci netwinder_pci __initdata = {
static struct hw_pci netwinder_pci __initdata = {
swizzle: pci_std_swizzle,
map_irq: netwinder_map_irq,
nr_controllers: 1,
......@@ -50,3 +51,12 @@ struct hw_pci netwinder_pci __initdata = {
preinit: dc21285_preinit,
postinit: dc21285_postinit,
};
static int __init netwinder_pci_init(void)
{
if (machine_is_netwinder())
pci_common_init(&netwinder_pci);
return 0;
}
subsys_initcall(netwinder_pci_init);
arch/arm/mach-footbridge/personal-pci.c
View file @ 4bce4b2a
......@@ -11,6 +11,7 @@
#include <asm/irq.h>
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
static int irqmap_personal_server[] __initdata = {
IRQ_IN0, IRQ_IN1, IRQ_IN2, IRQ_IN3, 0, 0, 0,
......@@ -36,7 +37,7 @@ static int __init personal_server_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
return irqmap_personal_server[(line - 1) & 3];
}
struct hw_pci personal_server_pci __initdata = {
static struct hw_pci personal_server_pci __initdata = {
map_irq: personal_server_map_irq,
nr_controllers: 1,
setup: dc21285_setup,
......@@ -44,3 +45,12 @@ struct hw_pci personal_server_pci __initdata = {
preinit: dc21285_preinit,
postinit: dc21285_postinit,
};
static int __init personal_pci_init(void)
{
if (machine_is_personal_server())
pci_common_init(&personal_server_pci);
return 0;
}
subsys_initcall(&personal_pci_init);
arch/arm/mach-ftvpci/pci.c
View file @ 4bce4b2a
......@@ -11,6 +11,7 @@
#include <asm/irq.h>
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
/*
* Owing to a PCB cockup, issue A backplanes are wired thus:
......@@ -43,9 +44,17 @@ static u8 __init ftv_swizzle(struct pci_dev *dev, u8 *pin)
}
/* ftv host-specific stuff */
struct hw_pci ftv_pci __initdata = {
static struct hw_pci ftv_pci __initdata = {
init: plx90x0_init,
swizzle: ftv_swizzle,
map_irq: ftv_map_irq,
};
static int __init ftv_pci_init(void)
{
if (machine_is_ftvpci())
pci_common_init(&ftv_pci);
return 0;
}
subsys_initcall(ftv_pci_init);
arch/arm/mach-integrator/pci.c
View file @ 4bce4b2a
......@@ -31,6 +31,7 @@
#include <asm/irq.h>
#include <asm/system.h>
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
/*
* A small note about bridges and interrupts. The DECchip 21050 (and
......@@ -112,7 +113,7 @@ static int __init integrator_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
extern void pci_v3_init(void *);
struct hw_pci integrator_pci __initdata = {
static struct hw_pci integrator_pci __initdata = {
swizzle: integrator_swizzle,
map_irq: integrator_map_irq,
setup: pci_v3_setup,
......@@ -121,3 +122,12 @@ struct hw_pci integrator_pci __initdata = {
preinit: pci_v3_preinit,
postinit: pci_v3_postinit,
};
static int __init integrator_pci_init(void)
{
if (machine_is_integrator())
pci_common_init(&integrator_pci);
return 0;
}
subsys_initcall(integrator_pci_init);
arch/arm/mach-iop310/iop310-pci.c
View file @ 4bce4b2a
......@@ -452,20 +452,24 @@ int iop310_setup(int nr, struct pci_sys_data *sys)
res[0].start = IOP310_PCIPRI_LOWER_IO + 0x6e000000;
res[0].end = IOP310_PCIPRI_LOWER_IO + 0x6e00ffff;
res[0].name = "PCI IO Primary";
res[0].flags = IORESOURCE_IO;
res[1].start = IOP310_PCIPRI_LOWER_MEM;
res[1].end = IOP310_PCIPRI_LOWER_MEM + IOP310_PCI_WINDOW_SIZE;
res[1].name = "PCI Memory Primary";
res[1].flags = IORESOURCE_MEM;
break;
case 1:
res[0].start = IOP310_PCISEC_LOWER_IO + 0x6e000000;
res[0].end = IOP310_PCISEC_LOWER_IO + 0x6e00ffff;
res[0].name = "PCI IO Secondary";
res[0].flags = IORESOURCE_IO;
res[1].start = IOP310_PCISEC_LOWER_MEM;
res[1].end = IOP310_PCISEC_LOWER_MEM + IOP310_PCI_WINDOW_SIZE;
res[1].name = "PCI Memory Secondary";
res[1].flags = IORESOURCE_MEM;
break;
}
......
arch/arm/mach-iop310/iq80310-pci.c
View file @ 4bce4b2a
......@@ -18,6 +18,7 @@
#include <asm/hardware.h>
#include <asm/irq.h>
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
/*
* The following macro is used to lookup irqs in a standard table
......@@ -140,10 +141,19 @@ static void iq80310_preinit(void)
iop310_init();
}
struct hw_pci iq80310_pci __initdata = {
static struct hw_pci iq80310_pci __initdata = {
swizzle: pci_std_swizzle,
nr_controllers: 2,
setup: iq80310_setup,
scan: iop310_scan_bus,
preinit: iq80310_preinit,
};
static int __init iq80310_pci_init(void)
{
if (machine_is_iq80310())
pci_common_init(&iq80310_pci);
return 0;
}
subsys_initcall(iq80310_pci_init);
arch/arm/mach-rpc/dma.c
View file @ 4bce4b2a
......@@ -33,10 +33,6 @@ typedef enum {
dma_size_32 = 4,
dma_size_128 = 16
} dma_size_t;
typedef struct {
dma_size_t transfersize;
} dma_t;
#endif
#define TRANSFER_SIZE 2
......@@ -48,10 +44,6 @@ typedef struct {
#define CR (IOMD_IO0CR - IOMD_IO0CURA)
#define ST (IOMD_IO0ST - IOMD_IO0CURA)
#define state_prog_a 0
#define state_wait_a 1
#define state_wait_b 2
static void iomd_get_next_sg(struct scatterlist *sg, dma_t *dma)
{
unsigned long end, offset, flags = 0;
......@@ -91,76 +83,40 @@ static void iomd_get_next_sg(struct scatterlist *sg, dma_t *dma)
sg->length |= flags;
}
static inline void iomd_setup_dma_a(struct scatterlist *sg, dma_t *dma)
{
iomd_writel(sg->dma_address, dma->dma_base + CURA);
iomd_writel(sg->length, dma->dma_base + ENDA);
}
static inline void iomd_setup_dma_b(struct scatterlist *sg, dma_t *dma)
{
iomd_writel(sg->dma_address, dma->dma_base + CURB);
iomd_writel(sg->length, dma->dma_base + ENDB);
}
static void iomd_dma_handle(int irq, void *dev_id, struct pt_regs *regs)
{
dma_t *dma = (dma_t *)dev_id;
unsigned int status = 0, no_buffer = dma->sg == NULL;
unsigned long base = dma->dma_base;
do {
switch (dma->state) {
case state_prog_a:
iomd_get_next_sg(&dma->cur_sg, dma);
iomd_setup_dma_a(&dma->cur_sg, dma);
dma->state = state_wait_a;
case state_wait_a:
status = iomd_readb(dma->dma_base + ST);
switch (status & (DMA_ST_OFL|DMA_ST_INT|DMA_ST_AB)) {
case DMA_ST_OFL|DMA_ST_INT:
iomd_get_next_sg(&dma->cur_sg, dma);
iomd_setup_dma_a(&dma->cur_sg, dma);
break;
case DMA_ST_INT:
iomd_get_next_sg(&dma->cur_sg, dma);
iomd_setup_dma_b(&dma->cur_sg, dma);
dma->state = state_wait_b;
break;
case DMA_ST_OFL|DMA_ST_INT|DMA_ST_AB:
iomd_setup_dma_b(&dma->cur_sg, dma);
dma->state = state_wait_b;
break;
}
unsigned int status;
status = iomd_readb(base + ST);
if (!(status & DMA_ST_INT))
return;
if (status & DMA_ST_OFL && !dma->sg)
break;
case state_wait_b:
status = iomd_readb(dma->dma_base + ST);
switch (status & (DMA_ST_OFL|DMA_ST_INT|DMA_ST_AB)) {
case DMA_ST_OFL|DMA_ST_INT|DMA_ST_AB:
iomd_get_next_sg(&dma->cur_sg, dma);
iomd_setup_dma_b(&dma->cur_sg, dma);
break;
case DMA_ST_INT|DMA_ST_AB:
iomd_get_next_sg(&dma->cur_sg, dma);
iomd_setup_dma_a(&dma->cur_sg, dma);
dma->state = state_wait_a;
break;
case DMA_ST_OFL|DMA_ST_INT:
iomd_setup_dma_a(&dma->cur_sg, dma);
dma->state = state_wait_a;
break;
}
iomd_get_next_sg(&dma->cur_sg, dma);
switch (status & (DMA_ST_OFL | DMA_ST_AB)) {
case DMA_ST_OFL: /* OIA */
case DMA_ST_AB: /* .IB */
iomd_writel(dma->cur_sg.dma_address, base + CURA);
iomd_writel(dma->cur_sg.length, base + ENDA);
break;
case DMA_ST_OFL | DMA_ST_AB: /* OIB */
case 0: /* .IA */
iomd_writel(dma->cur_sg.dma_address, base + CURB);
iomd_writel(dma->cur_sg.length, base + ENDB);
break;
}
} while (dma->sg && (status & DMA_ST_INT));
} while (1);
if (no_buffer)
disable_irq(irq);
iomd_writeb(0, dma->dma_base + CR);
disable_irq(irq);
}
static int iomd_request_dma(dmach_t channel, dma_t *dma)
......@@ -194,7 +150,6 @@ static void iomd_enable_dma(dmach_t channel, dma_t *dma)
}
iomd_writeb(DMA_CR_C, dma_base + CR);
dma->state = state_prog_a;
}
if (dma->dma_mode == DMA_MODE_READ)
......@@ -207,11 +162,15 @@ static void iomd_enable_dma(dmach_t channel, dma_t *dma)
static void iomd_disable_dma(dmach_t channel, dma_t *dma)
{
unsigned long dma_base = dma->dma_base;
unsigned long flags;
unsigned int ctrl;
disable_irq(dma->dma_irq);
local_irq_save(flags);
ctrl = iomd_readb(dma_base + CR);
if (ctrl & DMA_CR_E)
disable_irq(dma->dma_irq);
iomd_writeb(ctrl & ~DMA_CR_E, dma_base + CR);
local_irq_restore(flags);
}
static int iomd_set_dma_speed(dmach_t channel, dma_t *dma, int cycle)
......
arch/arm/mach-sa1100/badge4.c
View file @ 4bce4b2a
......@@ -16,6 +16,7 @@
#include <linux/module.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/device.h>
#include <linux/delay.h>
#include <linux/tty.h>
#include <linux/errno.h>
......
arch/arm/mach-shark/pci.c
View file @ 4bce4b2a
......@@ -11,6 +11,7 @@
#include <asm/irq.h>
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
static int __init shark_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
......@@ -22,7 +23,7 @@ static int __init shark_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
extern void __init via82c505_preinit(void *sysdata);
struct hw_pci shark_pci __initdata = {
static struct hw_pci shark_pci __initdata = {
setup: via82c505_setup,
swizzle: pci_std_swizzle,
map_irq: shark_map_irq,
......@@ -30,3 +31,12 @@ struct hw_pci shark_pci __initdata = {
scan: via82c505_scan_bus,
preinit: via82c505_preinit
};
static int __init shark_pci_init(void)
{
if (machine_is_shark())
pci_common_init(&shark_pci);
return 0;
}
subsys_initcall(shark_pci_init);
arch/arm/mm/abort-lv4t.S
View file @ 4bce4b2a
......@@ -66,8 +66,8 @@ ENTRY(v4t_late_abort)
add r6, r6, r2, lsr #3
add r6, r6, r6, lsr #8
add r6, r6, r6, lsr #4
and r6, r6, #15 @ r7 = no. of registers to transfer.
and r5, r8, #15 << 16 @ Extract 'n' form instruction
and r6, r6, #15 @ r6 = no. of registers to transfer.
and r5, r8, #15 << 16 @ Extract 'n' from instruction
ldr r7, [sp, r5, lsr #14] @ Get register 'Rn'
tst r8, #1 << 23 @ Check U bit
subne r7, r7, r6, lsl #2 @ Undo increment
......
arch/arm/mm/fault-common.c
View file @ 4bce4b2a
......@@ -339,8 +339,7 @@ int do_page_fault(unsigned long addr, int error_code, struct pt_regs *regs)
int do_translation_fault(unsigned long addr, int error_code, struct pt_regs *regs)
{
struct task_struct *tsk;
struct mm_struct *mm;
int offset;
unsigned int offset;
pgd_t *pgd, *pgd_k;
pmd_t *pmd, *pmd_k;
......@@ -349,16 +348,17 @@ int do_translation_fault(unsigned long addr, int error_code, struct pt_regs *reg
offset = __pgd_offset(addr);
/*
* FIXME: CP15 C1 is write only on ARMv3 architectures.
*/
pgd = cpu_get_pgd() + offset;
pgd_k = init_mm.pgd + offset;
if (pgd_none(*pgd_k))
goto bad_area;
#if 0 /* note that we are two-level */
if (!pgd_present(*pgd))
set_pgd(pgd, *pgd_k);
#endif
pmd_k = pmd_offset(pgd_k, addr);
pmd = pmd_offset(pgd, addr);
......@@ -371,8 +371,7 @@ int do_translation_fault(unsigned long addr, int error_code, struct pt_regs *reg
bad_area:
tsk = current;
mm = tsk->active_mm;
do_bad_area(tsk, mm, addr, error_code, regs);
do_bad_area(tsk, tsk->active_mm, addr, error_code, regs);
return 0;
}
arch/arm/mm/init.c
View file @ 4bce4b2a
......@@ -243,6 +243,7 @@ find_memend_and_nodes(struct meminfo *mi, struct node_info *np)
* also get rid of some of the stuff above as well.
*/
max_low_pfn = memend_pfn - O_PFN_DOWN(PHYS_OFFSET);
max_pfn = memend_pfn - O_PFN_DOWN(PHYS_OFFSET);
mi->end = memend_pfn << PAGE_SHIFT;
return bootmem_pages;
......
arch/arm/nwfpe/softfloat.c
View file @ 4bce4b2a
......@@ -184,9 +184,9 @@ INLINE float32 packFloat32( flag zSign, int16 zExp, bits32 zSig )
{
#if 0
float32 f;
__asm__("@ packFloat32;
mov %0, %1, asl #31;
orr %0, %2, asl #23;
__asm__("@ packFloat32; \n\
mov %0, %1, asl #31; \n\
orr %0, %2, asl #23; \n\
orr %0, %3"
: /* no outputs */
: "g" (f), "g" (zSign), "g" (zExp), "g" (zSig)
......
arch/arm/tools/mach-types
View file @ 4bce4b2a
......@@ -6,7 +6,7 @@
# To add an entry into this database, please see Documentation/arm/README,
# or contact rmk@arm.linux.org.uk
#
# Last update: Fri Mar 29 15:51:20 2002
# Last update: Tue May 21 14:19:05 2002
#
# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
#
......@@ -149,7 +149,7 @@ h3800 SA1100_H3800 H3800 137
blue_v1 ARCH_BLUE_V1 BLUE_V1 138
pxa_cerf ARCH_PXA_CERF PXA_CERF 139
arm7tevb ARCH_ARM7TEVB ARM7TEVB 140
d7400 ARCH_D7400 D7400 141
d7400 SA1100_D7400 D7400 141
piranha ARCH_PIRANHA PIRANHA 142
sbcamelot SA1100_SBCAMELOT SBCAMELOT 143
kings SA1100_KINGS KINGS 144
......@@ -180,3 +180,15 @@ active SA1100_ACTIVE ACTIVE 168
iq80321 ARCH_IQ80321 IQ80321 169
wid SA1100_WID WID 170
sabinal ARCH_SABINAL SABINAL 171
ixp425_matacumbe ARCH_IXP425_MATACUMBE IXP425_MATACUMBE 172
miniprint SA1100_MINIPRINT MINIPRINT 173
adm510x ARCH_ADM510X ADM510X 174
svs200 SA1100_SVS200 SVS200 175
atg_tcu ARCH_ATG_TCU ATG_TCU 176
jornada820 SA1100_JORNADA820 JORNADA820 177
s3c44b0 ARCH_S3C44B0 S3C44B0 178
margis2 ARCH_MARGIS2 MARGIS2 179
ks8695 ARCH_KS8695 KS8695 180
brh ARCH_BRH BRH 181
s3c2410 ARCH_S3C2410 S3C2410 182
possio_px30 ARCH_POSSIO_PX30 POSSIO_PX30 183
drivers/acorn/char/mouse_rpc.c
View file @ 4bce4b2a
......@@ -17,6 +17,7 @@
#include <linux/ptrace.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <asm/hardware.h>
#include <asm/irq.h>
......
drivers/acorn/net/etherh.c
View file @ 4bce4b2a
......@@ -66,6 +66,7 @@ static const card_ids __init etherh_cids[] = {
};
struct etherh_priv {
struct ei_device eidev;
unsigned int id;
unsigned int ctrl_port;
unsigned int ctrl;
......@@ -150,8 +151,8 @@ static expansioncard_ops_t etherh_ops = {
static void
etherh_setif(struct net_device *dev)
{
struct ei_device *ei_local = (struct ei_device *) dev->priv;
struct etherh_priv *eh = (struct etherh_priv *)dev->rmem_start;
struct etherh_priv *eh = (struct etherh_priv *)dev->priv;
struct ei_device *ei_local = &eh->eidev;
unsigned long addr, flags;
local_irq_save(flags);
......@@ -194,8 +195,8 @@ etherh_setif(struct net_device *dev)
static int
etherh_getifstat(struct net_device *dev)
{
struct ei_device *ei_local = (struct ei_device *) dev->priv;
struct etherh_priv *eh = (struct etherh_priv *)dev->rmem_start;
struct etherh_priv *eh = (struct etherh_priv *)dev->priv;
struct ei_device *ei_local = &eh->eidev;
int stat = 0;
switch (eh->id) {
......@@ -560,6 +561,9 @@ static struct net_device * __init etherh_init_one(struct expansion_card *ec)
if (!eh)
goto out_nopriv;
memset(eh, 0, sizeof(struct etherh_priv));
spin_lock_init(&eh->eidev.page_lock);
SET_MODULE_OWNER(dev);
dev->open = etherh_open;
......@@ -567,7 +571,7 @@ static struct net_device * __init etherh_init_one(struct expansion_card *ec)
dev->set_config = etherh_set_config;
dev->irq = ec->irq;
dev->base_addr = ecard_address(ec, ECARD_MEMC, 0);
dev->rmem_start = (unsigned long)eh;
dev->priv = eh;
/*
* IRQ and control port handling
......
drivers/acorn/scsi/acornscsi.c
View file @ 4bce4b2a
......@@ -157,6 +157,7 @@
#include "../../scsi/constants.h"
#include "acornscsi.h"
#include "msgqueue.h"
#include "scsi.h"
#include <scsi/scsicam.h>
......@@ -902,17 +903,8 @@ void acornscsi_data_updateptr(AS_Host *host, Scsi_Pointer *SCp, unsigned int len
SCp->ptr += length;
SCp->this_residual -= length;
if (!SCp->this_residual) {
if (SCp->buffers_residual) {
SCp->buffer++;
SCp->buffers_residual--;
SCp->ptr = (char *)SCp->buffer->address;
SCp->this_residual = SCp->buffer->length;
} else {
SCp->ptr = NULL;
host->dma.xfer_done = 1;
}
}
if (SCp->this_residual == 0 && next_SCp(SCp) == 0)
host->dma.xfer_done = 1;
}
/*
......@@ -2558,20 +2550,8 @@ int acornscsi_queuecmd(Scsi_Cmnd *SCpnt, void (*done)(Scsi_Cmnd *))
SCpnt->SCp.phase = (int)acornscsi_datadirection(SCpnt->cmnd[0]);
SCpnt->SCp.sent_command = 0;
SCpnt->SCp.scsi_xferred = 0;
SCpnt->SCp.Status = 0;
SCpnt->SCp.Message = 0;
if (SCpnt->use_sg) {
SCpnt->SCp.buffer = (struct scatterlist *) SCpnt->buffer;
SCpnt->SCp.buffers_residual = SCpnt->use_sg - 1;
SCpnt->SCp.ptr = (char *) SCpnt->SCp.buffer->address;
SCpnt->SCp.this_residual = SCpnt->SCp.buffer->length;
} else {
SCpnt->SCp.buffer = NULL;
SCpnt->SCp.buffers_residual = 0;
SCpnt->SCp.ptr = (char *) SCpnt->request_buffer;
SCpnt->SCp.this_residual = SCpnt->request_bufflen;
}
init_SCp(SCpnt);
host->stats.queues += 1;
......
drivers/acorn/scsi/cumana_2.c
View file @ 4bce4b2a
......@@ -38,6 +38,7 @@
#include "../../scsi/sd.h"
#include "../../scsi/hosts.h"
#include "fas216.h"
#include "scsi.h"
#include <scsi/scsicam.h>
......@@ -188,15 +189,9 @@ cumanascsi_2_dma_setup(struct Scsi_Host *host, Scsi_Pointer *SCp,
if (dmach != NO_DMA &&
(min_type == fasdma_real_all || SCp->this_residual >= 512)) {
int bufs = SCp->buffers_residual;
int pci_dir, dma_dir, alatch_dir;
if (bufs)
memcpy(info->sg + 1, SCp->buffer + 1,
sizeof(struct scatterlist) * bufs);
info->sg[0].address = SCp->ptr;
info->sg[0].page = NULL;
info->sg[0].length = SCp->this_residual;
int bufs, pci_dir, dma_dir, alatch_dir;
bufs = copy_SCp_to_sg(&info->sg[0], SCp, NR_SG);
if (direction == DMA_OUT)
pci_dir = PCI_DMA_TODEVICE,
......
drivers/acorn/scsi/eesox.c
View file @ 4bce4b2a
......@@ -44,6 +44,7 @@
#include "../../scsi/sd.h"
#include "../../scsi/hosts.h"
#include "fas216.h"
#include "scsi.h"
#include <scsi/scsicam.h>
......@@ -192,15 +193,9 @@ eesoxscsi_dma_setup(struct Scsi_Host *host, Scsi_Pointer *SCp,
if (dmach != NO_DMA &&
(min_type == fasdma_real_all || SCp->this_residual >= 512)) {
int bufs = SCp->buffers_residual;
int pci_dir, dma_dir;
if (bufs)
memcpy(info->sg + 1, SCp->buffer + 1,
sizeof(struct scatterlist) * bufs);
info->sg[0].address = SCp->ptr;
info->sg[0].page = NULL;
info->sg[0].length = SCp->this_residual;
int bufs, pci_dir, dma_dir;
bufs = copy_SCp_to_sg(&info->sg[0], SCp, NR_SG);
if (direction == DMA_OUT)
pci_dir = PCI_DMA_TODEVICE,
......
drivers/acorn/scsi/fas216.c
View file @ 4bce4b2a
......@@ -59,6 +59,7 @@
#include "../../scsi/scsi.h"
#include "../../scsi/hosts.h"
#include "fas216.h"
#include "scsi.h"
#define VER_MAJOR 0
#define VER_MINOR 0
......@@ -588,38 +589,32 @@ fas216_handlewide(FAS216_Info *info, char *msg)
static void
fas216_updateptrs(FAS216_Info *info, int bytes_transferred)
{
unsigned char *ptr;
unsigned int residual;
Scsi_Pointer *SCp = &info->scsi.SCp;
fas216_checkmagic(info);
ptr = info->scsi.SCp.ptr;
residual = info->scsi.SCp.this_residual;
info->SCpnt->request_bufflen -= bytes_transferred;
while (residual <= bytes_transferred && bytes_transferred) {
/* We have used up this buffer */
bytes_transferred -= residual;
if (info->scsi.SCp.buffers_residual) {
info->scsi.SCp.buffer++;
info->scsi.SCp.buffers_residual--;
ptr = (unsigned char *)info->scsi.SCp.buffer->address;
residual = info->scsi.SCp.buffer->length;
} else {
ptr = NULL;
residual = 0;
while (bytes_transferred != 0) {
if (SCp->this_residual > bytes_transferred)
break;
/*
* We have used up this buffer. Move on to the
* next buffer.
*/
bytes_transferred -= SCp->this_residual;
if (!next_SCp(&info->scsi.SCp)) {
printk(KERN_WARNING "scsi%d.%c: out of buffers\n",
info->host->host_no, '0' + info->SCpnt->target);
return;
}
}
residual -= bytes_transferred;
ptr += bytes_transferred;
if (residual == 0)
ptr = NULL;
info->scsi.SCp.ptr = ptr;
info->scsi.SCp.this_residual = residual;
SCp->this_residual -= bytes_transferred;
if (SCp->this_residual)
SCp->ptr += bytes_transferred;
else
SCp->ptr = NULL;
}
/* Function: void fas216_pio(FAS216_Info *info, fasdmadir_t direction)
......@@ -631,35 +626,12 @@ fas216_updateptrs(FAS216_Info *info, int bytes_transferred)
static void
fas216_pio(FAS216_Info *info, fasdmadir_t direction)
{
unsigned int residual;
char *ptr;
fas216_checkmagic(info);
residual = info->scsi.SCp.this_residual;
ptr = info->scsi.SCp.ptr;
if (direction == DMA_OUT)
outb(*ptr++, REG_FF(info));
outb(get_next_SCp_byte(&info->scsi.SCp), REG_FF(info));
else
*ptr++ = inb(REG_FF(info));
residual -= 1;
if (residual == 0) {
if (info->scsi.SCp.buffers_residual) {
info->scsi.SCp.buffer++;
info->scsi.SCp.buffers_residual--;
ptr = (unsigned char *)info->scsi.SCp.buffer->address;
residual = info->scsi.SCp.buffer->length;
} else {
ptr = NULL;
residual = 0;
}
}
info->scsi.SCp.ptr = ptr;
info->scsi.SCp.this_residual = residual;
put_next_SCp_byte(&info->scsi.SCp, inb(REG_FF(info)));
}
/* Function: void fas216_starttransfer(FAS216_Info *info,
......@@ -2034,48 +2006,8 @@ int fas216_queue_command(Scsi_Cmnd *SCpnt, void (*done)(Scsi_Cmnd *))
SCpnt->scsi_done = done;
SCpnt->host_scribble = (void *)fas216_std_done;
SCpnt->result = 0;
SCpnt->SCp.Message = 0;
SCpnt->SCp.Status = 0;
if (SCpnt->use_sg) {
unsigned long len = 0;
int buf;
SCpnt->SCp.buffer = (struct scatterlist *) SCpnt->buffer;
SCpnt->SCp.buffers_residual = SCpnt->use_sg - 1;
SCpnt->SCp.ptr = (char *) SCpnt->SCp.buffer->address;
SCpnt->SCp.this_residual = SCpnt->SCp.buffer->length;
/*
* Calculate correct buffer length. Some commands
* come in with the wrong request_bufflen.
*/
for (buf = 0; buf <= SCpnt->SCp.buffers_residual; buf++)
len += SCpnt->SCp.buffer[buf].length;
if (SCpnt->request_bufflen != len)
printk(KERN_WARNING "scsi%d.%c: bad request buffer "
"length %d, should be %ld\n", info->host->host_no,
'0' + SCpnt->target, SCpnt->request_bufflen, len);
SCpnt->request_bufflen = len;
} else {
SCpnt->SCp.buffer = NULL;
SCpnt->SCp.buffers_residual = 0;
SCpnt->SCp.ptr = (unsigned char *)SCpnt->request_buffer;
SCpnt->SCp.this_residual = SCpnt->request_bufflen;
}
/*
* If the upper SCSI layers pass a buffer, but zero length,
* we aren't interested in the buffer pointer.
*/
if (SCpnt->SCp.this_residual == 0 && SCpnt->SCp.ptr) {
#if 0
printk(KERN_WARNING "scsi%d.%c: zero length buffer passed for "
"command ", info->host->host_no, '0' + SCpnt->target);
print_command(SCpnt->cmnd);
#endif
SCpnt->SCp.ptr = NULL;
}
init_SCp(SCpnt);
info->stats.queues += 1;
SCpnt->tag = 0;
......
drivers/acorn/scsi/powertec.c
View file @ 4bce4b2a
......@@ -41,6 +41,7 @@
#include "../../scsi/sd.h"
#include "../../scsi/hosts.h"
#include "fas216.h"
#include "scsi.h"
#include <scsi/scsicam.h>
......@@ -180,15 +181,9 @@ powertecscsi_dma_setup(struct Scsi_Host *host, Scsi_Pointer *SCp,
if (dmach != NO_DMA &&
(min_type == fasdma_real_all || SCp->this_residual >= 512)) {
int bufs = SCp->buffers_residual;
int pci_dir, dma_dir;
if (bufs)
memcpy(info->sg + 1, SCp->buffer + 1,
sizeof(struct scatterlist) * bufs);
info->sg[0].address = SCp->ptr;
info->sg[0].page = NULL;
info->sg[0].length = SCp->this_residual;
int bufs, pci_dir, dma_dir;
bufs = copy_SCp_to_sg(&info->sg[0], SCp, NR_SG);
if (direction == DMA_OUT)
pci_dir = PCI_DMA_TODEVICE,
......
drivers/acorn/scsi/scsi.h 0 → 100644
View file @ 4bce4b2a
/*
* linux/drivers/acorn/scsi/scsi.h
*
* Copyright (C) 2002 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Commonly used scsi driver functions.
*/
#define BELT_AND_BRACES
/*
* The scatter-gather list handling. This contains all
* the yucky stuff that needs to be fixed properly.
*/
static inline int copy_SCp_to_sg(struct scatterlist *sg, Scsi_Pointer *SCp, int max)
{
int bufs = SCp->buffers_residual;
BUG_ON(bufs + 1 > max);
sg->page = virt_to_page(SCp->ptr);
sg->offset = ((unsigned int)SCp->ptr) & ~PAGE_MASK;
sg->length = SCp->this_residual;
if (bufs)
memcpy(sg + 1, SCp->buffer + 1,
sizeof(struct scatterlist) * bufs);
return bufs + 1;
}
static inline int next_SCp(Scsi_Pointer *SCp)
{
int ret = SCp->buffers_residual;
if (ret) {
SCp->buffer++;
SCp->buffers_residual--;
SCp->ptr = (char *)
(page_address(SCp->buffer->page) +
SCp->buffer->offset);
SCp->this_residual = SCp->buffer->length;
} else {
SCp->ptr = NULL;
SCp->this_residual = 0;
}
return ret;
}
static inline unsigned char get_next_SCp_byte(Scsi_Pointer *SCp)
{
char c = SCp->ptr;
SCp->ptr += 1;
SCp->this_residual -= 1;
if (SCp->this_residual == 0)
next_SCp(SCp);
return c;
}
static inline void put_next_SCp_byte(Scsi_Pointer *SCp, unsigned char c)
{
SCp->ptr = c;
SCp->ptr += 1;
SCp->this_residual -= 1;
if (SCp->this_residual == 0)
next_SCp(SCp);
}
static inline void init_SCp(Scsi_Cmnd *SCpnt)
{
SCpnt->SCp.Message = 0;
SCpnt->SCp.Status = 0;
if (SCpnt->use_sg) {
unsigned long len = 0;
int buf;
SCpnt->SCp.buffer = (struct scatterlist *) SCpnt->buffer;
SCpnt->SCp.buffers_residual = SCpnt->use_sg - 1;
SCpnt->SCp.ptr = (char *)
(page_address(SCpnt->SCp.buffer->page) +
SCpnt->SCp.buffer->offset);
SCpnt->SCp.this_residual = SCpnt->SCp.buffer->length;
#ifdef BELT_AND_BRACES
/*
* Calculate correct buffer length. Some commands
* come in with the wrong request_bufflen.
*/
for (buf = 0; buf <= SCpnt->SCp.buffers_residual; buf++)
len += SCpnt->SCp.buffer[buf].length;
if (SCpnt->request_bufflen != len)
printk(KERN_WARNING "scsi%d.%c: bad request buffer "
"length %d, should be %ld\n", SCpnt->host->host_no,
'0' + SCpnt->target, SCpnt->request_bufflen, len);
SCpnt->request_bufflen = len;
#endif
} else {
SCpnt->SCp.buffer = NULL;
SCpnt->SCp.buffers_residual = 0;
SCpnt->SCp.ptr = (unsigned char *)SCpnt->request_buffer;
SCpnt->SCp.this_residual = SCpnt->request_bufflen;
}
/*
* If the upper SCSI layers pass a buffer, but zero length,
* we aren't interested in the buffer pointer.
*/
if (SCpnt->SCp.this_residual == 0 && SCpnt->SCp.ptr) {
#ifdef BELT_AND_BRACES
printk(KERN_WARNING "scsi%d.%c: zero length buffer passed for "
"command ", SCpnt->host->host_no, '0' + SCpnt->target);
print_command(SCpnt->cmnd);
#endif
SCpnt->SCp.ptr = NULL;
}
}
drivers/pcmcia/sa1100_assabet.c
View file @ 4bce4b2a
......@@ -7,6 +7,7 @@
#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <asm/hardware.h>
......
drivers/pcmcia/sa1100_badge4.c
View file @ 4bce4b2a
......@@ -14,6 +14,8 @@
*/
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/device.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <asm/hardware.h>
......@@ -56,7 +58,7 @@
static int badge4_pcmvcc = 50;
static int badge4_pcmvpp = 50;
static int badge4_cfvcc = 0;
static int badge4_cfvcc = 33;
static int badge4_pcmcia_init(struct pcmcia_init *init)
{
......@@ -91,8 +93,6 @@ static void complain_about_jumpering(const char *whom,
given / 10, given % 10);
}
static unsigned badge4_need_5V_bitmap = 0;
static int
badge4_pcmcia_configure_socket(const struct pcmcia_configure *conf)
{
......
drivers/pcmcia/sa1100_generic.c
View file @ 4bce4b2a
......@@ -95,10 +95,11 @@ static struct tq_struct sa1100_pcmcia_task;
* "Expansion Memory (PCMCIA) Configuration Register (MECR)"
* that's section 10.2.5 in _my_ version of the manuial ;)
*/
static int sa1100_pcmcia_default_mecr_timing(unsigned int sock, unsigned int cpu_speed,
unsigned int cmd_time )
static unsigned int
sa1100_pcmcia_default_mecr_timing(unsigned int sock, unsigned int cpu_speed,
unsigned int cmd_time)
{
return sa1100_pcmcia_mecr_bs( cmd_time, cpu_speed );
return sa1100_pcmcia_mecr_bs(cmd_time, cpu_speed);
}
/* sa1100_pcmcia_set_mecr()
......@@ -109,7 +110,7 @@ static int sa1100_pcmcia_default_mecr_timing(unsigned int sock, unsigned int cpu
* Call board specific BS value calculation to allow boards
* to tweak the BS values.
*/
static int sa1100_pcmcia_set_mecr( int sock )
static int sa1100_pcmcia_set_mecr(int sock)
{
struct sa1100_pcmcia_socket *skt;
u32 mecr;
......@@ -117,15 +118,15 @@ static int sa1100_pcmcia_set_mecr( int sock )
long flags;
unsigned int bs;
if ( sock<0 || sock>SA1100_PCMCIA_MAX_SOCK )
if (sock < 0 || sock > SA1100_PCMCIA_MAX_SOCK)
return -1;
skt = PCMCIA_SOCKET( sock );
skt = PCMCIA_SOCKET(sock);
local_irq_save(flags);
clock = cpufreq_get(0);
bs = pcmcia_low_level->socket_get_timing( sock, clock, skt->speed_io);
bs = pcmcia_low_level->socket_get_timing(sock, clock, skt->speed_io);
mecr = MECR;
MECR_FAST_SET(mecr, sock, 0);
......@@ -136,10 +137,10 @@ static int sa1100_pcmcia_set_mecr( int sock )
local_irq_restore(flags);
DEBUG(4, "%s(): FAST%u %lx BSM%u %lx BSA%u %lx BSIO%u %lx\n",
__FUNCTION__, sock, MECR_FAST_GET(mecr, sock), sock,
MECR_BSM_GET(mecr, sock), sock, MECR_BSA_GET(mecr, sock),
sock, MECR_BSIO_GET(mecr, sock));
DEBUG(4, "%s(): FAST%u %lx BSM%u %lx BSA%u %lx BSIO%u %lx\n",
__FUNCTION__, sock, MECR_FAST_GET(mecr, sock), sock,
MECR_BSM_GET(mecr, sock), sock, MECR_BSA_GET(mecr, sock),
sock, MECR_BSIO_GET(mecr, sock));
return 0;
}
......@@ -882,11 +883,11 @@ static struct pccard_operations sa1100_pcmcia_operations = {
*/
static void sa1100_pcmcia_update_mecr(unsigned int clock)
{
unsigned int sock;
unsigned int sock;
for (sock = 0; sock < SA1100_PCMCIA_MAX_SOCK; ++sock) {
sa1100_pcmcia_set_mecr( sock );
}
for (sock = 0; sock < SA1100_PCMCIA_MAX_SOCK; ++sock) {
sa1100_pcmcia_set_mecr(sock);
}
}
/* sa1100_pcmcia_notifier()
......
drivers/pcmcia/sa1100_generic.h
View file @ 4bce4b2a
......@@ -73,8 +73,8 @@ struct pcmcia_low_level {
/*
* Calculate MECR timing clock wait states
*/
int (*socket_get_timing)(unsigned int sock, unsigned int cpu_speed,
unsigned int cmd_time );
unsigned int (*socket_get_timing)(unsigned int sock,
unsigned int cpu_speed, unsigned int cmd_time);
};
extern int sa1100_register_pcmcia(struct pcmcia_low_level *);
......
drivers/pcmcia/sa1100_neponset.c
View file @ 4bce4b2a
......@@ -5,6 +5,8 @@
*/
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/device.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <asm/hardware.h>
......@@ -133,7 +135,7 @@ int __init pcmcia_neponset_init(void)
{
int ret = -ENODEV;
if (machine_is_assabet() && machine_has_neponset())
if (machine_is_assabet() && sa1111)
ret = sa1100_register_pcmcia(&neponset_pcmcia_ops);
return ret;
......
drivers/pcmcia/sa1111_generic.c
View file @ 4bce4b2a
......@@ -8,6 +8,7 @@
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/ioport.h>
#include <linux/device.h>
#include <asm/hardware.h>
#include <asm/hardware/sa1111.h>
......
drivers/video/acornfb.c
View file @ 4bce4b2a
......@@ -601,13 +601,13 @@ acornfb_adjust_timing(struct fb_var_screeninfo *var, int con)
/* Find int 'y', such that y * fll == s * sam < maxsize
* y = s * sam / fll; s = maxsize / sam
*/
for (size = current_par.screen_size; min_size <= size;
for (size = current_par.screen_size;
nr_y = size / font_line_len, min_size <= size;
size -= sam_size) {
nr_y = size / font_line_len;
if (nr_y * font_line_len == size)
break;
}
nr_y *= fontht;
if (var->accel_flags & FB_ACCELF_TEXT) {
if (min_size > size) {
......@@ -617,8 +617,9 @@ acornfb_adjust_timing(struct fb_var_screeninfo *var, int con)
size = current_par.screen_size;
var->yres_virtual = size / (font_line_len / fontht);
} else
var->yres_virtual = nr_y * fontht;
}
var->yres_virtual = nr_y;
} else if (var->yres_virtual > nr_y)
var->yres_virtual = nr_y;
current_par.screen_end = current_par.screen_base_p + size;
......@@ -1100,6 +1101,41 @@ acornfb_pan_display(struct fb_var_screeninfo *var, int con,
return 0;
}
static int
acornfb_blank(int blank, struct fb_info *info)
{
union palette p;
int i, bpp = fb_display[info->currcon].var.bits_per_pixel;
#ifdef FBCON_HAS_CFB16
if (bpp == 16) {
p.p = 0;
for (i = 0; i < 256; i++) {
if (blank)
p = acornfb_palette_encode(i, 0, 0, 0, 0);
else {
p.vidc20.red = current_par.palette[ i & 31].vidc20.red;
p.vidc20.green = current_par.palette[(i >> 1) & 31].vidc20.green;
p.vidc20.blue = current_par.palette[(i >> 2) & 31].vidc20.blue;
}
acornfb_palette_write(i, current_par.palette[i]);
}
} else
#endif
{
for (i = 0; i < current_par.palette_size; i++) {
if (blank)
p = acornfb_palette_encode(i, 0, 0, 0, 0);
else
p = current_par.palette[i];
acornfb_palette_write(i, p);
}
}
return 0;
}
/*
* Note that we are entered with the kernel locked.
*/
......@@ -1146,7 +1182,7 @@ static struct fb_ops acornfb_ops = {
fb_set_var: acornfb_set_var,
fb_get_cmap: acornfb_get_cmap,
fb_set_cmap: gen_set_cmap,
fb_set_colreg: acornfb_setcolreg,
fb_setcolreg: acornfb_setcolreg,
fb_pan_display: acornfb_pan_display,
fb_blank: acornfb_blank,
fb_mmap: acornfb_mmap,
......@@ -1182,41 +1218,6 @@ acornfb_switch(int con, struct fb_info *info)
return 0;
}
static int
acornfb_blank(int blank, struct fb_info *info)
{
union palette p;
int i, bpp = fb_display[info->currcon].var.bits_per_pixel;
#ifdef FBCON_HAS_CFB16
if (bpp == 16) {
p.p = 0;
for (i = 0; i < 256; i++) {
if (blank)
p = acornfb_palette_encode(i, 0, 0, 0, 0);
else {
p.vidc20.red = current_par.palette[ i & 31].vidc20.red;
p.vidc20.green = current_par.palette[(i >> 1) & 31].vidc20.green;
p.vidc20.blue = current_par.palette[(i >> 2) & 31].vidc20.blue;
}
acornfb_palette_write(i, current_par.palette[i]);
}
} else
#endif
{
for (i = 0; i < current_par.palette_size; i++) {
if (blank)
p = acornfb_palette_encode(i, 0, 0, 0, 0);
else
p = current_par.palette[i];
acornfb_palette_write(i, p);
}
}
return 0;
}
/*
* Everything after here is initialisation!!!
*/
......
drivers/video/clps711xfb.c
View file @ 4bce4b2a
......@@ -211,6 +211,53 @@ clps7111fb_set_var(struct fb_var_screeninfo *var, int con,
return 0;
}
static int clps7111fb_blank(int blank, struct fb_info *info)
{
if (blank) {
if (machine_is_edb7211()) {
int i;
/* Turn off the LCD backlight. */
clps_writeb(clps_readb(PDDR) & ~EDB_PD3_LCDBL, PDDR);
/* Power off the LCD DC-DC converter. */
clps_writeb(clps_readb(PDDR) & ~EDB_PD1_LCD_DC_DC_EN, PDDR);
/* Delay for a little while (half a second). */
for (i=0; i<65536*4; i++);
/* Power off the LCD panel. */
clps_writeb(clps_readb(PDDR) & ~EDB_PD2_LCDEN, PDDR);
/* Power off the LCD controller. */
clps_writel(clps_readl(SYSCON1) & ~SYSCON1_LCDEN,
SYSCON1);
}
} else {
if (machine_is_edb7211()) {
int i;
/* Power up the LCD controller. */
clps_writel(clps_readl(SYSCON1) | SYSCON1_LCDEN,
SYSCON1);
/* Power up the LCD panel. */
clps_writeb(clps_readb(PDDR) | EDB_PD2_LCDEN, PDDR);
/* Delay for a little while. */
for (i=0; i<65536*4; i++);
/* Power up the LCD DC-DC converter. */
clps_writeb(clps_readb(PDDR) | EDB_PD1_LCD_DC_DC_EN,
PDDR);
/* Turn on the LCD backlight. */
clps_writeb(clps_readb(PDDR) | EDB_PD3_LCDBL, PDDR);
}
}
return 0;
}
static struct fb_ops clps7111fb_ops = {
owner: THIS_MODULE,
fb_set_var: clps7111fb_set_var,
......@@ -266,53 +313,6 @@ static int clps7111fb_updatevar(int con, struct fb_info *info)
return -EINVAL;
}
static int clps7111fb_blank(int blank, struct fb_info *info)
{
if (blank) {
if (machine_is_edb7211()) {
int i;
/* Turn off the LCD backlight. */
clps_writeb(clps_readb(PDDR) & ~EDB_PD3_LCDBL, PDDR);
/* Power off the LCD DC-DC converter. */
clps_writeb(clps_readb(PDDR) & ~EDB_PD1_LCD_DC_DC_EN, PDDR);
/* Delay for a little while (half a second). */
for (i=0; i<65536*4; i++);
/* Power off the LCD panel. */
clps_writeb(clps_readb(PDDR) & ~EDB_PD2_LCDEN, PDDR);
/* Power off the LCD controller. */
clps_writel(clps_readl(SYSCON1) & ~SYSCON1_LCDEN,
SYSCON1);
}
} else {
if (machine_is_edb7211()) {
int i;
/* Power up the LCD controller. */
clps_writel(clps_readl(SYSCON1) | SYSCON1_LCDEN,
SYSCON1);
/* Power up the LCD panel. */
clps_writeb(clps_readb(PDDR) | EDB_PD2_LCDEN, PDDR);
/* Delay for a little while. */
for (i=0; i<65536*4; i++);
/* Power up the LCD DC-DC converter. */
clps_writeb(clps_readb(PDDR) | EDB_PD1_LCD_DC_DC_EN,
PDDR);
/* Turn on the LCD backlight. */
clps_writeb(clps_readb(PDDR) | EDB_PD3_LCDBL, PDDR);
}
}
return 0;
}
static int
clps7111fb_proc_backlight_read(char *page, char **start, off_t off,
int count, int *eof, void *data)
......@@ -430,7 +430,7 @@ int __init clps711xfb_init(void)
clps_writeb(clps_readb(PDDR) | EDB_PD2_LCDEN, PDDR);
/* Delay for a little while. */
for (i=0; i<65536*4; i++);
udelay(100);
/* Power up the LCD DC-DC converter. */
clps_writeb(clps_readb(PDDR) | EDB_PD1_LCD_DC_DC_EN, PDDR);
......@@ -463,3 +463,7 @@ static void __exit clps711xfb_exit(void)
module_init(clps711xfb_init);
#endif
module_exit(clps711xfb_exit);
MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
MODULE_DESCRIPTION("CLPS711x framebuffer driver");
MODULE_LICENSE("GPL");
drivers/video/sa1100fb.c
View file @ 4bce4b2a
......@@ -1258,69 +1258,6 @@ sa1100fb_get_cmap(struct fb_cmap *cmap, int kspc, int con, struct fb_info *info)
return 0;
}
static struct fb_ops sa1100fb_ops = {
owner: THIS_MODULE,
fb_get_fix: sa1100fb_get_fix,
fb_get_var: sa1100fb_get_var,
fb_set_var: sa1100fb_set_var,
fb_get_cmap: sa1100fb_get_cmap,
fb_set_cmap: sa1100fb_set_cmap,
fb_setcolreg: sa1100fb_setcolreg,
fb_blank: sa1100fb_blank,
};
/*
* sa1100fb_switch():
* Change to the specified console. Palette and video mode
* are changed to the console's stored parameters.
*
* Uh oh, this can be called from a tasklet (IRQ)
*/
static int sa1100fb_switch(int con, struct fb_info *info)
{
struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
struct display *disp;
struct fb_cmap *cmap;
DPRINTK("con=%d info->modename=%s\n", con, fbi->fb.modename);
if (con == info->currcon)
return 0;
if (info->currcon >= 0) {
disp = fb_display + info->currcon;
/*
* Save the old colormap and video mode.
*/
disp->var = fbi->fb.var;
if (disp->cmap.len)
fb_copy_cmap(&fbi->fb.cmap, &disp->cmap, 0);
}
info->currcon = con;
disp = fb_display + con;
/*
* Make sure that our colourmap contains 256 entries.
*/
fb_alloc_cmap(&fbi->fb.cmap, 256, 0);
if (disp->cmap.len)
cmap = &disp->cmap;
else
cmap = fb_default_cmap(1 << disp->var.bits_per_pixel);
fb_copy_cmap(cmap, &fbi->fb.cmap, 0);
fbi->fb.var = disp->var;
fbi->fb.var.activate = FB_ACTIVATE_NOW;
sa1100fb_set_var(&fbi->fb.var, con, info);
return 0;
}
/*
* Formal definition of the VESA spec:
* On
......@@ -1388,6 +1325,69 @@ static int sa1100fb_blank(int blank, struct fb_info *info)
return 0;
}
static struct fb_ops sa1100fb_ops = {
owner: THIS_MODULE,
fb_get_fix: sa1100fb_get_fix,
fb_get_var: sa1100fb_get_var,
fb_set_var: sa1100fb_set_var,
fb_get_cmap: sa1100fb_get_cmap,
fb_set_cmap: sa1100fb_set_cmap,
fb_setcolreg: sa1100fb_setcolreg,
fb_blank: sa1100fb_blank,
};
/*
* sa1100fb_switch():
* Change to the specified console. Palette and video mode
* are changed to the console's stored parameters.
*
* Uh oh, this can be called from a tasklet (IRQ)
*/
static int sa1100fb_switch(int con, struct fb_info *info)
{
struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
struct display *disp;
struct fb_cmap *cmap;
DPRINTK("con=%d info->modename=%s\n", con, fbi->fb.modename);
if (con == info->currcon)
return 0;
if (info->currcon >= 0) {
disp = fb_display + info->currcon;
/*
* Save the old colormap and video mode.
*/
disp->var = fbi->fb.var;
if (disp->cmap.len)
fb_copy_cmap(&fbi->fb.cmap, &disp->cmap, 0);
}
info->currcon = con;
disp = fb_display + con;
/*
* Make sure that our colourmap contains 256 entries.
*/
fb_alloc_cmap(&fbi->fb.cmap, 256, 0);
if (disp->cmap.len)
cmap = &disp->cmap;
else
cmap = fb_default_cmap(1 << disp->var.bits_per_pixel);
fb_copy_cmap(cmap, &fbi->fb.cmap, 0);
fbi->fb.var = disp->var;
fbi->fb.var.activate = FB_ACTIVATE_NOW;
sa1100fb_set_var(&fbi->fb.var, con, info);
return 0;
}
static int sa1100fb_updatevar(int con, struct fb_info *info)
{
DPRINTK("entered\n");
......
include/asm-arm/arch-clps711x/memory.h
View file @ 4bce4b2a
......@@ -153,13 +153,13 @@
#define NODE_MAX_MEM_SHIFT 24
#define NODE_MAX_MEM_SIZE (1<<NODE_MAX_MEM_SHIFT)
#else
#define PFN_TO_NID(pfn) (0)
#endif /* CONFIG_DISCONTIGMEM */
#endif /* CONFIG_ARCH_EDB7211 */
#ifndef PFN_TO_NID
#define PFN_TO_NID(pfn) (0)
#endif
#endif
include/asm-arm/dma.h
View file @ 4bce4b2a
......@@ -74,6 +74,10 @@ extern void enable_dma(dmach_t channel);
*/
extern void disable_dma(dmach_t channel);
/* Test whether the specified channel has an active DMA transfer
*/
extern int dma_channel_active(dmach_t channel);
/* Set the DMA scatter gather list for this channel
*
* This should not be called if a DMA channel is enabled,
......
include/asm-arm/hardware/sa1111.h
View file @ 4bce4b2a
......@@ -198,6 +198,12 @@
#define USB_RESET_PWRSENSELOW (1 << 6)
#define USB_RESET_PWRCTRLLOW (1 << 7)
#define USB_STATUS_IRQHCIRMTWKUP (1 << 7)
#define USB_STATUS_IRQHCIBUFFACC (1 << 8)
#define USB_STATUS_NIRQHCIM (1 << 9)
#define USB_STATUS_NHCIMFCLR (1 << 10)
#define USB_STATUS_USBPWRSENSE (1 << 11)
/*
* Serial Audio Controller
*
......
include/asm-arm/mach/arch.h
View file @ 4bce4b2a
......@@ -19,6 +19,8 @@
extern void setup_initrd(unsigned int start, unsigned int size);
extern void setup_ramdisk(int doload, int prompt, int start, unsigned int rd_sz);
struct tag;
struct machine_desc {
/*
* Note! The first four elements are used
......@@ -41,7 +43,7 @@ struct machine_desc {
unsigned int reserve_lp2 :1; /* never has lp2 */
unsigned int soft_reboot :1; /* soft reboot */
void (*fixup)(struct machine_desc *,
struct param_struct *, char **,
struct tag *, char **,
struct meminfo *);
void (*map_io)(void);/* IO mapping function */
void (*init_irq)(void);
......
include/asm-arm/mach/pci.h
View file @ 4bce4b2a
......@@ -12,27 +12,13 @@ struct pci_sys_data;
struct pci_bus;
struct hw_pci {
/* START OF OLD STUFF */
/* Initialise the hardware */
void (*init)(void *);
/* Setup bus resources */
void (*setup_resources)(struct resource **);
/* IRQ swizzle */
u8 (*swizzle)(struct pci_dev *dev, u8 *pin);
/* IRQ mapping */
int (*map_irq)(struct pci_dev *dev, u8 slot, u8 pin);
/* END OF OLD STUFF */
/* NEW STUFF */
int nr_controllers;
int (*setup)(int nr, struct pci_sys_data *);
struct pci_bus *(*scan)(int nr, struct pci_sys_data *);
void (*preinit)(void);
void (*postinit)(void);
u8 (*swizzle)(struct pci_dev *dev, u8 *pin);
int (*map_irq)(struct pci_dev *dev, u8 slot, u8 pin);
};
/*
......@@ -56,6 +42,11 @@ struct pci_sys_data {
*/
u8 pci_std_swizzle(struct pci_dev *dev, u8 *pinp);
/*
* Call this with your hw_pci struct to initialise the PCI system.
*/
void pci_common_init(struct hw_pci *);
/*
* PCI controllers
*/
......@@ -70,7 +61,7 @@ extern void dc21285_postinit(void);
extern int via82c505_setup(int nr, struct pci_sys_data *);
extern struct pci_bus *via82c505_scan_bus(int nr, struct pci_sys_data *);
extern void __init via82c505_init(void *sysdata);
extern void via82c505_init(void *sysdata);
extern int pci_v3_setup(int nr, struct pci_sys_data *);
extern struct pci_bus *pci_v3_scan_bus(int nr, struct pci_sys_data *);
......
include/asm-arm/memory.h
View file @ 4bce4b2a
......@@ -69,7 +69,7 @@ static inline void *phys_to_virt(unsigned long x)
#define page_to_pfn(page) (((page) - mem_map) + PHYS_PFN_OFFSET)
#define pfn_to_page(pfn) ((mem_map + (pfn)) - PHYS_PFN_OFFSET)
#define pfn_valid(pfn) ((pfn) >= PHYS_PFN_OFFSET && (pfn) < max_mapnr)
#define pfn_valid(pfn) ((pfn) >= PHYS_PFN_OFFSET && (pfn) < (PHYS_PFN_OFFSET + max_mapnr))
#define virt_to_page(kaddr) (pfn_to_page(__pa(kaddr) >> PAGE_SHIFT))
#define virt_addr_valid(kaddr) ((kaddr) >= PAGE_OFFSET && (kaddr) < (unsigned long)high_memory)
......
include/asm-arm/proc-armv/system.h
View file @ 4bce4b2a
......@@ -36,7 +36,7 @@
extern unsigned long cr_no_alignment; /* defined in entry-armv.S */
extern unsigned long cr_alignment; /* defined in entry-armv.S */
#ifdef __ARM_ARCH_4__
#if __LINUX_ARM_ARCH__ >= 4
#define vectors_base() ((cr_alignment & CR_V) ? 0xffff0000 : 0)
#else
#define vectors_base() (0)
......@@ -192,7 +192,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size
: "memory");
break;
#endif
default: __bad_xchg(ptr, size);
default: __bad_xchg(ptr, size), ret = 0;
}
return ret;
......
include/asm-arm/ptrace.h
View file @ 4bce4b2a
#ifndef __ASM_ARM_PTRACE_H
#define __ASM_ARM_PTRACE_H
#define PTRACE_GETREGS 12
#define PTRACE_SETREGS 13
#define PTRACE_GETFPREGS 14
#define PTRACE_SETFPREGS 15
#define PTRACE_SETOPTIONS 21
/* options set using PTRACE_SETOPTIONS */
#define PTRACE_O_TRACESYSGOOD 0x00000001
#include <asm/proc/ptrace.h>
#ifndef __ASSEMBLY__
......@@ -11,11 +21,6 @@
(pc_pointer((regs)->ARM_pc))
#ifdef __KERNEL__
#define PTRACE_GETREGS 12
#define PTRACE_SETREGS 13
#define PTRACE_GETFPREGS 14
#define PTRACE_SETFPREGS 15
extern void show_regs(struct pt_regs *);
#define predicate(x) (x & 0xf0000000)
......
include/asm-arm/thread_info.h
View file @ 4bce4b2a
......@@ -28,7 +28,7 @@ typedef unsigned long mm_segment_t; /* domain register */
* low level task data that entry.S needs immediate access to.
*/
struct thread_info {
__u32 flags; /* low level flags */
unsigned long flags; /* low level flags */
__s32 preempt_count; /* 0 => preemptable, <0 => bug */
mm_segment_t addr_limit; /* address limit */
__u32 cpu; /* cpu */
......
include/asm-arm/unistd.h
View file @ 4bce4b2a
......@@ -13,6 +13,8 @@
#ifndef __ASM_ARM_UNISTD_H
#define __ASM_ARM_UNISTD_H
#include <linux/linkage.h>
#define __NR_SYSCALL_BASE 0x900000
/*
......
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