Commit 4ce588cd authored by Ralf Baechle's avatar Ralf Baechle Committed by Linus Torvalds

[PATCH] mips: fix coherency configuration

Fix the MIPS coherency configuration such that we always keep the mapping
state in <asm/pci.h> when we need to on non-coherent platforms.
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 42a3b4f2
...@@ -957,8 +957,16 @@ config DMA_COHERENT ...@@ -957,8 +957,16 @@ config DMA_COHERENT
config DMA_IP27 config DMA_IP27
bool bool
config DMA_IP32
bool
select DMA_NEED_PCI_MAP_STATE
config DMA_NONCOHERENT config DMA_NONCOHERENT
bool bool
select DMA_NEED_PCI_MAP_STATE
config DMA_NEED_PCI_MAP_STATE
bool
config EARLY_PRINTK config EARLY_PRINTK
bool bool
......
...@@ -88,6 +88,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y ...@@ -88,6 +88,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y CONFIG_HAVE_DEC_LOCK=y
CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_MIPS_BONITO64=y CONFIG_MIPS_BONITO64=y
CONFIG_MIPS_MSC=y CONFIG_MIPS_MSC=y
# CONFIG_CPU_LITTLE_ENDIAN is not set # CONFIG_CPU_LITTLE_ENDIAN is not set
......
...@@ -97,6 +97,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y ...@@ -97,6 +97,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y CONFIG_HAVE_DEC_LOCK=y
CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_IRQ_CPU=y CONFIG_IRQ_CPU=y
CONFIG_MIPS_L1_CACHE_SHIFT=5 CONFIG_MIPS_L1_CACHE_SHIFT=5
......
...@@ -82,6 +82,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y ...@@ -82,6 +82,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y CONFIG_HAVE_DEC_LOCK=y
CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_I8259=y CONFIG_I8259=y
CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_IRQ_CPU=y CONFIG_IRQ_CPU=y
......
...@@ -104,6 +104,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y ...@@ -104,6 +104,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y CONFIG_HAVE_DEC_LOCK=y
CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_MIPS_L1_CACHE_SHIFT=5 CONFIG_MIPS_L1_CACHE_SHIFT=5
......
...@@ -104,6 +104,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y ...@@ -104,6 +104,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y CONFIG_HAVE_DEC_LOCK=y
CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_MIPS_L1_CACHE_SHIFT=5 CONFIG_MIPS_L1_CACHE_SHIFT=5
......
...@@ -82,6 +82,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y ...@@ -82,6 +82,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y CONFIG_HAVE_DEC_LOCK=y
CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_I8259=y CONFIG_I8259=y
CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_IRQ_CPU=y CONFIG_IRQ_CPU=y
......
...@@ -83,6 +83,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y ...@@ -83,6 +83,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y CONFIG_HAVE_DEC_LOCK=y
CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_I8259=y CONFIG_I8259=y
CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_IRQ_CPU=y CONFIG_IRQ_CPU=y
......
...@@ -88,6 +88,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y ...@@ -88,6 +88,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y CONFIG_HAVE_DEC_LOCK=y
CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_EARLY_PRINTK=y CONFIG_EARLY_PRINTK=y
CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_IRQ_CPU=y CONFIG_IRQ_CPU=y
......
...@@ -96,6 +96,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y ...@@ -96,6 +96,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y CONFIG_HAVE_DEC_LOCK=y
CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_IRQ_CPU=y CONFIG_IRQ_CPU=y
CONFIG_MIPS_L1_CACHE_SHIFT=5 CONFIG_MIPS_L1_CACHE_SHIFT=5
......
...@@ -89,6 +89,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y ...@@ -89,6 +89,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y CONFIG_HAVE_DEC_LOCK=y
CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
# CONFIG_CPU_LITTLE_ENDIAN is not set # CONFIG_CPU_LITTLE_ENDIAN is not set
CONFIG_MIPS_GT64120=y CONFIG_MIPS_GT64120=y
# CONFIG_SYSCLK_75 is not set # CONFIG_SYSCLK_75 is not set
......
...@@ -88,6 +88,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y ...@@ -88,6 +88,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y CONFIG_HAVE_DEC_LOCK=y
CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
# CONFIG_CPU_LITTLE_ENDIAN is not set # CONFIG_CPU_LITTLE_ENDIAN is not set
CONFIG_IRQ_CPU=y CONFIG_IRQ_CPU=y
CONFIG_MIPS_GT64120=y CONFIG_MIPS_GT64120=y
......
...@@ -90,6 +90,7 @@ CONFIG_GENERIC_CALIBRATE_DELAY=y ...@@ -90,6 +90,7 @@ CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y CONFIG_HAVE_DEC_LOCK=y
CONFIG_ARC=y CONFIG_ARC=y
CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
# CONFIG_CPU_LITTLE_ENDIAN is not set # CONFIG_CPU_LITTLE_ENDIAN is not set
CONFIG_IRQ_CPU=y CONFIG_IRQ_CPU=y
CONFIG_SWAP_IO_SPACE=y CONFIG_SWAP_IO_SPACE=y
......
...@@ -84,6 +84,7 @@ CONFIG_ARC=y ...@@ -84,6 +84,7 @@ CONFIG_ARC=y
CONFIG_DMA_IP32=y CONFIG_DMA_IP32=y
CONFIG_OWN_DMA=y CONFIG_OWN_DMA=y
CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
# CONFIG_CPU_LITTLE_ENDIAN is not set # CONFIG_CPU_LITTLE_ENDIAN is not set
CONFIG_ARC32=y CONFIG_ARC32=y
CONFIG_BOOT_ELF32=y CONFIG_BOOT_ELF32=y
......
...@@ -90,6 +90,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y ...@@ -90,6 +90,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y CONFIG_HAVE_DEC_LOCK=y
CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_ITE_BOARD_GEN=y CONFIG_ITE_BOARD_GEN=y
CONFIG_IT8172_CIR=y CONFIG_IT8172_CIR=y
......
...@@ -89,6 +89,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y ...@@ -89,6 +89,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y CONFIG_HAVE_DEC_LOCK=y
CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_ITE_BOARD_GEN=y CONFIG_ITE_BOARD_GEN=y
CONFIG_IT8172_CIR=y CONFIG_IT8172_CIR=y
......
...@@ -81,6 +81,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y ...@@ -81,6 +81,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y CONFIG_HAVE_DEC_LOCK=y
CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_LIMITED_DMA=y CONFIG_LIMITED_DMA=y
# CONFIG_CPU_LITTLE_ENDIAN is not set # CONFIG_CPU_LITTLE_ENDIAN is not set
CONFIG_IRQ_CPU=y CONFIG_IRQ_CPU=y
......
...@@ -82,6 +82,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y ...@@ -82,6 +82,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y CONFIG_HAVE_DEC_LOCK=y
CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
# CONFIG_CPU_LITTLE_ENDIAN is not set # CONFIG_CPU_LITTLE_ENDIAN is not set
CONFIG_MIPS_TX3927=y CONFIG_MIPS_TX3927=y
CONFIG_SWAP_IO_SPACE=y CONFIG_SWAP_IO_SPACE=y
......
...@@ -92,6 +92,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y ...@@ -92,6 +92,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y CONFIG_HAVE_DEC_LOCK=y
CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_MIPS_NILE4=y CONFIG_MIPS_NILE4=y
CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_MIPS_GT64120=y CONFIG_MIPS_GT64120=y
......
...@@ -88,6 +88,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y ...@@ -88,6 +88,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y CONFIG_HAVE_DEC_LOCK=y
CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_GENERIC_ISA_DMA=y CONFIG_GENERIC_ISA_DMA=y
CONFIG_I8259=y CONFIG_I8259=y
CONFIG_MIPS_BONITO64=y CONFIG_MIPS_BONITO64=y
......
...@@ -97,6 +97,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y ...@@ -97,6 +97,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y CONFIG_HAVE_DEC_LOCK=y
CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_IRQ_CPU=y CONFIG_IRQ_CPU=y
CONFIG_MIPS_L1_CACHE_SHIFT=5 CONFIG_MIPS_L1_CACHE_SHIFT=5
......
...@@ -89,6 +89,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y ...@@ -89,6 +89,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y CONFIG_HAVE_DEC_LOCK=y
CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
# CONFIG_CPU_LITTLE_ENDIAN is not set # CONFIG_CPU_LITTLE_ENDIAN is not set
CONFIG_IRQ_CPU=y CONFIG_IRQ_CPU=y
CONFIG_IRQ_CPU_RM7K=y CONFIG_IRQ_CPU_RM7K=y
......
...@@ -80,6 +80,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y ...@@ -80,6 +80,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y CONFIG_HAVE_DEC_LOCK=y
CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
# CONFIG_CPU_LITTLE_ENDIAN is not set # CONFIG_CPU_LITTLE_ENDIAN is not set
CONFIG_IRQ_CPU=y CONFIG_IRQ_CPU=y
CONFIG_IRQ_MV64340=y CONFIG_IRQ_MV64340=y
......
...@@ -82,6 +82,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y ...@@ -82,6 +82,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y CONFIG_HAVE_DEC_LOCK=y
CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
# CONFIG_CPU_LITTLE_ENDIAN is not set # CONFIG_CPU_LITTLE_ENDIAN is not set
CONFIG_IRQ_CPU=y CONFIG_IRQ_CPU=y
CONFIG_IRQ_CPU_RM7K=y CONFIG_IRQ_CPU_RM7K=y
......
...@@ -80,6 +80,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y ...@@ -80,6 +80,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y CONFIG_HAVE_DEC_LOCK=y
CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
# CONFIG_CPU_LITTLE_ENDIAN is not set # CONFIG_CPU_LITTLE_ENDIAN is not set
CONFIG_IRQ_CPU=y CONFIG_IRQ_CPU=y
CONFIG_IRQ_CPU_RM7K=y CONFIG_IRQ_CPU_RM7K=y
......
...@@ -104,6 +104,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y ...@@ -104,6 +104,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y CONFIG_HAVE_DEC_LOCK=y
CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_SWAP_IO_SPACE=y CONFIG_SWAP_IO_SPACE=y
# CONFIG_AU1X00_USB_DEVICE is not set # CONFIG_AU1X00_USB_DEVICE is not set
......
...@@ -91,6 +91,7 @@ CONFIG_GENERIC_CALIBRATE_DELAY=y ...@@ -91,6 +91,7 @@ CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y CONFIG_HAVE_DEC_LOCK=y
CONFIG_ARC=y CONFIG_ARC=y
CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_GENERIC_ISA_DMA=y CONFIG_GENERIC_ISA_DMA=y
CONFIG_I8259=y CONFIG_I8259=y
CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_CPU_LITTLE_ENDIAN=y
......
...@@ -80,6 +80,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y ...@@ -80,6 +80,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y CONFIG_HAVE_DEC_LOCK=y
CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_IRQ_CPU=y CONFIG_IRQ_CPU=y
CONFIG_MIPS_BOARDS_GEN=y CONFIG_MIPS_BOARDS_GEN=y
......
...@@ -95,6 +95,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y ...@@ -95,6 +95,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y CONFIG_HAVE_DEC_LOCK=y
CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_IRQ_CPU=y CONFIG_IRQ_CPU=y
CONFIG_MIPS_L1_CACHE_SHIFT=5 CONFIG_MIPS_L1_CACHE_SHIFT=5
......
...@@ -98,6 +98,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y ...@@ -98,6 +98,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y CONFIG_HAVE_DEC_LOCK=y
CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_IRQ_CPU=y CONFIG_IRQ_CPU=y
CONFIG_MIPS_L1_CACHE_SHIFT=5 CONFIG_MIPS_L1_CACHE_SHIFT=5
......
...@@ -96,6 +96,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y ...@@ -96,6 +96,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y CONFIG_HAVE_DEC_LOCK=y
CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_IRQ_CPU=y CONFIG_IRQ_CPU=y
CONFIG_MIPS_L1_CACHE_SHIFT=5 CONFIG_MIPS_L1_CACHE_SHIFT=5
......
...@@ -90,6 +90,7 @@ CONFIG_GENERIC_CALIBRATE_DELAY=y ...@@ -90,6 +90,7 @@ CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y CONFIG_HAVE_DEC_LOCK=y
CONFIG_ARC=y CONFIG_ARC=y
CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
# CONFIG_CPU_LITTLE_ENDIAN is not set # CONFIG_CPU_LITTLE_ENDIAN is not set
CONFIG_IRQ_CPU=y CONFIG_IRQ_CPU=y
CONFIG_SWAP_IO_SPACE=y CONFIG_SWAP_IO_SPACE=y
......
...@@ -94,7 +94,7 @@ struct pci_dev; ...@@ -94,7 +94,7 @@ struct pci_dev;
*/ */
extern unsigned int PCI_DMA_BUS_IS_PHYS; extern unsigned int PCI_DMA_BUS_IS_PHYS;
#ifdef CONFIG_MAPPED_DMA_IO #ifdef CONFIG_DMA_NEED_PCI_MAP_STATE
/* pci_unmap_{single,page} is not a nop, thus... */ /* pci_unmap_{single,page} is not a nop, thus... */
#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME; #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME;
...@@ -104,7 +104,7 @@ extern unsigned int PCI_DMA_BUS_IS_PHYS; ...@@ -104,7 +104,7 @@ extern unsigned int PCI_DMA_BUS_IS_PHYS;
#define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME) #define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
#define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) #define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
#else /* CONFIG_MAPPED_DMA_IO */ #else /* CONFIG_DMA_NEED_PCI_MAP_STATE */
/* pci_unmap_{page,single} is a nop so... */ /* pci_unmap_{page,single} is a nop so... */
#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
...@@ -114,7 +114,7 @@ extern unsigned int PCI_DMA_BUS_IS_PHYS; ...@@ -114,7 +114,7 @@ extern unsigned int PCI_DMA_BUS_IS_PHYS;
#define pci_unmap_len(PTR, LEN_NAME) (0) #define pci_unmap_len(PTR, LEN_NAME) (0)
#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
#endif /* CONFIG_MAPPED_DMA_IO */ #endif /* CONFIG_DMA_NEED_PCI_MAP_STATE */
/* This is always fine. */ /* This is always fine. */
#define pci_dac_dma_supported(pci_dev, mask) (1) #define pci_dac_dma_supported(pci_dev, mask) (1)
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment