Commit 4d5a3197 authored by Bjorn Helgaas's avatar Bjorn Helgaas Committed by Tony Luck

[IA64] reformat pal.S to fit in 80 columns, fix typos

Reformat to fit in 80 columns.  Fix a couple typos.  Remove
a couple unused labels.
Signed-off-by: default avatarBjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
parent c12fb188
...@@ -21,11 +21,12 @@ pal_entry_point: ...@@ -21,11 +21,12 @@ pal_entry_point:
.text .text
/* /*
* Set the PAL entry point address. This could be written in C code, but we do it here * Set the PAL entry point address. This could be written in C code, but we
* to keep it all in one module (besides, it's so trivial that it's * do it here to keep it all in one module (besides, it's so trivial that it's
* not a big deal). * not a big deal).
* *
* in0 Address of the PAL entry point (text address, NOT a function descriptor). * in0 Address of the PAL entry point (text address, NOT a function
* descriptor).
*/ */
GLOBAL_ENTRY(ia64_pal_handler_init) GLOBAL_ENTRY(ia64_pal_handler_init)
alloc r3=ar.pfs,1,0,0,0 alloc r3=ar.pfs,1,0,0,0
...@@ -36,9 +37,9 @@ GLOBAL_ENTRY(ia64_pal_handler_init) ...@@ -36,9 +37,9 @@ GLOBAL_ENTRY(ia64_pal_handler_init)
END(ia64_pal_handler_init) END(ia64_pal_handler_init)
/* /*
* Default PAL call handler. This needs to be coded in assembly because it uses * Default PAL call handler. This needs to be coded in assembly because it
* the static calling convention, i.e., the RSE may not be used and calls are * uses the static calling convention, i.e., the RSE may not be used and
* done via "br.cond" (not "br.call"). * calls are done via "br.cond" (not "br.call").
*/ */
GLOBAL_ENTRY(ia64_pal_default_handler) GLOBAL_ENTRY(ia64_pal_default_handler)
mov r8=-1 mov r8=-1
...@@ -92,7 +93,7 @@ END(ia64_pal_call_static) ...@@ -92,7 +93,7 @@ END(ia64_pal_call_static)
* *
* Inputs: * Inputs:
* in0 Index of PAL service * in0 Index of PAL service
* in2 - in3 Remaning PAL arguments * in2 - in3 Remaining PAL arguments
*/ */
GLOBAL_ENTRY(ia64_pal_call_stacked) GLOBAL_ENTRY(ia64_pal_call_stacked)
.prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(4) .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(4)
...@@ -127,13 +128,13 @@ END(ia64_pal_call_stacked) ...@@ -127,13 +128,13 @@ END(ia64_pal_call_stacked)
* *
* Inputs: * Inputs:
* in0 Index of PAL service * in0 Index of PAL service
* in2 - in3 Remaning PAL arguments * in2 - in3 Remaining PAL arguments
* *
* PSR_LP, PSR_TB, PSR_ID, PSR_DA are never set by the kernel. * PSR_LP, PSR_TB, PSR_ID, PSR_DA are never set by the kernel.
* So we don't need to clear them. * So we don't need to clear them.
*/ */
#define PAL_PSR_BITS_TO_CLEAR \ #define PAL_PSR_BITS_TO_CLEAR \
(IA64_PSR_I | IA64_PSR_IT | IA64_PSR_DT | IA64_PSR_DB | IA64_PSR_RT | \ (IA64_PSR_I | IA64_PSR_IT | IA64_PSR_DT | IA64_PSR_DB | IA64_PSR_RT |\
IA64_PSR_DD | IA64_PSR_SS | IA64_PSR_RI | IA64_PSR_ED | \ IA64_PSR_DD | IA64_PSR_SS | IA64_PSR_RI | IA64_PSR_ED | \
IA64_PSR_DFL | IA64_PSR_DFH) IA64_PSR_DFL | IA64_PSR_DFH)
...@@ -173,7 +174,7 @@ GLOBAL_ENTRY(ia64_pal_call_phys_static) ...@@ -173,7 +174,7 @@ GLOBAL_ENTRY(ia64_pal_call_phys_static)
;; ;;
andcm r16=loc3,r16 // removes bits to clear from psr andcm r16=loc3,r16 // removes bits to clear from psr
br.call.sptk.many rp=ia64_switch_mode_phys br.call.sptk.many rp=ia64_switch_mode_phys
.ret1: mov rp = r8 // install return address (physical) mov rp = r8 // install return address (physical)
mov loc5 = r19 mov loc5 = r19
mov loc6 = r20 mov loc6 = r20
br.cond.sptk.many b7 br.cond.sptk.many b7
...@@ -183,7 +184,6 @@ GLOBAL_ENTRY(ia64_pal_call_phys_static) ...@@ -183,7 +184,6 @@ GLOBAL_ENTRY(ia64_pal_call_phys_static)
mov r19=loc5 mov r19=loc5
mov r20=loc6 mov r20=loc6
br.call.sptk.many rp=ia64_switch_mode_virt // return to virtual mode br.call.sptk.many rp=ia64_switch_mode_virt // return to virtual mode
.ret2:
mov psr.l = loc3 // restore init PSR mov psr.l = loc3 // restore init PSR
mov ar.pfs = loc1 mov ar.pfs = loc1
...@@ -199,7 +199,7 @@ END(ia64_pal_call_phys_static) ...@@ -199,7 +199,7 @@ END(ia64_pal_call_phys_static)
* *
* Inputs: * Inputs:
* in0 Index of PAL service * in0 Index of PAL service
* in2 - in3 Remaning PAL arguments * in2 - in3 Remaining PAL arguments
*/ */
GLOBAL_ENTRY(ia64_pal_call_phys_stacked) GLOBAL_ENTRY(ia64_pal_call_phys_stacked)
.prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(5) .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(5)
...@@ -252,10 +252,11 @@ GLOBAL_ENTRY(ia64_pal_call_phys_stacked) ...@@ -252,10 +252,11 @@ GLOBAL_ENTRY(ia64_pal_call_phys_stacked)
END(ia64_pal_call_phys_stacked) END(ia64_pal_call_phys_stacked)
/* /*
* Save scratch fp scratch regs which aren't saved in pt_regs already (fp10-fp15). * Save scratch fp scratch regs which aren't saved in pt_regs already
* (fp10-fp15).
* *
* NOTE: We need to do this since firmware (SAL and PAL) may use any of the scratch * NOTE: We need to do this since firmware (SAL and PAL) may use any of the
* regs fp-low partition. * scratch regs fp-low partition.
* *
* Inputs: * Inputs:
* in0 Address of stack storage for fp regs * in0 Address of stack storage for fp regs
......
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