Commit 4e0e161d authored by Rasmus Villemoes's avatar Rasmus Villemoes Committed by Li Yang

soc: fsl: qe: move calls of qe_ic_init out of arch/powerpc/

Having to call qe_ic_init() from platform-specific code makes it
awkward to allow building the QE drivers for ARM. It's also a needless
duplication of code, and slightly error-prone: Instead of the caller
needing to know the details of whether the QUICC Engine High and QUICC
Engine Low are actually the same interrupt (see e.g. the machine_is()
in mpc85xx_mds_qeic_init), just let the init function choose the
appropriate handlers after it has parsed the DT and figured it out. If
the two interrupts are distinct, use separate handlers, otherwise use
the handler which first checks the CHIVEC register (for the high
priority interrupts), then the CIVEC.

All existing callers pass 0 for flags, so continue to do that from the
new single caller. Later cleanups will remove that argument
from qe_ic_init and simplify the body, as well as make qe_ic_init into
a proper init function for an IRQCHIP_DECLARE, eliminating the need to
manually look up the fsl,qe-ic node.
Reviewed-by: default avatarTimur Tabi <timur@kernel.org>
Signed-off-by: default avatarRasmus Villemoes <linux@rasmusvillemoes.dk>
Signed-off-by: default avatarLi Yang <leoyang.li@nxp.com>
parent 273e6672
...@@ -34,7 +34,6 @@ ...@@ -34,7 +34,6 @@
#include <sysdev/fsl_soc.h> #include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h> #include <sysdev/fsl_pci.h>
#include <soc/fsl/qe/qe.h> #include <soc/fsl/qe/qe.h>
#include <soc/fsl/qe/qe_ic.h>
#include "mpc83xx.h" #include "mpc83xx.h"
......
...@@ -14,7 +14,6 @@ ...@@ -14,7 +14,6 @@
#include <asm/io.h> #include <asm/io.h>
#include <asm/hw_irq.h> #include <asm/hw_irq.h>
#include <asm/ipic.h> #include <asm/ipic.h>
#include <soc/fsl/qe/qe_ic.h>
#include <sysdev/fsl_soc.h> #include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h> #include <sysdev/fsl_pci.h>
...@@ -92,24 +91,9 @@ void __init mpc83xx_ipic_init_IRQ(void) ...@@ -92,24 +91,9 @@ void __init mpc83xx_ipic_init_IRQ(void)
} }
#ifdef CONFIG_QUICC_ENGINE #ifdef CONFIG_QUICC_ENGINE
void __init mpc83xx_qe_init_IRQ(void)
{
struct device_node *np;
np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
if (!np) {
np = of_find_node_by_type(NULL, "qeic");
if (!np)
return;
}
qe_ic_init(np, 0, qe_ic_cascade_low_mpic, qe_ic_cascade_high_mpic);
of_node_put(np);
}
void __init mpc83xx_ipic_and_qe_init_IRQ(void) void __init mpc83xx_ipic_and_qe_init_IRQ(void)
{ {
mpc83xx_ipic_init_IRQ(); mpc83xx_ipic_init_IRQ();
mpc83xx_qe_init_IRQ();
} }
#endif /* CONFIG_QUICC_ENGINE */ #endif /* CONFIG_QUICC_ENGINE */
......
...@@ -33,7 +33,6 @@ ...@@ -33,7 +33,6 @@
#include <sysdev/fsl_soc.h> #include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h> #include <sysdev/fsl_pci.h>
#include <soc/fsl/qe/qe.h> #include <soc/fsl/qe/qe.h>
#include <soc/fsl/qe/qe_ic.h>
#include "mpc83xx.h" #include "mpc83xx.h"
......
...@@ -22,7 +22,6 @@ ...@@ -22,7 +22,6 @@
#include <asm/ipic.h> #include <asm/ipic.h>
#include <asm/udbg.h> #include <asm/udbg.h>
#include <soc/fsl/qe/qe.h> #include <soc/fsl/qe/qe.h>
#include <soc/fsl/qe/qe_ic.h>
#include <sysdev/fsl_soc.h> #include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h> #include <sysdev/fsl_pci.h>
......
...@@ -40,7 +40,6 @@ ...@@ -40,7 +40,6 @@
#include <sysdev/fsl_soc.h> #include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h> #include <sysdev/fsl_pci.h>
#include <soc/fsl/qe/qe.h> #include <soc/fsl/qe/qe.h>
#include <soc/fsl/qe/qe_ic.h>
#include "mpc83xx.h" #include "mpc83xx.h"
......
...@@ -17,7 +17,6 @@ ...@@ -17,7 +17,6 @@
#include <asm/ipic.h> #include <asm/ipic.h>
#include <asm/udbg.h> #include <asm/udbg.h>
#include <soc/fsl/qe/qe.h> #include <soc/fsl/qe/qe.h>
#include <soc/fsl/qe/qe_ic.h>
#include <sysdev/fsl_soc.h> #include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h> #include <sysdev/fsl_pci.h>
......
...@@ -73,10 +73,8 @@ extern int mpc834x_usb_cfg(void); ...@@ -73,10 +73,8 @@ extern int mpc834x_usb_cfg(void);
extern int mpc831x_usb_cfg(void); extern int mpc831x_usb_cfg(void);
extern void mpc83xx_ipic_init_IRQ(void); extern void mpc83xx_ipic_init_IRQ(void);
#ifdef CONFIG_QUICC_ENGINE #ifdef CONFIG_QUICC_ENGINE
extern void mpc83xx_qe_init_IRQ(void);
extern void mpc83xx_ipic_and_qe_init_IRQ(void); extern void mpc83xx_ipic_and_qe_init_IRQ(void);
#else #else
static inline void __init mpc83xx_qe_init_IRQ(void) {}
#define mpc83xx_ipic_and_qe_init_IRQ mpc83xx_ipic_init_IRQ #define mpc83xx_ipic_and_qe_init_IRQ mpc83xx_ipic_init_IRQ
#endif /* CONFIG_QUICC_ENGINE */ #endif /* CONFIG_QUICC_ENGINE */
......
...@@ -24,7 +24,6 @@ ...@@ -24,7 +24,6 @@
#include <asm/mpic.h> #include <asm/mpic.h>
#include <asm/ehv_pic.h> #include <asm/ehv_pic.h>
#include <asm/swiotlb.h> #include <asm/swiotlb.h>
#include <soc/fsl/qe/qe_ic.h>
#include <linux/of_platform.h> #include <linux/of_platform.h>
#include <sysdev/fsl_soc.h> #include <sysdev/fsl_soc.h>
...@@ -38,8 +37,6 @@ void __init corenet_gen_pic_init(void) ...@@ -38,8 +37,6 @@ void __init corenet_gen_pic_init(void)
unsigned int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU | unsigned int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU |
MPIC_NO_RESET; MPIC_NO_RESET;
struct device_node *np;
if (ppc_md.get_irq == mpic_get_coreint_irq) if (ppc_md.get_irq == mpic_get_coreint_irq)
flags |= MPIC_ENABLE_COREINT; flags |= MPIC_ENABLE_COREINT;
...@@ -47,13 +44,6 @@ void __init corenet_gen_pic_init(void) ...@@ -47,13 +44,6 @@ void __init corenet_gen_pic_init(void)
BUG_ON(mpic == NULL); BUG_ON(mpic == NULL);
mpic_init(mpic); mpic_init(mpic);
np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
if (np) {
qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
qe_ic_cascade_high_mpic);
of_node_put(np);
}
} }
/* /*
......
...@@ -44,7 +44,6 @@ ...@@ -44,7 +44,6 @@
#include <sysdev/fsl_soc.h> #include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h> #include <sysdev/fsl_pci.h>
#include <soc/fsl/qe/qe.h> #include <soc/fsl/qe/qe.h>
#include <soc/fsl/qe/qe_ic.h>
#include <asm/mpic.h> #include <asm/mpic.h>
#include <asm/swiotlb.h> #include <asm/swiotlb.h>
#include "smp.h" #include "smp.h"
...@@ -268,33 +267,8 @@ static void __init mpc85xx_mds_qe_init(void) ...@@ -268,33 +267,8 @@ static void __init mpc85xx_mds_qe_init(void)
} }
} }
static void __init mpc85xx_mds_qeic_init(void)
{
struct device_node *np;
np = of_find_compatible_node(NULL, NULL, "fsl,qe");
if (!of_device_is_available(np)) {
of_node_put(np);
return;
}
np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
if (!np) {
np = of_find_node_by_type(NULL, "qeic");
if (!np)
return;
}
if (machine_is(p1021_mds))
qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
qe_ic_cascade_high_mpic);
else
qe_ic_init(np, 0, qe_ic_cascade_muxed_mpic, NULL);
of_node_put(np);
}
#else #else
static void __init mpc85xx_mds_qe_init(void) { } static void __init mpc85xx_mds_qe_init(void) { }
static void __init mpc85xx_mds_qeic_init(void) { }
#endif /* CONFIG_QUICC_ENGINE */ #endif /* CONFIG_QUICC_ENGINE */
static void __init mpc85xx_mds_setup_arch(void) static void __init mpc85xx_mds_setup_arch(void)
...@@ -364,7 +338,6 @@ static void __init mpc85xx_mds_pic_init(void) ...@@ -364,7 +338,6 @@ static void __init mpc85xx_mds_pic_init(void)
BUG_ON(mpic == NULL); BUG_ON(mpic == NULL);
mpic_init(mpic); mpic_init(mpic);
mpc85xx_mds_qeic_init();
} }
static int __init mpc85xx_mds_probe(void) static int __init mpc85xx_mds_probe(void)
......
...@@ -23,7 +23,6 @@ ...@@ -23,7 +23,6 @@
#include <asm/udbg.h> #include <asm/udbg.h>
#include <asm/mpic.h> #include <asm/mpic.h>
#include <soc/fsl/qe/qe.h> #include <soc/fsl/qe/qe.h>
#include <soc/fsl/qe/qe_ic.h>
#include <sysdev/fsl_soc.h> #include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h> #include <sysdev/fsl_pci.h>
...@@ -44,10 +43,6 @@ void __init mpc85xx_rdb_pic_init(void) ...@@ -44,10 +43,6 @@ void __init mpc85xx_rdb_pic_init(void)
{ {
struct mpic *mpic; struct mpic *mpic;
#ifdef CONFIG_QUICC_ENGINE
struct device_node *np;
#endif
if (of_machine_is_compatible("fsl,MPC85XXRDB-CAMP")) { if (of_machine_is_compatible("fsl,MPC85XXRDB-CAMP")) {
mpic = mpic_alloc(NULL, 0, MPIC_NO_RESET | mpic = mpic_alloc(NULL, 0, MPIC_NO_RESET |
MPIC_BIG_ENDIAN | MPIC_BIG_ENDIAN |
...@@ -62,18 +57,6 @@ void __init mpc85xx_rdb_pic_init(void) ...@@ -62,18 +57,6 @@ void __init mpc85xx_rdb_pic_init(void)
BUG_ON(mpic == NULL); BUG_ON(mpic == NULL);
mpic_init(mpic); mpic_init(mpic);
#ifdef CONFIG_QUICC_ENGINE
np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
if (np) {
qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
qe_ic_cascade_high_mpic);
of_node_put(np);
} else
pr_err("%s: Could not find qe-ic node\n", __func__);
#endif
} }
/* /*
......
...@@ -19,7 +19,6 @@ ...@@ -19,7 +19,6 @@
#include <asm/udbg.h> #include <asm/udbg.h>
#include <asm/mpic.h> #include <asm/mpic.h>
#include <soc/fsl/qe/qe.h> #include <soc/fsl/qe/qe.h>
#include <soc/fsl/qe/qe_ic.h>
#include <sysdev/fsl_soc.h> #include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h> #include <sysdev/fsl_pci.h>
...@@ -31,26 +30,12 @@ static void __init twr_p1025_pic_init(void) ...@@ -31,26 +30,12 @@ static void __init twr_p1025_pic_init(void)
{ {
struct mpic *mpic; struct mpic *mpic;
#ifdef CONFIG_QUICC_ENGINE
struct device_node *np;
#endif
mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN | mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
MPIC_SINGLE_DEST_CPU, MPIC_SINGLE_DEST_CPU,
0, 256, " OpenPIC "); 0, 256, " OpenPIC ");
BUG_ON(mpic == NULL); BUG_ON(mpic == NULL);
mpic_init(mpic); mpic_init(mpic);
#ifdef CONFIG_QUICC_ENGINE
np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
if (np) {
qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
qe_ic_cascade_high_mpic);
of_node_put(np);
} else
pr_err("Could not find qe-ic node\n");
#endif
} }
/* ************************************************************************ /* ************************************************************************
......
...@@ -314,10 +314,10 @@ unsigned int qe_ic_get_high_irq(struct qe_ic *qe_ic) ...@@ -314,10 +314,10 @@ unsigned int qe_ic_get_high_irq(struct qe_ic *qe_ic)
return irq_linear_revmap(qe_ic->irqhost, irq); return irq_linear_revmap(qe_ic->irqhost, irq);
} }
void __init qe_ic_init(struct device_node *node, unsigned int flags, static void __init qe_ic_init(struct device_node *node, unsigned int flags)
void (*low_handler)(struct irq_desc *desc),
void (*high_handler)(struct irq_desc *desc))
{ {
void (*low_handler)(struct irq_desc *desc);
void (*high_handler)(struct irq_desc *desc);
struct qe_ic *qe_ic; struct qe_ic *qe_ic;
struct resource res; struct resource res;
u32 temp = 0, ret; u32 temp = 0, ret;
...@@ -349,6 +349,13 @@ void __init qe_ic_init(struct device_node *node, unsigned int flags, ...@@ -349,6 +349,13 @@ void __init qe_ic_init(struct device_node *node, unsigned int flags,
kfree(qe_ic); kfree(qe_ic);
return; return;
} }
if (qe_ic->virq_high != qe_ic->virq_low) {
low_handler = qe_ic_cascade_low_mpic;
high_handler = qe_ic_cascade_high_mpic;
} else {
low_handler = qe_ic_cascade_muxed_mpic;
high_handler = NULL;
}
/* default priority scheme is grouped. If spread mode is */ /* default priority scheme is grouped. If spread mode is */
/* required, configure cicr accordingly. */ /* required, configure cicr accordingly. */
...@@ -381,6 +388,22 @@ void __init qe_ic_init(struct device_node *node, unsigned int flags, ...@@ -381,6 +388,22 @@ void __init qe_ic_init(struct device_node *node, unsigned int flags,
} }
} }
static int __init qe_ic_of_init(void)
{
struct device_node *np;
np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
if (!np) {
np = of_find_node_by_type(NULL, "qeic");
if (!np)
return -ENODEV;
}
qe_ic_init(np, 0);
of_node_put(np);
return 0;
}
subsys_initcall(qe_ic_of_init);
void qe_ic_set_highest_priority(unsigned int virq, int high) void qe_ic_set_highest_priority(unsigned int virq, int high)
{ {
struct qe_ic *qe_ic = qe_ic_from_irq(virq); struct qe_ic *qe_ic = qe_ic_from_irq(virq);
......
...@@ -54,16 +54,9 @@ enum qe_ic_grp_id { ...@@ -54,16 +54,9 @@ enum qe_ic_grp_id {
}; };
#ifdef CONFIG_QUICC_ENGINE #ifdef CONFIG_QUICC_ENGINE
void qe_ic_init(struct device_node *node, unsigned int flags,
void (*low_handler)(struct irq_desc *desc),
void (*high_handler)(struct irq_desc *desc));
unsigned int qe_ic_get_low_irq(struct qe_ic *qe_ic); unsigned int qe_ic_get_low_irq(struct qe_ic *qe_ic);
unsigned int qe_ic_get_high_irq(struct qe_ic *qe_ic); unsigned int qe_ic_get_high_irq(struct qe_ic *qe_ic);
#else #else
static inline void qe_ic_init(struct device_node *node, unsigned int flags,
void (*low_handler)(struct irq_desc *desc),
void (*high_handler)(struct irq_desc *desc))
{}
static inline unsigned int qe_ic_get_low_irq(struct qe_ic *qe_ic) static inline unsigned int qe_ic_get_low_irq(struct qe_ic *qe_ic)
{ return 0; } { return 0; }
static inline unsigned int qe_ic_get_high_irq(struct qe_ic *qe_ic) static inline unsigned int qe_ic_get_high_irq(struct qe_ic *qe_ic)
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment