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Commit 4ee45a31 authored by Ralf Bächle's avatar Ralf Bächle Committed by Linus Torvalds
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[PATCH] NEC VR41xx update 

This one adds support for a bunch of NEC VR41xx-based platforms such as
IBM's workpad and a bunch of eval boards.
parent 3ad349a5
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arch/mips/defconfig-capcella 0 → 100644
View file @ 4ee45a31
#
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
CONFIG_MIPS32=y
# CONFIG_MIPS64 is not set
#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
#
# General setup
#
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
#
# Loadable module support
#
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
CONFIG_KMOD=y
#
# Machine selection
#
# CONFIG_ACER_PICA_61 is not set
# CONFIG_BAGET_MIPS is not set
# CONFIG_CASIO_E55 is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MIPS_EV96100 is not set
# CONFIG_MIPS_IVR is not set
# CONFIG_LASAT is not set
# CONFIG_HP_LASERJET is not set
# CONFIG_IBM_WORKPAD is not set
# CONFIG_MIPS_ITE8172 is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MAGNUM_4000 is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_NEC_EAGLE is not set
# CONFIG_OLIVETTI_M700 is not set
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
# CONFIG_TANBAC_TB0226 is not set
# CONFIG_TANBAC_TB0229 is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_TOSHIBA_RBTX4927 is not set
# CONFIG_VICTOR_MPC30X is not set
CONFIG_ZAO_CAPCELLA=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_NONCOHERENT_IO=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_IRQ_CPU=y
CONFIG_VR41XX_TIME_C=y
CONFIG_DUMMY_KEYB=y
CONFIG_VR41XX_COMMON=y
CONFIG_NEW_PCI=y
# CONFIG_FB is not set
#
# CPU selection
#
# CONFIG_CPU_MIPS32 is not set
# CONFIG_CPU_MIPS64 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_TX39XX is not set
CONFIG_CPU_VR41XX=y
# CONFIG_CPU_R4300 is not set
# CONFIG_CPU_R4X00 is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_R5432 is not set
# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_SB1 is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
CONFIG_KALLSYMS=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
CONFIG_PCI=y
CONFIG_PCI_LEGACY_PROC=y
CONFIG_PCI_NAMES=y
CONFIG_MMU=y
# CONFIG_HOTPLUG is not set
#
# Executable file formats
#
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set
#
# Plug and Play support
#
# CONFIG_PNP is not set
#
# Generic Driver Options
#
# CONFIG_FW_LOADER is not set
#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_UMEM is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
#
# ATA/ATAPI/MFM/RLL support
#
CONFIG_IDE=y
#
# IDE, ATA and ATAPI Block devices
#
CONFIG_BLK_DEV_IDE=y
#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_HD is not set
CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_IDEDISK_MULTI_MODE is not set
# CONFIG_IDEDISK_STROKE is not set
# CONFIG_BLK_DEV_IDECD is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
# CONFIG_IDE_TASK_IOCTL is not set
CONFIG_IDE_TASKFILE_IO=y
#
# IDE chipset support/bugfixes
#
# CONFIG_BLK_DEV_IDEPCI is not set
#
# SCSI device support
#
# CONFIG_SCSI is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
#
# Fusion MPT device support
#
#
# IEEE 1394 (FireWire) support (EXPERIMENTAL)
#
# CONFIG_IEEE1394 is not set
#
# I2O device support
#
# CONFIG_I2O is not set
#
# Networking support
#
CONFIG_NET=y
#
# Networking options
#
CONFIG_PACKET=y
CONFIG_PACKET_MMAP=y
CONFIG_NETLINK_DEV=y
# CONFIG_NETFILTER is not set
CONFIG_UNIX=y
CONFIG_NET_KEY=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
# CONFIG_IP_PNP_DHCP is not set
CONFIG_IP_PNP_BOOTP=y
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_ARPD is not set
# CONFIG_INET_ECN is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_IPV6 is not set
# CONFIG_XFRM_USER is not set
#
# SCTP Configuration (EXPERIMENTAL)
#
CONFIG_IPV6_SCTP__=y
# CONFIG_IP_SCTP is not set
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_LLC is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
CONFIG_NETDEVICES=y
#
# ARCnet devices
#
# CONFIG_ARCNET is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_ETHERTAP is not set
#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_MII is not set
# CONFIG_HAPPYMEAL is not set
# CONFIG_SUNGEM is not set
# CONFIG_NET_VENDOR_3COM is not set
#
# Tulip family network device support
#
# CONFIG_NET_TULIP is not set
# CONFIG_HP100 is not set
# CONFIG_NET_PCI is not set
#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_E1000 is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_R8169 is not set
# CONFIG_SK98LIN is not set
# CONFIG_TIGON3 is not set
#
# Ethernet (10000 Mbit)
#
# CONFIG_IXGB is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set
#
# Token Ring devices (depends on LLC=y)
#
# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set
#
# Wan interfaces
#
# CONFIG_WAN is not set
#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set
#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set
#
# ISDN subsystem
#
# CONFIG_ISDN_BOOL is not set
#
# Telephony Support
#
# CONFIG_PHONE is not set
#
# Input device support
#
CONFIG_INPUT=y
#
# Userland interfaces
#
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
#
# Input I/O drivers
#
# CONFIG_GAMEPORT is not set
CONFIG_SOUND_GAMEPORT=y
# CONFIG_SERIO is not set
#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
#
# Character devices
#
CONFIG_VT=y
# CONFIG_VT_CONSOLE is not set
CONFIG_HW_CONSOLE=y
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
# CONFIG_SERIAL_8250_EXTENDED is not set
#
# Non-8250 serial port support
#
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=256
#
# I2C support
#
# CONFIG_I2C is not set
#
# I2C Hardware Sensors Mainboard support
#
#
# I2C Hardware Sensors Chip support
#
# CONFIG_I2C_SENSOR is not set
#
# Mice
#
# CONFIG_BUSMOUSE is not set
# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
CONFIG_WATCHDOG=y
# CONFIG_WATCHDOG_NOWAYOUT is not set
# CONFIG_SOFT_WATCHDOG is not set
# CONFIG_WDT is not set
# CONFIG_WDTPCI is not set
# CONFIG_PCWATCHDOG is not set
# CONFIG_ACQUIRE_WDT is not set
# CONFIG_ADVANTECH_WDT is not set
# CONFIG_EUROTECH_WDT is not set
# CONFIG_IB700_WDT is not set
# CONFIG_I810_TCO is not set
# CONFIG_MIXCOMWD is not set
# CONFIG_SCx200_WDT is not set
# CONFIG_60XX_WDT is not set
# CONFIG_W83877F_WDT is not set
# CONFIG_MACHZ_WDT is not set
# CONFIG_SC520_WDT is not set
# CONFIG_AMD7XX_TCO is not set
# CONFIG_ALIM7101_WDT is not set
# CONFIG_SC1200_WDT is not set
# CONFIG_WAFER_WDT is not set
# CONFIG_CPU5_WDT is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_HANGCHECK_TIMER is not set
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
#
# Digital Video Broadcasting Devices
#
# CONFIG_DVB is not set
#
# File systems
#
CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
# CONFIG_EXT3_FS is not set
# CONFIG_JBD is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
CONFIG_AUTOFS_FS=y
CONFIG_AUTOFS4_FS=y
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
# CONFIG_FAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
# CONFIG_DEVFS_FS is not set
CONFIG_DEVPTS_FS=y
CONFIG_DEVPTS_FS_XATTR=y
CONFIG_DEVPTS_FS_SECURITY=y
# CONFIG_TMPFS is not set
CONFIG_RAMFS=y
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Network File Systems
#
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
# CONFIG_NFS_V4 is not set
CONFIG_NFSD=y
# CONFIG_NFSD_V3 is not set
# CONFIG_NFSD_TCP is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_EXPORTFS=y
CONFIG_SUNRPC=y
# CONFIG_SUNRPC_GSS is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_INTERMEZZO_FS is not set
# CONFIG_AFS_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
#
# Graphics support
#
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
# Sound
#
# CONFIG_SOUND is not set
#
# USB support
#
# CONFIG_USB is not set
# CONFIG_USB_GADGET is not set
#
# Bluetooth support
#
# CONFIG_BT is not set
#
# Kernel hacking
#
CONFIG_CROSSCOMPILE=y
# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
# CONFIG_CRYPTO is not set
#
# Library routines
#
# CONFIG_CRC32 is not set
arch/mips/defconfig-e55 0 → 100644
View file @ 4ee45a31
#
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
CONFIG_MIPS32=y
# CONFIG_MIPS64 is not set
#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
#
# General setup
#
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
#
# Loadable module support
#
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
CONFIG_KMOD=y
#
# Machine selection
#
# CONFIG_ACER_PICA_61 is not set
# CONFIG_BAGET_MIPS is not set
CONFIG_CASIO_E55=y
# CONFIG_MIPS_COBALT is not set
# CONFIG_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MIPS_EV96100 is not set
# CONFIG_MIPS_IVR is not set
# CONFIG_LASAT is not set
# CONFIG_HP_LASERJET is not set
# CONFIG_IBM_WORKPAD is not set
# CONFIG_MIPS_ITE8172 is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MAGNUM_4000 is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_NEC_EAGLE is not set
# CONFIG_OLIVETTI_M700 is not set
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
# CONFIG_TANBAC_TB0226 is not set
# CONFIG_TANBAC_TB0229 is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_TOSHIBA_RBTX4927 is not set
# CONFIG_VICTOR_MPC30X is not set
# CONFIG_ZAO_CAPCELLA is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_NONCOHERENT_IO=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_IRQ_CPU=y
CONFIG_VR41XX_TIME_C=y
CONFIG_DUMMY_KEYB=y
CONFIG_VR41XX_COMMON=y
# CONFIG_FB is not set
#
# CPU selection
#
# CONFIG_CPU_MIPS32 is not set
# CONFIG_CPU_MIPS64 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_TX39XX is not set
CONFIG_CPU_VR41XX=y
# CONFIG_CPU_R4300 is not set
# CONFIG_CPU_R4X00 is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_R5432 is not set
# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_SB1 is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
CONFIG_KALLSYMS=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
CONFIG_MMU=y
# CONFIG_HOTPLUG is not set
#
# Executable file formats
#
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set
#
# Plug and Play support
#
# CONFIG_PNP is not set
#
# Generic Driver Options
#
# CONFIG_FW_LOADER is not set
#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
#
# ATA/ATAPI/MFM/RLL support
#
CONFIG_IDE=y
#
# IDE, ATA and ATAPI Block devices
#
CONFIG_BLK_DEV_IDE=y
#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_HD is not set
CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_IDEDISK_MULTI_MODE is not set
# CONFIG_IDEDISK_STROKE is not set
# CONFIG_BLK_DEV_IDECD is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
# CONFIG_IDE_TASK_IOCTL is not set
CONFIG_IDE_TASKFILE_IO=y
#
# IDE chipset support/bugfixes
#
#
# SCSI device support
#
# CONFIG_SCSI is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
#
# Fusion MPT device support
#
#
# I2O device support
#
#
# Networking support
#
CONFIG_NET=y
#
# Networking options
#
CONFIG_PACKET=y
CONFIG_PACKET_MMAP=y
CONFIG_NETLINK_DEV=y
# CONFIG_NETFILTER is not set
CONFIG_UNIX=y
CONFIG_NET_KEY=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
# CONFIG_IP_ADVANCED_ROUTER is not set
# CONFIG_IP_PNP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_ARPD is not set
# CONFIG_INET_ECN is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_IPV6 is not set
# CONFIG_XFRM_USER is not set
#
# SCTP Configuration (EXPERIMENTAL)
#
CONFIG_IPV6_SCTP__=y
# CONFIG_IP_SCTP is not set
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_LLC is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
CONFIG_NETDEVICES=y
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_ETHERTAP is not set
#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_MII is not set
#
# Ethernet (1000 Mbit)
#
#
# Ethernet (10000 Mbit)
#
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set
#
# Token Ring devices (depends on LLC=y)
#
# CONFIG_SHAPER is not set
#
# Wan interfaces
#
# CONFIG_WAN is not set
#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set
#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set
#
# ISDN subsystem
#
# CONFIG_ISDN_BOOL is not set
#
# Telephony Support
#
# CONFIG_PHONE is not set
#
# Input device support
#
CONFIG_INPUT=y
#
# Userland interfaces
#
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
#
# Input I/O drivers
#
# CONFIG_GAMEPORT is not set
CONFIG_SOUND_GAMEPORT=y
# CONFIG_SERIO is not set
#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
#
# Character devices
#
CONFIG_VT=y
# CONFIG_VT_CONSOLE is not set
CONFIG_HW_CONSOLE=y
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
# CONFIG_SERIAL_8250_EXTENDED is not set
#
# Non-8250 serial port support
#
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=256
#
# I2C support
#
# CONFIG_I2C is not set
#
# I2C Hardware Sensors Mainboard support
#
#
# I2C Hardware Sensors Chip support
#
# CONFIG_I2C_SENSOR is not set
#
# Mice
#
# CONFIG_BUSMOUSE is not set
# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
CONFIG_WATCHDOG=y
# CONFIG_WATCHDOG_NOWAYOUT is not set
# CONFIG_SOFT_WATCHDOG is not set
# CONFIG_WDT is not set
# CONFIG_WDTPCI is not set
# CONFIG_PCWATCHDOG is not set
# CONFIG_ACQUIRE_WDT is not set
# CONFIG_ADVANTECH_WDT is not set
# CONFIG_EUROTECH_WDT is not set
# CONFIG_IB700_WDT is not set
# CONFIG_I810_TCO is not set
# CONFIG_MIXCOMWD is not set
# CONFIG_SCx200_WDT is not set
# CONFIG_60XX_WDT is not set
# CONFIG_W83877F_WDT is not set
# CONFIG_MACHZ_WDT is not set
# CONFIG_SC520_WDT is not set
# CONFIG_AMD7XX_TCO is not set
# CONFIG_ALIM7101_WDT is not set
# CONFIG_SC1200_WDT is not set
# CONFIG_WAFER_WDT is not set
# CONFIG_CPU5_WDT is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_HANGCHECK_TIMER is not set
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
#
# Digital Video Broadcasting Devices
#
# CONFIG_DVB is not set
#
# File systems
#
CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
# CONFIG_EXT3_FS is not set
# CONFIG_JBD is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
CONFIG_AUTOFS_FS=y
CONFIG_AUTOFS4_FS=y
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
# CONFIG_FAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
# CONFIG_DEVFS_FS is not set
CONFIG_DEVPTS_FS=y
CONFIG_DEVPTS_FS_XATTR=y
CONFIG_DEVPTS_FS_SECURITY=y
# CONFIG_TMPFS is not set
CONFIG_RAMFS=y
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Network File Systems
#
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
# CONFIG_NFS_V4 is not set
CONFIG_NFSD=y
# CONFIG_NFSD_V3 is not set
# CONFIG_NFSD_TCP is not set
CONFIG_LOCKD=y
CONFIG_EXPORTFS=y
CONFIG_SUNRPC=y
# CONFIG_SUNRPC_GSS is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_INTERMEZZO_FS is not set
# CONFIG_AFS_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
#
# Graphics support
#
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
# Sound
#
# CONFIG_SOUND is not set
#
# USB support
#
# CONFIG_USB_GADGET is not set
#
# Bluetooth support
#
# CONFIG_BT is not set
#
# Kernel hacking
#
CONFIG_CROSSCOMPILE=y
# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
# CONFIG_CRYPTO is not set
#
# Library routines
#
# CONFIG_CRC32 is not set
arch/mips/defconfig-eagle 0 → 100644
View file @ 4ee45a31
#
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
CONFIG_MIPS32=y
# CONFIG_MIPS64 is not set
#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
#
# General setup
#
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
#
# Loadable module support
#
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
CONFIG_KMOD=y
#
# Machine selection
#
# CONFIG_ACER_PICA_61 is not set
# CONFIG_BAGET_MIPS is not set
# CONFIG_CASIO_E55 is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MIPS_EV96100 is not set
# CONFIG_MIPS_IVR is not set
# CONFIG_LASAT is not set
# CONFIG_HP_LASERJET is not set
# CONFIG_IBM_WORKPAD is not set
# CONFIG_MIPS_ITE8172 is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MAGNUM_4000 is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
CONFIG_NEC_EAGLE=y
# CONFIG_OLIVETTI_M700 is not set
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
# CONFIG_TANBAC_TB0226 is not set
# CONFIG_TANBAC_TB0229 is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_TOSHIBA_RBTX4927 is not set
# CONFIG_VICTOR_MPC30X is not set
# CONFIG_ZAO_CAPCELLA is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_NONCOHERENT_IO=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_IRQ_CPU=y
CONFIG_VR41XX_TIME_C=y
CONFIG_DUMMY_KEYB=y
CONFIG_VR41XX_COMMON=y
CONFIG_VRC4173=y
CONFIG_NEW_PCI=y
# CONFIG_FB is not set
#
# CPU selection
#
# CONFIG_CPU_MIPS32 is not set
# CONFIG_CPU_MIPS64 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_TX39XX is not set
CONFIG_CPU_VR41XX=y
# CONFIG_CPU_R4300 is not set
# CONFIG_CPU_R4X00 is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_R5432 is not set
# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_SB1 is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
CONFIG_KALLSYMS=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
CONFIG_PCI=y
CONFIG_PCI_LEGACY_PROC=y
CONFIG_PCI_NAMES=y
CONFIG_MMU=y
CONFIG_HOTPLUG=y
#
# PCMCIA/CardBus support
#
CONFIG_PCMCIA=y
# CONFIG_YENTA is not set
# CONFIG_I82092 is not set
# CONFIG_TCIC is not set
# CONFIG_PCMCIA_VRC4173 is not set
#
# PCI Hotplug Support
#
# CONFIG_HOTPLUG_PCI is not set
#
# Executable file formats
#
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
#
# Memory Technology Devices (MTD)
#
CONFIG_MTD=y
# CONFIG_MTD_DEBUG is not set
# CONFIG_MTD_PARTITIONS is not set
# CONFIG_MTD_CONCAT is not set
#
# User Modules And Translation Layers
#
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
# CONFIG_FTL is not set
# CONFIG_NFTL is not set
# CONFIG_INFTL is not set
#
# RAM/ROM/Flash chip drivers
#
CONFIG_MTD_CFI=y
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_GEN_PROBE=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_NOSWAP=y
# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
# CONFIG_MTD_CFI_GEOMETRY is not set
CONFIG_MTD_CFI_INTELEXT=y
# CONFIG_MTD_CFI_AMDSTD is not set
# CONFIG_MTD_CFI_STAA is not set
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_ABSENT is not set
# CONFIG_MTD_OBSOLETE_CHIPS is not set
#
# Mapping drivers for chip access
#
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_PHYSMAP_START=0x1c000000
CONFIG_MTD_PHYSMAP_LEN=0x2000000
CONFIG_MTD_PHYSMAP_BUSWIDTH=4
#
# Self-contained MTD device drivers
#
# CONFIG_MTD_PMC551 is not set
# CONFIG_MTD_SLRAM is not set
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_BLKMTD is not set
#
# Disk-On-Chip Device Drivers
#
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set
#
# NAND Flash Device Drivers
#
# CONFIG_MTD_NAND is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set
#
# Plug and Play support
#
# CONFIG_PNP is not set
#
# Generic Driver Options
#
# CONFIG_FW_LOADER is not set
#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_UMEM is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
#
# ATA/ATAPI/MFM/RLL support
#
CONFIG_IDE=y
#
# IDE, ATA and ATAPI Block devices
#
CONFIG_BLK_DEV_IDE=y
#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_HD is not set
CONFIG_BLK_DEV_IDEDISK=y
CONFIG_IDEDISK_MULTI_MODE=y
# CONFIG_IDEDISK_STROKE is not set
CONFIG_BLK_DEV_IDECS=y
# CONFIG_BLK_DEV_IDECD is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
# CONFIG_IDE_TASK_IOCTL is not set
CONFIG_IDE_TASKFILE_IO=y
#
# IDE chipset support/bugfixes
#
# CONFIG_BLK_DEV_IDEPCI is not set
#
# SCSI device support
#
# CONFIG_SCSI is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
#
# Fusion MPT device support
#
#
# IEEE 1394 (FireWire) support (EXPERIMENTAL)
#
# CONFIG_IEEE1394 is not set
#
# I2O device support
#
# CONFIG_I2O is not set
#
# Networking support
#
CONFIG_NET=y
#
# Networking options
#
CONFIG_PACKET=y
CONFIG_PACKET_MMAP=y
CONFIG_NETLINK_DEV=y
# CONFIG_NETFILTER is not set
CONFIG_UNIX=y
CONFIG_NET_KEY=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
# CONFIG_IP_PNP_DHCP is not set
CONFIG_IP_PNP_BOOTP=y
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_ARPD is not set
# CONFIG_INET_ECN is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_IPV6 is not set
# CONFIG_XFRM_USER is not set
#
# SCTP Configuration (EXPERIMENTAL)
#
CONFIG_IPV6_SCTP__=y
# CONFIG_IP_SCTP is not set
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_LLC is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
CONFIG_NETDEVICES=y
#
# ARCnet devices
#
# CONFIG_ARCNET is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_ETHERTAP is not set
#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_MII is not set
# CONFIG_HAPPYMEAL is not set
# CONFIG_SUNGEM is not set
# CONFIG_NET_VENDOR_3COM is not set
#
# Tulip family network device support
#
# CONFIG_NET_TULIP is not set
# CONFIG_HP100 is not set
# CONFIG_NET_PCI is not set
#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_E1000 is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_R8169 is not set
# CONFIG_SK98LIN is not set
# CONFIG_TIGON3 is not set
#
# Ethernet (10000 Mbit)
#
# CONFIG_IXGB is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set
#
# Token Ring devices (depends on LLC=y)
#
# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set
#
# Wan interfaces
#
# CONFIG_WAN is not set
#
# PCMCIA network device support
#
CONFIG_NET_PCMCIA=y
# CONFIG_PCMCIA_3C589 is not set
# CONFIG_PCMCIA_3C574 is not set
CONFIG_PCMCIA_FMVJ18X=y
CONFIG_PCMCIA_PCNET=m
# CONFIG_PCMCIA_NMCLAN is not set
# CONFIG_PCMCIA_SMC91C92 is not set
# CONFIG_PCMCIA_XIRC2PS is not set
# CONFIG_PCMCIA_AXNET is not set
#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set
#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set
#
# ISDN subsystem
#
# CONFIG_ISDN_BOOL is not set
#
# Telephony Support
#
# CONFIG_PHONE is not set
#
# Input device support
#
CONFIG_INPUT=y
#
# Userland interfaces
#
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
#
# Input I/O drivers
#
# CONFIG_GAMEPORT is not set
CONFIG_SOUND_GAMEPORT=y
# CONFIG_SERIO is not set
#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
#
# Character devices
#
CONFIG_VT=y
# CONFIG_VT_CONSOLE is not set
CONFIG_HW_CONSOLE=y
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
# CONFIG_SERIAL_8250_CS is not set
# CONFIG_SERIAL_8250_EXTENDED is not set
#
# Non-8250 serial port support
#
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=256
#
# I2C support
#
# CONFIG_I2C is not set
#
# I2C Hardware Sensors Mainboard support
#
#
# I2C Hardware Sensors Chip support
#
# CONFIG_I2C_SENSOR is not set
#
# Mice
#
# CONFIG_BUSMOUSE is not set
# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
CONFIG_WATCHDOG=y
# CONFIG_WATCHDOG_NOWAYOUT is not set
# CONFIG_SOFT_WATCHDOG is not set
# CONFIG_WDT is not set
# CONFIG_WDTPCI is not set
# CONFIG_PCWATCHDOG is not set
# CONFIG_ACQUIRE_WDT is not set
# CONFIG_ADVANTECH_WDT is not set
# CONFIG_EUROTECH_WDT is not set
# CONFIG_IB700_WDT is not set
# CONFIG_I810_TCO is not set
# CONFIG_MIXCOMWD is not set
# CONFIG_SCx200_WDT is not set
# CONFIG_60XX_WDT is not set
# CONFIG_W83877F_WDT is not set
# CONFIG_MACHZ_WDT is not set
# CONFIG_SC520_WDT is not set
# CONFIG_AMD7XX_TCO is not set
# CONFIG_ALIM7101_WDT is not set
# CONFIG_SC1200_WDT is not set
# CONFIG_WAFER_WDT is not set
# CONFIG_CPU5_WDT is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
#
# PCMCIA character devices
#
# CONFIG_SYNCLINK_CS is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_HANGCHECK_TIMER is not set
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
#
# Digital Video Broadcasting Devices
#
# CONFIG_DVB is not set
#
# File systems
#
CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
# CONFIG_EXT3_FS is not set
# CONFIG_JBD is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
CONFIG_AUTOFS_FS=y
CONFIG_AUTOFS4_FS=y
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
# CONFIG_FAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
# CONFIG_DEVFS_FS is not set
CONFIG_DEVPTS_FS=y
CONFIG_DEVPTS_FS_XATTR=y
CONFIG_DEVPTS_FS_SECURITY=y
# CONFIG_TMPFS is not set
CONFIG_RAMFS=y
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
CONFIG_JFFS_FS=y
CONFIG_JFFS_FS_VERBOSE=0
CONFIG_JFFS2_FS=y
CONFIG_JFFS2_FS_DEBUG=0
# CONFIG_JFFS2_FS_NAND is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Network File Systems
#
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
# CONFIG_NFS_V4 is not set
CONFIG_NFSD=y
# CONFIG_NFSD_V3 is not set
# CONFIG_NFSD_TCP is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_EXPORTFS=y
CONFIG_SUNRPC=y
# CONFIG_SUNRPC_GSS is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_INTERMEZZO_FS is not set
# CONFIG_AFS_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
#
# Graphics support
#
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
# Sound
#
# CONFIG_SOUND is not set
#
# USB support
#
# CONFIG_USB is not set
# CONFIG_USB_GADGET is not set
#
# Bluetooth support
#
# CONFIG_BT is not set
#
# Kernel hacking
#
CONFIG_CROSSCOMPILE=y
# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
CONFIG_CRYPTO=y
CONFIG_CRYPTO_HMAC=y
CONFIG_CRYPTO_NULL=y
# CONFIG_CRYPTO_MD4 is not set
# CONFIG_CRYPTO_MD5 is not set
# CONFIG_CRYPTO_SHA1 is not set
# CONFIG_CRYPTO_SHA256 is not set
CONFIG_CRYPTO_SHA512=y
# CONFIG_CRYPTO_DES is not set
# CONFIG_CRYPTO_BLOWFISH is not set
CONFIG_CRYPTO_TWOFISH=y
# CONFIG_CRYPTO_SERPENT is not set
CONFIG_CRYPTO_AES=y
CONFIG_CRYPTO_DEFLATE=y
# CONFIG_CRYPTO_TEST is not set
#
# Library routines
#
# CONFIG_CRC32 is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
arch/mips/defconfig-mpc30x 0 → 100644
View file @ 4ee45a31
#
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
CONFIG_MIPS32=y
# CONFIG_MIPS64 is not set
#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
#
# General setup
#
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
#
# Loadable module support
#
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
CONFIG_KMOD=y
#
# Machine selection
#
# CONFIG_ACER_PICA_61 is not set
# CONFIG_BAGET_MIPS is not set
# CONFIG_CASIO_E55 is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MIPS_EV96100 is not set
# CONFIG_MIPS_IVR is not set
# CONFIG_LASAT is not set
# CONFIG_HP_LASERJET is not set
# CONFIG_IBM_WORKPAD is not set
# CONFIG_MIPS_ITE8172 is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MAGNUM_4000 is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_NEC_EAGLE is not set
# CONFIG_OLIVETTI_M700 is not set
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
# CONFIG_TANBAC_TB0226 is not set
# CONFIG_TANBAC_TB0229 is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_TOSHIBA_RBTX4927 is not set
CONFIG_VICTOR_MPC30X=y
# CONFIG_ZAO_CAPCELLA is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_NONCOHERENT_IO=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_IRQ_CPU=y
CONFIG_VR41XX_TIME_C=y
CONFIG_DUMMY_KEYB=y
CONFIG_VR41XX_COMMON=y
CONFIG_VRC4173=y
CONFIG_NEW_PCI=y
# CONFIG_FB is not set
#
# CPU selection
#
# CONFIG_CPU_MIPS32 is not set
# CONFIG_CPU_MIPS64 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_TX39XX is not set
CONFIG_CPU_VR41XX=y
# CONFIG_CPU_R4300 is not set
# CONFIG_CPU_R4X00 is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_R5432 is not set
# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_SB1 is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
CONFIG_KALLSYMS=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
# CONFIG_PCI is not set
CONFIG_MMU=y
# CONFIG_HOTPLUG is not set
#
# Executable file formats
#
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set
#
# Plug and Play support
#
# CONFIG_PNP is not set
#
# Generic Driver Options
#
# CONFIG_FW_LOADER is not set
#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
#
# ATA/ATAPI/MFM/RLL support
#
# CONFIG_IDE is not set
#
# SCSI device support
#
# CONFIG_SCSI is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
#
# Fusion MPT device support
#
#
# I2O device support
#
#
# Networking support
#
CONFIG_NET=y
#
# Networking options
#
CONFIG_PACKET=y
CONFIG_PACKET_MMAP=y
CONFIG_NETLINK_DEV=y
# CONFIG_NETFILTER is not set
CONFIG_UNIX=y
CONFIG_NET_KEY=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
# CONFIG_IP_PNP_DHCP is not set
CONFIG_IP_PNP_BOOTP=y
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_ARPD is not set
# CONFIG_INET_ECN is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_IPV6 is not set
# CONFIG_XFRM_USER is not set
#
# SCTP Configuration (EXPERIMENTAL)
#
CONFIG_IPV6_SCTP__=y
# CONFIG_IP_SCTP is not set
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_LLC is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
CONFIG_NETDEVICES=y
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_ETHERTAP is not set
#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_MII is not set
#
# Ethernet (1000 Mbit)
#
#
# Ethernet (10000 Mbit)
#
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set
#
# Token Ring devices (depends on LLC=y)
#
# CONFIG_SHAPER is not set
#
# Wan interfaces
#
# CONFIG_WAN is not set
#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set
#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set
#
# ISDN subsystem
#
# CONFIG_ISDN_BOOL is not set
#
# Telephony Support
#
# CONFIG_PHONE is not set
#
# Input device support
#
CONFIG_INPUT=y
#
# Userland interfaces
#
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
#
# Input I/O drivers
#
# CONFIG_GAMEPORT is not set
CONFIG_SOUND_GAMEPORT=y
# CONFIG_SERIO is not set
#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
#
# Character devices
#
CONFIG_VT=y
# CONFIG_VT_CONSOLE is not set
CONFIG_HW_CONSOLE=y
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
# CONFIG_SERIAL_8250_EXTENDED is not set
#
# Non-8250 serial port support
#
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=256
#
# I2C support
#
# CONFIG_I2C is not set
#
# I2C Hardware Sensors Mainboard support
#
#
# I2C Hardware Sensors Chip support
#
# CONFIG_I2C_SENSOR is not set
#
# Mice
#
# CONFIG_BUSMOUSE is not set
# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_HANGCHECK_TIMER is not set
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
#
# Digital Video Broadcasting Devices
#
# CONFIG_DVB is not set
#
# File systems
#
CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
# CONFIG_EXT3_FS is not set
# CONFIG_JBD is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
CONFIG_AUTOFS_FS=y
CONFIG_AUTOFS4_FS=y
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
# CONFIG_FAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
# CONFIG_DEVFS_FS is not set
CONFIG_DEVPTS_FS=y
CONFIG_DEVPTS_FS_XATTR=y
CONFIG_DEVPTS_FS_SECURITY=y
# CONFIG_TMPFS is not set
CONFIG_RAMFS=y
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Network File Systems
#
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
# CONFIG_NFS_V4 is not set
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
# CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y
# CONFIG_SUNRPC_GSS is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_INTERMEZZO_FS is not set
# CONFIG_AFS_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
#
# Graphics support
#
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
# Sound
#
# CONFIG_SOUND is not set
#
# USB support
#
# CONFIG_USB_GADGET is not set
#
# Bluetooth support
#
# CONFIG_BT is not set
#
# Kernel hacking
#
CONFIG_CROSSCOMPILE=y
# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
CONFIG_CRYPTO=y
CONFIG_CRYPTO_HMAC=y
CONFIG_CRYPTO_NULL=y
# CONFIG_CRYPTO_MD4 is not set
# CONFIG_CRYPTO_MD5 is not set
# CONFIG_CRYPTO_SHA1 is not set
# CONFIG_CRYPTO_SHA256 is not set
CONFIG_CRYPTO_SHA512=y
# CONFIG_CRYPTO_DES is not set
# CONFIG_CRYPTO_BLOWFISH is not set
CONFIG_CRYPTO_TWOFISH=y
# CONFIG_CRYPTO_SERPENT is not set
CONFIG_CRYPTO_AES=y
CONFIG_CRYPTO_DEFLATE=y
# CONFIG_CRYPTO_TEST is not set
#
# Library routines
#
# CONFIG_CRC32 is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
arch/mips/defconfig-tb0226 0 → 100644
View file @ 4ee45a31
#
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
CONFIG_MIPS32=y
# CONFIG_MIPS64 is not set
#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
#
# General setup
#
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
#
# Loadable module support
#
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
CONFIG_KMOD=y
#
# Machine selection
#
# CONFIG_ACER_PICA_61 is not set
# CONFIG_BAGET_MIPS is not set
# CONFIG_CASIO_E55 is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MIPS_EV96100 is not set
# CONFIG_MIPS_IVR is not set
# CONFIG_LASAT is not set
# CONFIG_HP_LASERJET is not set
# CONFIG_IBM_WORKPAD is not set
# CONFIG_MIPS_ITE8172 is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MAGNUM_4000 is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_NEC_EAGLE is not set
# CONFIG_OLIVETTI_M700 is not set
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
CONFIG_TANBAC_TB0226=y
# CONFIG_TANBAC_TB0229 is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_TOSHIBA_RBTX4927 is not set
# CONFIG_VICTOR_MPC30X is not set
# CONFIG_ZAO_CAPCELLA is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_ISA_DMA=y
CONFIG_NONCOHERENT_IO=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_IRQ_CPU=y
CONFIG_VR41XX_TIME_C=y
CONFIG_DUMMY_KEYB=y
CONFIG_VR41XX_COMMON=y
CONFIG_NEW_PCI=y
CONFIG_FB=y
#
# CPU selection
#
# CONFIG_CPU_MIPS32 is not set
# CONFIG_CPU_MIPS64 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_TX39XX is not set
CONFIG_CPU_VR41XX=y
# CONFIG_CPU_R4300 is not set
# CONFIG_CPU_R4X00 is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_R5432 is not set
# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_SB1 is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
CONFIG_KALLSYMS=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
# CONFIG_PCI is not set
CONFIG_MMU=y
# CONFIG_HOTPLUG is not set
#
# Executable file formats
#
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set
#
# Plug and Play support
#
# CONFIG_PNP is not set
#
# Generic Driver Options
#
# CONFIG_FW_LOADER is not set
#
# Block devices
#
CONFIG_BLK_DEV_FD=y
CONFIG_BLK_DEV_LOOP=m
CONFIG_BLK_DEV_NBD=m
CONFIG_BLK_DEV_RAM=m
CONFIG_BLK_DEV_RAM_SIZE=4096
# CONFIG_BLK_DEV_INITRD is not set
#
# ATA/ATAPI/MFM/RLL support
#
CONFIG_IDE=y
#
# IDE, ATA and ATAPI Block devices
#
CONFIG_BLK_DEV_IDE=y
#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_HD is not set
CONFIG_BLK_DEV_IDEDISK=y
CONFIG_IDEDISK_MULTI_MODE=y
# CONFIG_IDEDISK_STROKE is not set
# CONFIG_BLK_DEV_IDECD is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
CONFIG_BLK_DEV_IDESCSI=y
# CONFIG_IDE_TASK_IOCTL is not set
CONFIG_IDE_TASKFILE_IO=y
#
# IDE chipset support/bugfixes
#
#
# SCSI device support
#
CONFIG_SCSI=y
#
# SCSI support type (disk, tape, CD-ROM)
#
CONFIG_BLK_DEV_SD=y
# CONFIG_CHR_DEV_ST is not set
# CONFIG_CHR_DEV_OSST is not set
CONFIG_BLK_DEV_SR=y
# CONFIG_BLK_DEV_SR_VENDOR is not set
CONFIG_CHR_DEV_SG=y
#
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
#
CONFIG_SCSI_MULTI_LUN=y
# CONFIG_SCSI_REPORT_LUNS is not set
CONFIG_SCSI_CONSTANTS=y
# CONFIG_SCSI_LOGGING is not set
#
# SCSI low-level drivers
#
# CONFIG_SCSI_AIC7XXX is not set
# CONFIG_SCSI_AIC7XXX_OLD is not set
# CONFIG_SCSI_DPT_I2O is not set
# CONFIG_SCSI_EATA_PIO is not set
# CONFIG_SCSI_DEBUG is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
#
# Fusion MPT device support
#
# CONFIG_FUSION is not set
#
# I2O device support
#
#
# Networking support
#
CONFIG_NET=y
#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
CONFIG_NETLINK_DEV=m
# CONFIG_NETFILTER is not set
CONFIG_UNIX=y
# CONFIG_NET_KEY is not set
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_IP_MULTIPLE_TABLES=y
CONFIG_IP_ROUTE_NAT=y
CONFIG_IP_ROUTE_MULTIPATH=y
CONFIG_IP_ROUTE_TOS=y
CONFIG_IP_ROUTE_VERBOSE=y
CONFIG_IP_PNP=y
# CONFIG_IP_PNP_DHCP is not set
CONFIG_IP_PNP_BOOTP=y
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_ARPD is not set
# CONFIG_INET_ECN is not set
CONFIG_SYN_COOKIES=y
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_IPV6 is not set
# CONFIG_XFRM_USER is not set
#
# SCTP Configuration (EXPERIMENTAL)
#
CONFIG_IPV6_SCTP__=y
# CONFIG_IP_SCTP is not set
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_LLC is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
CONFIG_NETDEVICES=y
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_ETHERTAP is not set
#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_MII is not set
#
# Ethernet (1000 Mbit)
#
#
# Ethernet (10000 Mbit)
#
CONFIG_PPP=m
CONFIG_PPP_MULTILINK=y
# CONFIG_PPP_FILTER is not set
CONFIG_PPP_ASYNC=m
CONFIG_PPP_SYNC_TTY=m
CONFIG_PPP_DEFLATE=m
CONFIG_PPP_BSDCOMP=m
CONFIG_PPPOE=m
# CONFIG_SLIP is not set
#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set
#
# Token Ring devices (depends on LLC=y)
#
# CONFIG_SHAPER is not set
#
# Wan interfaces
#
# CONFIG_WAN is not set
#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set
#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set
#
# ISDN subsystem
#
# CONFIG_ISDN_BOOL is not set
#
# Telephony Support
#
# CONFIG_PHONE is not set
#
# Input device support
#
CONFIG_INPUT=y
#
# Userland interfaces
#
CONFIG_INPUT_MOUSEDEV=m
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1280
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=1024
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
#
# Input I/O drivers
#
# CONFIG_GAMEPORT is not set
CONFIG_SOUND_GAMEPORT=y
# CONFIG_SERIO is not set
#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
#
# Character devices
#
CONFIG_VT=y
# CONFIG_VT_CONSOLE is not set
CONFIG_HW_CONSOLE=y
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
# CONFIG_SERIAL_8250_EXTENDED is not set
#
# Non-8250 serial port support
#
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=256
#
# I2C support
#
# CONFIG_I2C is not set
#
# I2C Hardware Sensors Mainboard support
#
#
# I2C Hardware Sensors Chip support
#
# CONFIG_I2C_SENSOR is not set
#
# Mice
#
# CONFIG_BUSMOUSE is not set
# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_HANGCHECK_TIMER is not set
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
#
# Digital Video Broadcasting Devices
#
# CONFIG_DVB is not set
#
# File systems
#
CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
# CONFIG_EXT3_FS is not set
# CONFIG_JBD is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
CONFIG_ROMFS_FS=m
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS_FS is not set
CONFIG_AUTOFS4_FS=y
#
# CD-ROM/DVD Filesystems
#
CONFIG_ISO9660_FS=y
CONFIG_JOLIET=y
CONFIG_ZISOFS=y
CONFIG_ZISOFS_FS=y
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
CONFIG_FAT_FS=m
CONFIG_MSDOS_FS=m
CONFIG_VFAT_FS=m
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
# CONFIG_DEVFS_FS is not set
CONFIG_DEVPTS_FS=y
CONFIG_DEVPTS_FS_XATTR=y
CONFIG_DEVPTS_FS_SECURITY=y
CONFIG_TMPFS=y
CONFIG_RAMFS=y
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
CONFIG_CRAMFS=m
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Network File Systems
#
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
# CONFIG_NFS_V4 is not set
CONFIG_NFSD=m
CONFIG_NFSD_V3=y
# CONFIG_NFSD_V4 is not set
# CONFIG_NFSD_TCP is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
CONFIG_EXPORTFS=m
CONFIG_SUNRPC=y
# CONFIG_SUNRPC_GSS is not set
CONFIG_SMB_FS=m
CONFIG_SMB_NLS_DEFAULT=y
CONFIG_SMB_NLS_REMOTE="cp932"
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_INTERMEZZO_FS is not set
# CONFIG_AFS_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
CONFIG_SMB_NLS=y
CONFIG_NLS=y
#
# Native Language Support
#
CONFIG_NLS_DEFAULT="iso8859-1"
CONFIG_NLS_CODEPAGE_437=m
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
# CONFIG_NLS_CODEPAGE_850 is not set
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
CONFIG_NLS_CODEPAGE_932=m
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
CONFIG_NLS_ISO8859_1=m
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_UTF8 is not set
#
# Graphics support
#
# CONFIG_FB_VIRTUAL is not set
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
# CONFIG_FRAMEBUFFER_CONSOLE is not set
#
# Logo configuration
#
# CONFIG_LOGO is not set
#
# Sound
#
CONFIG_SOUND=y
#
# Advanced Linux Sound Architecture
#
# CONFIG_SND is not set
#
# Open Sound System
#
# CONFIG_SOUND_PRIME is not set
#
# USB support
#
# CONFIG_USB_GADGET is not set
#
# Bluetooth support
#
# CONFIG_BT is not set
#
# Kernel hacking
#
CONFIG_CROSSCOMPILE=y
# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
# CONFIG_CRYPTO is not set
#
# Library routines
#
# CONFIG_CRC32 is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=m
arch/mips/defconfig-tb0229 0 → 100644
View file @ 4ee45a31
#
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
CONFIG_MIPS32=y
# CONFIG_MIPS64 is not set
#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
#
# General setup
#
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
#
# Loadable module support
#
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
CONFIG_KMOD=y
#
# Machine selection
#
# CONFIG_ACER_PICA_61 is not set
# CONFIG_BAGET_MIPS is not set
# CONFIG_CASIO_E55 is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MIPS_EV96100 is not set
# CONFIG_MIPS_IVR is not set
# CONFIG_LASAT is not set
# CONFIG_HP_LASERJET is not set
# CONFIG_IBM_WORKPAD is not set
# CONFIG_MIPS_ITE8172 is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MAGNUM_4000 is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_NEC_EAGLE is not set
# CONFIG_OLIVETTI_M700 is not set
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
# CONFIG_TANBAC_TB0226 is not set
CONFIG_TANBAC_TB0229=y
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_TOSHIBA_RBTX4927 is not set
# CONFIG_VICTOR_MPC30X is not set
# CONFIG_ZAO_CAPCELLA is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_NONCOHERENT_IO=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_IRQ_CPU=y
CONFIG_VR41XX_TIME_C=y
CONFIG_DUMMY_KEYB=y
CONFIG_VR41XX_COMMON=y
CONFIG_NEW_PCI=y
# CONFIG_FB is not set
CONFIG_TANBAC_TB0219=y
#
# CPU selection
#
# CONFIG_CPU_MIPS32 is not set
# CONFIG_CPU_MIPS64 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_TX39XX is not set
CONFIG_CPU_VR41XX=y
# CONFIG_CPU_R4300 is not set
# CONFIG_CPU_R4X00 is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_R5432 is not set
# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_SB1 is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
CONFIG_KALLSYMS=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
CONFIG_PCI=y
CONFIG_PCI_LEGACY_PROC=y
CONFIG_PCI_NAMES=y
CONFIG_MMU=y
# CONFIG_HOTPLUG is not set
#
# Executable file formats
#
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set
#
# Plug and Play support
#
# CONFIG_PNP is not set
#
# Generic Driver Options
#
# CONFIG_FW_LOADER is not set
#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_UMEM is not set
CONFIG_BLK_DEV_LOOP=m
CONFIG_BLK_DEV_NBD=m
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
# CONFIG_BLK_DEV_INITRD is not set
#
# ATA/ATAPI/MFM/RLL support
#
# CONFIG_IDE is not set
#
# SCSI device support
#
# CONFIG_SCSI is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
#
# Fusion MPT device support
#
#
# IEEE 1394 (FireWire) support (EXPERIMENTAL)
#
# CONFIG_IEEE1394 is not set
#
# I2O device support
#
# CONFIG_I2O is not set
#
# Networking support
#
CONFIG_NET=y
#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
CONFIG_NETLINK_DEV=m
# CONFIG_NETFILTER is not set
CONFIG_UNIX=y
# CONFIG_NET_KEY is not set
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_IP_MULTIPLE_TABLES=y
CONFIG_IP_ROUTE_NAT=y
CONFIG_IP_ROUTE_MULTIPATH=y
CONFIG_IP_ROUTE_TOS=y
CONFIG_IP_ROUTE_VERBOSE=y
CONFIG_IP_PNP=y
# CONFIG_IP_PNP_DHCP is not set
CONFIG_IP_PNP_BOOTP=y
# CONFIG_IP_PNP_RARP is not set
CONFIG_NET_IPIP=m
CONFIG_NET_IPGRE=m
# CONFIG_NET_IPGRE_BROADCAST is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_ARPD is not set
# CONFIG_INET_ECN is not set
CONFIG_SYN_COOKIES=y
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_IPV6 is not set
# CONFIG_XFRM_USER is not set
#
# SCTP Configuration (EXPERIMENTAL)
#
CONFIG_IPV6_SCTP__=y
# CONFIG_IP_SCTP is not set
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_LLC is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
CONFIG_NETDEVICES=y
#
# ARCnet devices
#
# CONFIG_ARCNET is not set
CONFIG_DUMMY=m
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_ETHERTAP is not set
#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_MII is not set
# CONFIG_HAPPYMEAL is not set
# CONFIG_SUNGEM is not set
# CONFIG_NET_VENDOR_3COM is not set
#
# Tulip family network device support
#
# CONFIG_NET_TULIP is not set
# CONFIG_HP100 is not set
# CONFIG_NET_PCI is not set
#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_E1000 is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_R8169 is not set
# CONFIG_SK98LIN is not set
# CONFIG_TIGON3 is not set
#
# Ethernet (10000 Mbit)
#
# CONFIG_IXGB is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
CONFIG_PPP=m
CONFIG_PPP_MULTILINK=y
CONFIG_PPP_FILTER=y
CONFIG_PPP_ASYNC=m
CONFIG_PPP_SYNC_TTY=m
CONFIG_PPP_DEFLATE=m
CONFIG_PPP_BSDCOMP=m
CONFIG_PPPOE=m
CONFIG_SLIP=m
CONFIG_SLIP_COMPRESSED=y
CONFIG_SLIP_SMART=y
CONFIG_SLIP_MODE_SLIP6=y
#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set
#
# Token Ring devices (depends on LLC=y)
#
# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set
#
# Wan interfaces
#
# CONFIG_WAN is not set
#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set
#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set
#
# ISDN subsystem
#
# CONFIG_ISDN_BOOL is not set
#
# Telephony Support
#
# CONFIG_PHONE is not set
#
# Input device support
#
CONFIG_INPUT=y
#
# Userland interfaces
#
CONFIG_INPUT_MOUSEDEV=m
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1280
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=1024
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
#
# Input I/O drivers
#
# CONFIG_GAMEPORT is not set
CONFIG_SOUND_GAMEPORT=y
# CONFIG_SERIO is not set
#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
#
# Character devices
#
CONFIG_VT=y
# CONFIG_VT_CONSOLE is not set
CONFIG_HW_CONSOLE=y
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
# CONFIG_SERIAL_8250_EXTENDED is not set
#
# Non-8250 serial port support
#
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=256
#
# I2C support
#
# CONFIG_I2C is not set
#
# I2C Hardware Sensors Mainboard support
#
#
# I2C Hardware Sensors Chip support
#
# CONFIG_I2C_SENSOR is not set
#
# Mice
#
# CONFIG_BUSMOUSE is not set
# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_HANGCHECK_TIMER is not set
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
#
# Digital Video Broadcasting Devices
#
# CONFIG_DVB is not set
#
# File systems
#
CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
CONFIG_EXT3_FS=m
CONFIG_EXT3_FS_XATTR=y
# CONFIG_EXT3_FS_POSIX_ACL is not set
CONFIG_EXT3_FS_SECURITY=y
CONFIG_JBD=m
# CONFIG_JBD_DEBUG is not set
CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
CONFIG_JFS_FS=m
# CONFIG_JFS_POSIX_ACL is not set
# CONFIG_JFS_DEBUG is not set
# CONFIG_JFS_STATISTICS is not set
CONFIG_XFS_FS=y
# CONFIG_XFS_RT is not set
CONFIG_XFS_QUOTA=y
CONFIG_XFS_POSIX_ACL=y
# CONFIG_MINIX_FS is not set
CONFIG_ROMFS_FS=m
# CONFIG_QUOTA is not set
CONFIG_QUOTACTL=y
# CONFIG_AUTOFS_FS is not set
CONFIG_AUTOFS4_FS=y
#
# CD-ROM/DVD Filesystems
#
CONFIG_ISO9660_FS=y
CONFIG_JOLIET=y
CONFIG_ZISOFS=y
CONFIG_ZISOFS_FS=y
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
CONFIG_FAT_FS=m
CONFIG_MSDOS_FS=m
CONFIG_VFAT_FS=m
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
# CONFIG_DEVFS_FS is not set
CONFIG_DEVPTS_FS=y
CONFIG_DEVPTS_FS_XATTR=y
CONFIG_DEVPTS_FS_SECURITY=y
CONFIG_TMPFS=y
CONFIG_RAMFS=y
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
CONFIG_CRAMFS=m
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Network File Systems
#
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
# CONFIG_NFS_V4 is not set
CONFIG_NFSD=y
CONFIG_NFSD_V3=y
# CONFIG_NFSD_V4 is not set
CONFIG_NFSD_TCP=y
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
CONFIG_EXPORTFS=y
CONFIG_SUNRPC=y
# CONFIG_SUNRPC_GSS is not set
CONFIG_SMB_FS=m
CONFIG_SMB_NLS_DEFAULT=y
CONFIG_SMB_NLS_REMOTE="cp932"
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_INTERMEZZO_FS is not set
# CONFIG_AFS_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
CONFIG_SMB_NLS=y
CONFIG_NLS=y
#
# Native Language Support
#
CONFIG_NLS_DEFAULT="iso8859-1"
CONFIG_NLS_CODEPAGE_437=m
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
# CONFIG_NLS_CODEPAGE_850 is not set
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
CONFIG_NLS_CODEPAGE_932=m
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
CONFIG_NLS_ISO8859_1=m
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_UTF8 is not set
#
# Graphics support
#
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
# Sound
#
# CONFIG_SOUND is not set
#
# USB support
#
# CONFIG_USB is not set
# CONFIG_USB_GADGET is not set
#
# Bluetooth support
#
# CONFIG_BT is not set
#
# Kernel hacking
#
CONFIG_CROSSCOMPILE=y
# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
# CONFIG_CRYPTO is not set
#
# Library routines
#
# CONFIG_CRC32 is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=m
arch/mips/defconfig-workpad 0 → 100644
View file @ 4ee45a31
#
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
CONFIG_MIPS32=y
# CONFIG_MIPS64 is not set
#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
#
# General setup
#
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
#
# Loadable module support
#
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
CONFIG_KMOD=y
#
# Machine selection
#
# CONFIG_ACER_PICA_61 is not set
# CONFIG_BAGET_MIPS is not set
# CONFIG_CASIO_E55 is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MIPS_EV96100 is not set
# CONFIG_MIPS_IVR is not set
# CONFIG_LASAT is not set
# CONFIG_HP_LASERJET is not set
CONFIG_IBM_WORKPAD=y
# CONFIG_MIPS_ITE8172 is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MAGNUM_4000 is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_NEC_EAGLE is not set
# CONFIG_OLIVETTI_M700 is not set
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
# CONFIG_TANBAC_TB0226 is not set
# CONFIG_TANBAC_TB0229 is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_TOSHIBA_RBTX4927 is not set
# CONFIG_VICTOR_MPC30X is not set
# CONFIG_ZAO_CAPCELLA is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_NONCOHERENT_IO=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_IRQ_CPU=y
CONFIG_VR41XX_TIME_C=y
CONFIG_DUMMY_KEYB=y
CONFIG_VR41XX_COMMON=y
# CONFIG_FB is not set
#
# CPU selection
#
# CONFIG_CPU_MIPS32 is not set
# CONFIG_CPU_MIPS64 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_TX39XX is not set
CONFIG_CPU_VR41XX=y
# CONFIG_CPU_R4300 is not set
# CONFIG_CPU_R4X00 is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_R5432 is not set
# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_SB1 is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
CONFIG_KALLSYMS=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
CONFIG_MMU=y
# CONFIG_HOTPLUG is not set
#
# Executable file formats
#
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set
#
# Plug and Play support
#
# CONFIG_PNP is not set
#
# Generic Driver Options
#
# CONFIG_FW_LOADER is not set
#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
#
# ATA/ATAPI/MFM/RLL support
#
CONFIG_IDE=y
#
# IDE, ATA and ATAPI Block devices
#
CONFIG_BLK_DEV_IDE=y
#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_HD is not set
CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_IDEDISK_MULTI_MODE is not set
# CONFIG_IDEDISK_STROKE is not set
# CONFIG_BLK_DEV_IDECD is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
# CONFIG_IDE_TASK_IOCTL is not set
CONFIG_IDE_TASKFILE_IO=y
#
# IDE chipset support/bugfixes
#
#
# SCSI device support
#
# CONFIG_SCSI is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
#
# Fusion MPT device support
#
#
# I2O device support
#
#
# Networking support
#
CONFIG_NET=y
#
# Networking options
#
CONFIG_PACKET=y
CONFIG_PACKET_MMAP=y
CONFIG_NETLINK_DEV=y
# CONFIG_NETFILTER is not set
CONFIG_UNIX=y
CONFIG_NET_KEY=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
# CONFIG_IP_ADVANCED_ROUTER is not set
# CONFIG_IP_PNP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_ARPD is not set
# CONFIG_INET_ECN is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_IPV6 is not set
# CONFIG_XFRM_USER is not set
#
# SCTP Configuration (EXPERIMENTAL)
#
CONFIG_IPV6_SCTP__=y
# CONFIG_IP_SCTP is not set
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_LLC is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
CONFIG_NETDEVICES=y
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_ETHERTAP is not set
#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_MII is not set
#
# Ethernet (1000 Mbit)
#
#
# Ethernet (10000 Mbit)
#
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set
#
# Token Ring devices (depends on LLC=y)
#
# CONFIG_SHAPER is not set
#
# Wan interfaces
#
# CONFIG_WAN is not set
#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set
#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set
#
# ISDN subsystem
#
# CONFIG_ISDN_BOOL is not set
#
# Telephony Support
#
# CONFIG_PHONE is not set
#
# Input device support
#
CONFIG_INPUT=y
#
# Userland interfaces
#
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
#
# Input I/O drivers
#
# CONFIG_GAMEPORT is not set
CONFIG_SOUND_GAMEPORT=y
# CONFIG_SERIO is not set
#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
#
# Character devices
#
CONFIG_VT=y
# CONFIG_VT_CONSOLE is not set
CONFIG_HW_CONSOLE=y
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
# CONFIG_SERIAL_8250_EXTENDED is not set
#
# Non-8250 serial port support
#
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=256
#
# I2C support
#
# CONFIG_I2C is not set
#
# I2C Hardware Sensors Mainboard support
#
#
# I2C Hardware Sensors Chip support
#
# CONFIG_I2C_SENSOR is not set
#
# Mice
#
# CONFIG_BUSMOUSE is not set
# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
CONFIG_WATCHDOG=y
# CONFIG_WATCHDOG_NOWAYOUT is not set
# CONFIG_SOFT_WATCHDOG is not set
# CONFIG_WDT is not set
# CONFIG_WDTPCI is not set
# CONFIG_PCWATCHDOG is not set
# CONFIG_ACQUIRE_WDT is not set
# CONFIG_ADVANTECH_WDT is not set
# CONFIG_EUROTECH_WDT is not set
# CONFIG_IB700_WDT is not set
# CONFIG_I810_TCO is not set
# CONFIG_MIXCOMWD is not set
# CONFIG_SCx200_WDT is not set
# CONFIG_60XX_WDT is not set
# CONFIG_W83877F_WDT is not set
# CONFIG_MACHZ_WDT is not set
# CONFIG_SC520_WDT is not set
# CONFIG_AMD7XX_TCO is not set
# CONFIG_ALIM7101_WDT is not set
# CONFIG_SC1200_WDT is not set
# CONFIG_WAFER_WDT is not set
# CONFIG_CPU5_WDT is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_HANGCHECK_TIMER is not set
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
#
# Digital Video Broadcasting Devices
#
# CONFIG_DVB is not set
#
# File systems
#
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT2_FS_POSIX_ACL=y
CONFIG_EXT2_FS_SECURITY=y
# CONFIG_EXT3_FS is not set
# CONFIG_JBD is not set
CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
CONFIG_AUTOFS_FS=y
CONFIG_AUTOFS4_FS=y
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
# CONFIG_FAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
# CONFIG_DEVFS_FS is not set
CONFIG_DEVPTS_FS=y
CONFIG_DEVPTS_FS_XATTR=y
CONFIG_DEVPTS_FS_SECURITY=y
# CONFIG_TMPFS is not set
CONFIG_RAMFS=y
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Network File Systems
#
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
# CONFIG_NFS_V4 is not set
CONFIG_NFSD=y
# CONFIG_NFSD_V3 is not set
# CONFIG_NFSD_TCP is not set
CONFIG_LOCKD=y
CONFIG_EXPORTFS=y
CONFIG_SUNRPC=y
# CONFIG_SUNRPC_GSS is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_INTERMEZZO_FS is not set
# CONFIG_AFS_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
#
# Graphics support
#
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
# Sound
#
# CONFIG_SOUND is not set
#
# USB support
#
# CONFIG_USB_GADGET is not set
#
# Bluetooth support
#
# CONFIG_BT is not set
#
# Kernel hacking
#
CONFIG_CROSSCOMPILE=y
# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
# CONFIG_CRYPTO is not set
#
# Library routines
#
# CONFIG_CRC32 is not set
arch/mips/vr41xx/casio-e55/Makefile 0 → 100644
View file @ 4ee45a31
#
# Makefile for the CASIO CASSIOPEIA E-55/65 specific parts of the kernel
#
obj-y += init.o setup.o
obj-$(CONFIG_IDE) += ide-e55.o
arch/mips/vr41xx/casio-e55/ide-e55.c 0 → 100644
View file @ 4ee45a31
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* IDE routines for typical pc-like standard configurations
* for the CASIO CASSIOPEIA E-55/65.
*
* Copyright (C) 1998, 1999, 2001 by Ralf Baechle
*/
/*
* Changes:
* Yoichi Yuasa <yuasa@hh.iij4u.or.jp> Sun, 24 Feb 2002
* - Added CASIO CASSIOPEIA E-55/65 support.
*/
#include <linux/sched.h>
#include <linux/ide.h>
#include <linux/ioport.h>
#include <linux/hdreg.h>
#include <asm/ptrace.h>
#include <asm/hdreg.h>
static int e55_ide_default_irq(ide_ioreg_t base)
{
return 40;
}
static ide_ioreg_t e55_ide_default_io_base(int index)
{
switch (index) {
case 0: return 0xc1f0;
case 1: return 0xc170;
case 2: return 0xc1e8;
case 3: return 0xc168;
case 4: return 0xc1e0;
case 5: return 0xc160;
}
return 0;
}
static void e55_ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port,
ide_ioreg_t ctrl_port, int *irq)
{
ide_ioreg_t reg = data_port;
int i;
for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
hw->io_ports[i] = reg;
reg += 1;
}
if (ctrl_port) {
hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
} else {
hw->io_ports[IDE_CONTROL_OFFSET] = hw->io_ports[IDE_DATA_OFFSET] + 0x206;
}
if (irq != NULL)
*irq = 0;
hw->io_ports[IDE_IRQ_OFFSET] = 0;
}
static int e55_ide_request_irq(unsigned int irq,
void (*handler)(int,void *, struct pt_regs *),
unsigned long flags, const char *device,
void *dev_id)
{
return request_irq(irq, handler, flags, device, dev_id);
}
static void e55_ide_free_irq(unsigned int irq, void *dev_id)
{
free_irq(irq, dev_id);
}
static int e55_ide_check_region(ide_ioreg_t from, unsigned int extent)
{
return check_region(from, extent);
}
static void e55_ide_request_region(ide_ioreg_t from, unsigned int extent,
const char *name)
{
request_region(from, extent, name);
}
static void e55_ide_release_region(ide_ioreg_t from, unsigned int extent)
{
release_region(from, extent);
}
struct ide_ops e55_ide_ops = {
&e55_ide_default_irq,
&e55_ide_default_io_base,
&e55_ide_init_hwif_ports,
&e55_ide_request_irq,
&e55_ide_free_irq,
&e55_ide_check_region,
&e55_ide_request_region,
&e55_ide_release_region
};
arch/mips/vr41xx/casio-e55/init.c 0 → 100644
View file @ 4ee45a31
/*
* FILE NAME
* arch/mips/vr41xx/casio-e55/init.c
*
* BRIEF MODULE DESCRIPTION
* Initialisation code for the CASIO CASSIOPEIA E-55/65.
*
* Copyright 2002 Yoichi Yuasa
* yuasa@hh.iij4u.or.jp
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <asm/bootinfo.h>
char arcs_cmdline[CL_SIZE];
const char *get_system_type(void)
{
return "CASIO CASSIOPEIA E-11/15/55/65";
}
void __init prom_init(int argc, char **argv, unsigned long magic, int *prom_vec)
{
int i;
/*
* collect args and prepare cmd_line
*/
for (i = 1; i < argc; i++) {
strcat(arcs_cmdline, argv[i]);
if (i < (argc - 1))
strcat(arcs_cmdline, " ");
}
mips_machgroup = MACH_GROUP_NEC_VR41XX;
mips_machtype = MACH_CASIO_E55;
}
void __init prom_free_prom_memory (void)
{
}
arch/mips/vr41xx/casio-e55/setup.c 0 → 100644
View file @ 4ee45a31
/*
* FILE NAME
* arch/mips/vr41xx/casio-e55/setup.c
*
* BRIEF MODULE DESCRIPTION
* Setup for the CASIO CASSIOPEIA E-11/15/55/65.
*
* Copyright 2002 Yoichi Yuasa
* yuasa@hh.iij4u.or.jp
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/config.h>
#include <linux/init.h>
#include <linux/console.h>
#include <linux/ide.h>
#include <linux/ioport.h>
#include <linux/major.h>
#include <linux/kdev_t.h>
#include <linux/root_dev.h>
#include <asm/reboot.h>
#include <asm/time.h>
#include <asm/vr41xx/e55.h>
#ifdef CONFIG_BLK_DEV_INITRD
extern unsigned long initrd_start, initrd_end;
extern void * __rd_start, * __rd_end;
#endif
#ifdef CONFIG_BLK_DEV_IDE
extern struct ide_ops e55_ide_ops;
#endif
void __init casio_e55_setup(void)
{
set_io_port_base(IO_PORT_BASE);
ioport_resource.start = IO_PORT_RESOURCE_START;
ioport_resource.end = IO_PORT_RESOURCE_END;
iomem_resource.start = IO_MEM_RESOURCE_START;
iomem_resource.end = IO_MEM_RESOURCE_END;
#ifdef CONFIG_BLK_DEV_INITRD
ROOT_DEV = Root_RAM0;
initrd_start = (unsigned long)&__rd_start;
initrd_end = (unsigned long)&__rd_end;
#endif
_machine_restart = vr41xx_restart;
_machine_halt = vr41xx_halt;
_machine_power_off = vr41xx_power_off;
board_time_init = vr41xx_time_init;
board_timer_setup = vr41xx_timer_setup;
#ifdef CONFIG_FB
conswitchp = &dummy_con;
#endif
#ifdef CONFIG_BLK_DEV_IDE
ide_ops = &e55_ide_ops;
#endif
vr41xx_bcu_init();
vr41xx_cmu_init(0);
#ifdef CONFIG_SERIAL_8250
vr41xx_siu_init(SIU_RS232C, 0);
#endif
}
arch/mips/vr41xx/common/Makefile 0 → 100644
View file @ 4ee45a31
#
# Makefile for common code of the NEC VR4100 series.
#
obj-y += bcu.o cmu.o giu.o icu.o int-handler.o reset.o
obj-$(CONFIG_SERIAL_8250) += serial.o
obj-$(CONFIG_VR41XX_TIME_C) += time.o
obj-$(CONFIG_VRC4173) += vrc4173.o
EXTRA_AFLAGS := $(CFLAGS)
arch/mips/vr41xx/common/bcu.c 0 → 100644
View file @ 4ee45a31
/*
* FILE NAME
* arch/mips/vr41xx/common/bcu.c
*
* BRIEF MODULE DESCRIPTION
* Bus Control Unit routines for the NEC VR4100 series.
*
* Author: Yoichi Yuasa
* yyuasa@mvista.com or source@mvista.com
*
* Copyright 2002 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
/*
* Changes:
* MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
* - Added support for NEC VR4111 and VR4121.
*
* Paul Mundt <lethal@chaoticdreams.org>
* - Calculate mips_counter_frequency properly on VR4131.
*
* MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
* - New creation, NEC VR4122 and VR4131 are supported.
*/
#include <linux/init.h>
#include <linux/types.h>
#include <asm/addrspace.h>
#include <asm/cpu.h>
#include <asm/io.h>
#include <asm/time.h>
#include <asm/vr41xx/vr41xx.h>
#define VR4111_CLKSPEEDREG KSEG1ADDR(0x0b000014)
#define VR4122_CLKSPEEDREG KSEG1ADDR(0x0f000014)
#define VR4131_CLKSPEEDREG VR4122_CLKSPEEDREG
#define CLKSP(x) ((x) & 0x001f)
#define DIV2B 0x8000
#define DIV3B 0x4000
#define DIV4B 0x2000
#define DIVT(x) (((x) & 0xf000) >> 12)
#define DIVVT(x) (((x) & 0x0f00) >> 8)
#define TDIVMODE(x) (2 << (((x) & 0x1000) >> 12))
#define VTDIVMODE(x) (((x) & 0x0700) >> 8)
unsigned long vr41xx_vtclock = 0;
static inline u16 read_clkspeed(void)
{
switch (current_cpu_data.cputype) {
case CPU_VR4111:
case CPU_VR4121: return readw(VR4111_CLKSPEEDREG);
case CPU_VR4122: return readw(VR4122_CLKSPEEDREG);
case CPU_VR4131: return readw(VR4131_CLKSPEEDREG);
default:
printk(KERN_INFO "Unexpected CPU of NEC VR4100 series\n");
break;
}
return 0;
}
static inline unsigned long calculate_pclock(u16 clkspeed)
{
unsigned long pclock = 0;
switch (current_cpu_data.cputype) {
case CPU_VR4111:
case CPU_VR4121:
pclock = 18432000 * 64;
break;
case CPU_VR4122:
pclock = 18432000 * 98;
break;
case CPU_VR4131:
pclock = 18432000 * 108;
break;
default:
printk(KERN_INFO "Unexpected CPU of NEC VR4100 series\n");
break;
}
pclock /= CLKSP(clkspeed);
printk(KERN_INFO "PClock: %ldHz\n", pclock);
return pclock;
}
static inline unsigned long calculate_vtclock(u16 clkspeed, unsigned long pclock)
{
switch (current_cpu_data.cputype) {
case CPU_VR4111:
/* The NEC VR4111 doesn't have the VTClock. */
break;
case CPU_VR4121:
vr41xx_vtclock = pclock;
/* DIVVT == 9 Divide by 1.5 . VTClock = (PClock * 6) / 9 */
if (DIVVT(clkspeed) == 9)
vr41xx_vtclock = pclock * 6;
/* DIVVT == 10 Divide by 2.5 . VTClock = (PClock * 4) / 10 */
else if (DIVVT(clkspeed) == 10)
vr41xx_vtclock = pclock * 4;
vr41xx_vtclock /= DIVVT(clkspeed);
printk(KERN_INFO "VTClock: %ldHz\n", vr41xx_vtclock);
break;
case CPU_VR4122:
if(VTDIVMODE(clkspeed) == 7)
vr41xx_vtclock = pclock / 1;
else if(VTDIVMODE(clkspeed) == 1)
vr41xx_vtclock = pclock / 2;
else
vr41xx_vtclock = pclock / VTDIVMODE(clkspeed);
printk(KERN_INFO "VTClock: %ldHz\n", vr41xx_vtclock);
break;
case CPU_VR4131:
vr41xx_vtclock = pclock / VTDIVMODE(clkspeed);
printk(KERN_INFO "VTClock: %ldHz\n", vr41xx_vtclock);
break;
default:
printk(KERN_INFO "Unexpected CPU of NEC VR4100 series\n");
break;
}
return vr41xx_vtclock;
}
static inline unsigned long calculate_tclock(u16 clkspeed, unsigned long pclock,
unsigned long vtclock)
{
unsigned long tclock = 0;
switch (current_cpu_data.cputype) {
case CPU_VR4111:
if (!(clkspeed & DIV2B))
tclock = pclock / 2;
else if (!(clkspeed & DIV3B))
tclock = pclock / 3;
else if (!(clkspeed & DIV4B))
tclock = pclock / 4;
break;
case CPU_VR4121:
tclock = pclock / DIVT(clkspeed);
break;
case CPU_VR4122:
case CPU_VR4131:
tclock = vtclock / TDIVMODE(clkspeed);
break;
default:
printk(KERN_INFO "Unexpected CPU of NEC VR4100 series\n");
break;
}
printk(KERN_INFO "TClock: %ldHz\n", tclock);
return tclock;
}
static inline unsigned long calculate_mips_counter_frequency(unsigned long tclock)
{
/*
* VR4131 Revision 2.0 and 2.1 use a value of (tclock / 2).
*/
if ((current_cpu_data.processor_id == PRID_VR4131_REV2_0) ||
(current_cpu_data.processor_id == PRID_VR4131_REV2_1))
tclock /= 2;
else
tclock /= 4;
return tclock;
}
void __init vr41xx_bcu_init(void)
{
unsigned long pclock, vtclock, tclock;
u16 clkspeed;
clkspeed = read_clkspeed();
pclock = calculate_pclock(clkspeed);
vtclock = calculate_vtclock(clkspeed, pclock);
tclock = calculate_tclock(clkspeed, pclock, vtclock);
mips_counter_frequency = calculate_mips_counter_frequency(tclock);
}
arch/mips/vr41xx/common/cmu.c 0 → 100644
View file @ 4ee45a31
/*
* FILE NAME
* arch/mips/vr41xx/common/cmu.c
*
* BRIEF MODULE DESCRIPTION
* Clock Mask Unit routines for the NEC VR4100 series.
*
* Author: Yoichi Yuasa
* yyuasa@mvista.com or source@mvista.com
*
* Copyright 2001,2002 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
/*
* Changes:
* MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
* - Added support for NEC VR4111 and VR4121.
*
* MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
* - New creation, NEC VR4122 and VR4131 are supported.
*/
#include <linux/init.h>
#include <linux/types.h>
#include <asm/cpu.h>
#include <asm/io.h>
#define VR4111_CMUCLKMSK KSEG1ADDR(0x0b000060)
#define VR4122_CMUCLKMSK KSEG1ADDR(0x0f000060)
static u32 vr41xx_cmu_base = 0;
static u16 cmuclkmsk = 0;
#define write_cmu(mask) writew((mask), vr41xx_cmu_base)
void vr41xx_clock_supply(u16 mask)
{
cmuclkmsk |= mask;
write_cmu(cmuclkmsk);
}
void vr41xx_clock_mask(u16 mask)
{
cmuclkmsk &= ~mask;
write_cmu(cmuclkmsk);
}
void __init vr41xx_cmu_init(u16 mask)
{
switch (current_cpu_data.cputype) {
case CPU_VR4111:
case CPU_VR4121:
vr41xx_cmu_base = VR4111_CMUCLKMSK;
break;
case CPU_VR4122:
case CPU_VR4131:
vr41xx_cmu_base = VR4122_CMUCLKMSK;
break;
default:
panic("Unexpected CPU of NEC VR4100 series");
break;
}
cmuclkmsk = mask;
}
arch/mips/vr41xx/common/giu.c 0 → 100644
View file @ 4ee45a31
/*
* FILE NAME
* arch/mips/vr41xx/common/giu.c
*
* BRIEF MODULE DESCRIPTION
* General-purpose I/O Unit Interrupt routines for NEC VR4100 series.
*
* Author: Yoichi Yuasa
* yyuasa@mvista.com or source@mvista.com
*
* Copyright 2002 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
/*
* Changes:
* MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
* - New creation, NEC VR4111, VR4121, VR4122 and VR4131 are supported.
*/
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <asm/addrspace.h>
#include <asm/cpu.h>
#include <asm/io.h>
#include <asm/vr41xx/vr41xx.h>
#define VR4111_GIUIOSELL KSEG1ADDR(0x0b000100)
#define VR4122_GIUIOSELL KSEG1ADDR(0x0f000140)
#define GIUIOSELL 0x00
#define GIUIOSELH 0x02
#define GIUINTSTATL 0x08
#define GIUINTSTATH 0x0a
#define GIUINTENL 0x0c
#define GIUINTENH 0x0e
#define GIUINTTYPL 0x10
#define GIUINTTYPH 0x12
#define GIUINTALSELL 0x14
#define GIUINTALSELH 0x16
#define GIUINTHTSELL 0x18
#define GIUINTHTSELH 0x1a
u32 vr41xx_giu_base = 0;
#define read_giuint(offset) readw(vr41xx_giu_base + (offset))
#define write_giuint(val, offset) writew((val), vr41xx_giu_base + (offset))
static inline u16 set_giuint(u16 offset, u16 set)
{
u16 res;
res = read_giuint(offset);
res |= set;
write_giuint(res, offset);
return res;
}
static inline u16 clear_giuint(u16 offset, u16 clear)
{
u16 res;
res = read_giuint(offset);
res &= ~clear;
write_giuint(res, offset);
return res;
}
void vr41xx_enable_giuint(int pin)
{
if (pin < 16)
set_giuint(GIUINTENL, (u16)1 << pin);
else
set_giuint(GIUINTENH, (u16)1 << (pin - 16));
}
void vr41xx_disable_giuint(int pin)
{
if (pin < 16)
clear_giuint(GIUINTENL, (u16)1 << pin);
else
clear_giuint(GIUINTENH, (u16)1 << (pin - 16));
}
void vr41xx_clear_giuint(int pin)
{
if (pin < 16)
write_giuint((u16)1 << pin, GIUINTSTATL);
else
write_giuint((u16)1 << (pin - 16), GIUINTSTATH);
}
void vr41xx_set_irq_trigger(int pin, int trigger, int hold)
{
u16 mask;
if (pin < 16) {
mask = (u16)1 << pin;
if (trigger == TRIGGER_EDGE) {
set_giuint(GIUINTTYPL, mask);
if (hold == SIGNAL_HOLD)
set_giuint(GIUINTHTSELL, mask);
else
clear_giuint(GIUINTHTSELL, mask);
} else {
clear_giuint(GIUINTTYPL, mask);
clear_giuint(GIUINTHTSELL, mask);
}
} else {
mask = (u16)1 << (pin - 16);
if (trigger == TRIGGER_EDGE) {
set_giuint(GIUINTTYPH, mask);
if (hold == SIGNAL_HOLD)
set_giuint(GIUINTHTSELH, mask);
else
clear_giuint(GIUINTHTSELH, mask);
} else {
clear_giuint(GIUINTTYPH, mask);
clear_giuint(GIUINTHTSELH, mask);
}
}
vr41xx_clear_giuint(pin);
}
void vr41xx_set_irq_level(int pin, int level)
{
u16 mask;
if (pin < 16) {
mask = (u16)1 << pin;
if (level == LEVEL_HIGH)
set_giuint(GIUINTALSELL, mask);
else
clear_giuint(GIUINTALSELL, mask);
} else {
mask = (u16)1 << (pin - 16);
if (level == LEVEL_HIGH)
set_giuint(GIUINTALSELH, mask);
else
clear_giuint(GIUINTALSELH, mask);
}
vr41xx_clear_giuint(pin);
}
#define GIUINT_NR_IRQS 32
enum {
GIUINT_NO_CASCADE,
GIUINT_CASCADE
};
struct vr41xx_giuint_cascade {
unsigned int flag;
int (*get_irq_number)(int irq);
};
static struct vr41xx_giuint_cascade giuint_cascade[GIUINT_NR_IRQS];
static struct irqaction giu_cascade = {no_action, 0, 0, "cascade", NULL, NULL};
static int no_irq_number(int irq)
{
return -EINVAL;
}
int vr41xx_cascade_irq(unsigned int irq, int (*get_irq_number)(int irq))
{
unsigned int pin;
int retval;
if (irq < GIU_IRQ(0) || irq > GIU_IRQ(31))
return -EINVAL;
if(!get_irq_number)
return -EINVAL;
pin = irq - GIU_IRQ(0);
giuint_cascade[pin].flag = GIUINT_CASCADE;
giuint_cascade[pin].get_irq_number = get_irq_number;
retval = setup_irq(irq, &giu_cascade);
if (retval) {
giuint_cascade[pin].flag = GIUINT_NO_CASCADE;
giuint_cascade[pin].get_irq_number = no_irq_number;
}
return retval;
}
unsigned int giuint_do_IRQ(int pin, struct pt_regs *regs)
{
struct vr41xx_giuint_cascade *cascade;
unsigned int retval = 0;
int giuint_irq, cascade_irq;
disable_irq(GIUINT_CASCADE_IRQ);
cascade = &giuint_cascade[pin];
giuint_irq = pin + GIU_IRQ(0);
if (cascade->flag == GIUINT_CASCADE) {
cascade_irq = cascade->get_irq_number(giuint_irq);
disable_irq(giuint_irq);
if (cascade_irq > 0)
retval = do_IRQ(cascade_irq, regs);
enable_irq(giuint_irq);
} else
retval = do_IRQ(giuint_irq, regs);
enable_irq(GIUINT_CASCADE_IRQ);
return retval;
}
void (*board_irq_init)(void) = NULL;
void __init vr41xx_giuint_init(void)
{
int i;
switch (current_cpu_data.cputype) {
case CPU_VR4111:
case CPU_VR4121:
vr41xx_giu_base = VR4111_GIUIOSELL;
break;
case CPU_VR4122:
case CPU_VR4131:
vr41xx_giu_base = VR4122_GIUIOSELL;
break;
default:
panic("GIU: Unexpected CPU of NEC VR4100 series");
break;
}
for (i = 0; i < GIUINT_NR_IRQS; i++) {
vr41xx_disable_giuint(i);
giuint_cascade[i].flag = GIUINT_NO_CASCADE;
giuint_cascade[i].get_irq_number = no_irq_number;
}
if (setup_irq(GIUINT_CASCADE_IRQ, &giu_cascade))
printk("GIUINT: Can not cascade IRQ %d.\n", GIUINT_CASCADE_IRQ);
if (board_irq_init)
board_irq_init();
}
arch/mips/vr41xx/common/icu.c 0 → 100644
View file @ 4ee45a31
/*
* FILE NAME
* arch/mips/vr41xx/vr4122/common/icu.c
*
* BRIEF MODULE DESCRIPTION
* Interrupt Control Unit routines for the NEC VR4122 and VR4131.
*
* Author: Yoichi Yuasa
* yyuasa@mvista.com or source@mvista.com
*
* Copyright 2001,2002 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
/*
* Changes:
* MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
* - Added support for NEC VR4111 and VR4121.
*
* Paul Mundt <lethal@chaoticdreams.org>
* - kgdb support.
*
* MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
* - New creation, NEC VR4122 and VR4131 are supported.
*/
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/types.h>
#include <asm/addrspace.h>
#include <asm/cpu.h>
#include <asm/gdb-stub.h>
#include <asm/io.h>
#include <asm/mipsregs.h>
#include <asm/vr41xx/vr41xx.h>
extern asmlinkage void vr41xx_handle_interrupt(void);
extern void __init init_generic_irq(void);
extern void mips_cpu_irq_init(u32 irq_base);
extern void vr41xx_giuint_init(void);
extern unsigned int giuint_do_IRQ(int pin, struct pt_regs *regs);
static u32 vr41xx_icu1_base = 0;
static u32 vr41xx_icu2_base = 0;
#define VR4111_SYSINT1REG KSEG1ADDR(0x0b000080)
#define VR4111_SYSINT2REG KSEG1ADDR(0x0b000200)
#define VR4122_SYSINT1REG KSEG1ADDR(0x0f000080)
#define VR4122_SYSINT2REG KSEG1ADDR(0x0f0000a0)
#define SYSINT1REG 0x00
#define GIUINTLREG 0x08
#define MSYSINT1REG 0x0c
#define MGIUINTLREG 0x14
#define NMIREG 0x18
#define SOFTREG 0x1a
#define SYSINT2REG 0x00
#define GIUINTHREG 0x02
#define MSYSINT2REG 0x06
#define MGIUINTHREG 0x08
#define read_icu1(offset) readw(vr41xx_icu1_base + (offset))
#define write_icu1(val, offset) writew((val), vr41xx_icu1_base + (offset))
#define read_icu2(offset) readw(vr41xx_icu2_base + (offset))
#define write_icu2(val, offset) writew((val), vr41xx_icu2_base + (offset))
static inline u16 set_icu1(u16 offset, u16 set)
{
u16 res;
res = read_icu1(offset);
res |= set;
write_icu1(res, offset);
return res;
}
static inline u16 clear_icu1(u16 offset, u16 clear)
{
u16 res;
res = read_icu1(offset);
res &= ~clear;
write_icu1(res, offset);
return res;
}
static inline u16 set_icu2(u16 offset, u16 set)
{
u16 res;
res = read_icu2(offset);
res |= set;
write_icu2(res, offset);
return res;
}
static inline u16 clear_icu2(u16 offset, u16 clear)
{
u16 res;
res = read_icu2(offset);
res &= ~clear;
write_icu2(res, offset);
return res;
}
/*=======================================================================*/
static void enable_sysint1_irq(unsigned int irq)
{
set_icu1(MSYSINT1REG, (u16)1 << (irq - SYSINT1_IRQ_BASE));
}
static void disable_sysint1_irq(unsigned int irq)
{
clear_icu1(MSYSINT1REG, (u16)1 << (irq - SYSINT1_IRQ_BASE));
}
static unsigned int startup_sysint1_irq(unsigned int irq)
{
set_icu1(MSYSINT1REG, (u16)1 << (irq - SYSINT1_IRQ_BASE));
return 0; /* never anything pending */
}
#define shutdown_sysint1_irq disable_sysint1_irq
#define ack_sysint1_irq disable_sysint1_irq
static void end_sysint1_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
set_icu1(MSYSINT1REG, (u16)1 << (irq - SYSINT1_IRQ_BASE));
}
static struct hw_interrupt_type sysint1_irq_type = {
"SYSINT1",
startup_sysint1_irq,
shutdown_sysint1_irq,
enable_sysint1_irq,
disable_sysint1_irq,
ack_sysint1_irq,
end_sysint1_irq,
NULL
};
/*=======================================================================*/
static void enable_sysint2_irq(unsigned int irq)
{
set_icu2(MSYSINT2REG, (u16)1 << (irq - SYSINT2_IRQ_BASE));
}
static void disable_sysint2_irq(unsigned int irq)
{
clear_icu2(MSYSINT2REG, (u16)1 << (irq - SYSINT2_IRQ_BASE));
}
static unsigned int startup_sysint2_irq(unsigned int irq)
{
set_icu2(MSYSINT2REG, (u16)1 << (irq - SYSINT2_IRQ_BASE));
return 0; /* never anything pending */
}
#define shutdown_sysint2_irq disable_sysint2_irq
#define ack_sysint2_irq disable_sysint2_irq
static void end_sysint2_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
set_icu2(MSYSINT2REG, (u16)1 << (irq - SYSINT2_IRQ_BASE));
}
static struct hw_interrupt_type sysint2_irq_type = {
"SYSINT2",
startup_sysint2_irq,
shutdown_sysint2_irq,
enable_sysint2_irq,
disable_sysint2_irq,
ack_sysint2_irq,
end_sysint2_irq,
NULL
};
/*=======================================================================*/
static void enable_giuint_irq(unsigned int irq)
{
int pin;
pin = irq - GIU_IRQ_BASE;
if (pin < 16)
set_icu1(MGIUINTLREG, (u16)1 << pin);
else
set_icu2(MGIUINTHREG, (u16)1 << (pin - 16));
vr41xx_enable_giuint(pin);
}
static void disable_giuint_irq(unsigned int irq)
{
int pin;
pin = irq - GIU_IRQ_BASE;
vr41xx_disable_giuint(pin);
if (pin < 16)
clear_icu1(MGIUINTLREG, (u16)1 << pin);
else
clear_icu2(MGIUINTHREG, (u16)1 << (pin - 16));
}
static unsigned int startup_giuint_irq(unsigned int irq)
{
vr41xx_clear_giuint(irq - GIU_IRQ_BASE);
enable_giuint_irq(irq);
return 0; /* never anything pending */
}
#define shutdown_giuint_irq disable_giuint_irq
static void ack_giuint_irq(unsigned int irq)
{
disable_giuint_irq(irq);
vr41xx_clear_giuint(irq - GIU_IRQ_BASE);
}
static void end_giuint_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
enable_giuint_irq(irq);
}
static struct hw_interrupt_type giuint_irq_type = {
"GIUINT",
startup_giuint_irq,
shutdown_giuint_irq,
enable_giuint_irq,
disable_giuint_irq,
ack_giuint_irq,
end_giuint_irq,
NULL
};
/*=======================================================================*/
static struct irqaction icu_cascade = {no_action, 0, 0, "cascade", NULL, NULL};
static void __init vr41xx_icu_init(void)
{
int i;
switch (current_cpu_data.cputype) {
case CPU_VR4111:
case CPU_VR4121:
vr41xx_icu1_base = VR4111_SYSINT1REG;
vr41xx_icu2_base = VR4111_SYSINT2REG;
break;
case CPU_VR4122:
case CPU_VR4131:
vr41xx_icu1_base = VR4122_SYSINT1REG;
vr41xx_icu2_base = VR4122_SYSINT2REG;
break;
default:
panic("Unexpected CPU of NEC VR4100 series");
break;
}
write_icu1(0, MSYSINT1REG);
write_icu1(0, MGIUINTLREG);
write_icu2(0, MSYSINT2REG);
write_icu2(0, MGIUINTHREG);
for (i = SYSINT1_IRQ_BASE; i <= GIU_IRQ_LAST; i++) {
if (i >= SYSINT1_IRQ_BASE && i <= SYSINT1_IRQ_LAST)
irq_desc[i].handler = &sysint1_irq_type;
else if (i >= SYSINT2_IRQ_BASE && i <= SYSINT2_IRQ_LAST)
irq_desc[i].handler = &sysint2_irq_type;
else if (i >= GIU_IRQ_BASE && i <= GIU_IRQ_LAST)
irq_desc[i].handler = &giuint_irq_type;
}
setup_irq(ICU_CASCADE_IRQ, &icu_cascade);
}
void __init init_IRQ(void)
{
memset(irq_desc, 0, sizeof(irq_desc));
init_generic_irq();
mips_cpu_irq_init(MIPS_CPU_IRQ_BASE);
vr41xx_icu_init();
vr41xx_giuint_init();
set_except_vector(0, vr41xx_handle_interrupt);
#ifdef CONFIG_KGDB
printk("Setting debug traps - please connect the remote debugger.\n");
set_debug_traps();
breakpoint();
#endif
}
/*=======================================================================*/
static inline void giuint_irqdispatch(u16 pendl, u16 pendh, struct pt_regs *regs)
{
int i;
if (pendl) {
for (i = 0; i < 16; i++) {
if (pendl & (0x0001 << i)) {
giuint_do_IRQ(i, regs);
return;
}
}
}
else if (pendh) {
for (i = 0; i < 16; i++) {
if (pendh & (0x0001 << i)) {
giuint_do_IRQ(i + 16, regs);
return;
}
}
}
}
asmlinkage void icu_irqdispatch(struct pt_regs *regs)
{
u16 pend1, pend2, pendl, pendh;
u16 mask1, mask2, maskl, maskh;
int i;
pend1 = read_icu1(SYSINT1REG);
mask1 = read_icu1(MSYSINT1REG);
pend2 = read_icu2(SYSINT2REG);
mask2 = read_icu2(MSYSINT2REG);
pendl = read_icu1(GIUINTLREG);
maskl = read_icu1(MGIUINTLREG);
pendh = read_icu2(GIUINTHREG);
maskh = read_icu2(MGIUINTHREG);
pend1 &= mask1;
pend2 &= mask2;
pendl &= maskl;
pendh &= maskh;
if (pend1) {
if ((pend1 & 0x01ff) == 0x0100) {
giuint_irqdispatch(pendl, pendh, regs);
}
else {
for (i = 0; i < 16; i++) {
if (pend1 & (0x0001 << i)) {
do_IRQ(SYSINT1_IRQ_BASE + i, regs);
break;
}
}
}
return;
}
else if (pend2) {
for (i = 0; i < 16; i++) {
if (pend2 & (0x0001 << i)) {
do_IRQ(SYSINT2_IRQ_BASE + i, regs);
break;
}
}
}
}
arch/mips/vr41xx/common/int-handler.S 0 → 100644
View file @ 4ee45a31
/*
* FILE NAME
* arch/mips/vr41xx/common/int-handler.S
*
* BRIEF MODULE DESCRIPTION
* Interrupt dispatcher for the NEC VR4100 series.
*
* Author: Yoichi Yuasa
* yyuasa@mvista.com or source@mvista.com
*
* Copyright 2001 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
/*
* Changes:
* MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
* - New creation, NEC VR4100 series are supported.
*/
#include <asm/asm.h>
#include <asm/regdef.h>
#include <asm/mipsregs.h>
#include <asm/stackframe.h>
.text
.set noreorder
.align 5
NESTED(vr41xx_handle_interrupt, PT_SIZE, ra)
.set noat
SAVE_ALL
CLI
.set at
.set noreorder
/*
* Get the pending interrupts
*/
mfc0 t0, CP0_CAUSE
mfc0 t1, CP0_STATUS
andi t0, 0xff00
and t0, t0, t1
andi t1, t0, CAUSEF_IP7 # timer interrupt
beqz t1, 1f
li a0, 7
jal ll_timer_interrupt
move a1, sp
j ret_from_irq
1:
andi t1, t0, 0x7800 # check for IP3-6
beqz t1, 2f
andi t1, t0, CAUSEF_IP3 # check for IP3
bnez t1, handle_it
li a0, 3
andi t1, t0, CAUSEF_IP4 # check for IP4
bnez t1, handle_it
li a0, 4
andi t1, t0, CAUSEF_IP5 # check for IP5
bnez t1, handle_it
li a0, 5
andi t1, t0, CAUSEF_IP6 # check for IP6
bnez t1, handle_it
li a0, 6
2:
andi t1, t0, CAUSEF_IP2 # check for IP2
beqz t1, 3f
move a0, sp
jal icu_irqdispatch
nop
j ret_from_irq
nop
3:
andi t1, t0, CAUSEF_IP0 # check for IP0
bnez t1, handle_it
li a0, 0
andi t1, t0, CAUSEF_IP1 # check for IP1
bnez t1, handle_it
li a0, 1
j spurious_interrupt
nop
handle_it:
jal do_IRQ
move a1, sp
j ret_from_irq
END(vr41xx_handle_interrupt)
arch/mips/vr41xx/common/reset.c 0 → 100644
View file @ 4ee45a31
/*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* Copyright (C) 1997, 2001 Ralf Baechle
* Copyright 2001 MontaVista Software Inc.
* Author: jsun@mvista.com or jsun@junsun.net
*/
#include <linux/sched.h>
#include <linux/mm.h>
#include <asm/io.h>
#include <asm/cacheflush.h>
#include <asm/processor.h>
#include <asm/reboot.h>
#include <asm/system.h>
void vr41xx_restart(char *command)
{
change_c0_status((ST0_BEV | ST0_ERL), (ST0_BEV | ST0_ERL));
change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
flush_cache_all();
write_c0_wired(0);
__asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
}
void vr41xx_halt(void)
{
printk(KERN_NOTICE "\n** You can safely turn off the power\n");
while (1);
}
void vr41xx_power_off(void)
{
vr41xx_halt();
}
arch/mips/vr41xx/common/serial.c 0 → 100644
View file @ 4ee45a31
/*
* FILE NAME
* arch/mips/vr41xx/common/serial.c
*
* BRIEF MODULE DESCRIPTION
* Serial Interface Unit routines for NEC VR4100 series.
*
* Author: Yoichi Yuasa
* yyuasa@mvista.com or source@mvista.com
*
* Copyright 2002 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
/*
* Changes:
* MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
* - Added support for NEC VR4111 and VR4121.
*
* MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
* - New creation, NEC VR4122 and VR4131 are supported.
*/
#include <linux/init.h>
#include <linux/types.h>
#include <linux/serial.h>
#include <asm/addrspace.h>
#include <asm/cpu.h>
#include <asm/io.h>
#include <asm/vr41xx/vr41xx.h>
/* VR4111 and VR4121 SIU Registers */
#define VR4111_SIURB KSEG1ADDR(0x0c000000)
#define VR4111_SIUIRSEL KSEG1ADDR(0x0c000008)
/* VR4122 and VR4131 SIU Registers */
#define VR4122_SIURB KSEG1ADDR(0x0f000800)
#define VR4122_SIUIRSEL KSEG1ADDR(0x0f000808)
#define USE_RS232C 0x00
#define USE_IRDA 0x01
#define SIU_USES_IRDA 0x00
#define FIR_USES_IRDA 0x02
#define IRDA_MODULE_SHARP 0x00
#define IRDA_MODULE_TEMIC 0x04
#define IRDA_MODULE_HP 0x08
#define TMICTX 0x10
#define TMICMODE 0x20
#define SIU_BASE_BAUD 1152000
#define SIU_CLOCK 0x0102
/* VR4122 and VR4131 DSIU Registers */
#define DSIURB KSEG1ADDR(0x0f000820)
#define MDSIUINTREG KSEG1ADDR(0x0f000096)
#define INTDSIU 0x0800
#define DSIU_BASE_BAUD 1152000
#define DSIU_CLOCK 0x0802
int vr41xx_serial_ports = 0;
void vr41xx_siu_ifselect(int interface, int module)
{
u16 val = USE_RS232C; /* Select RS-232C */
/* Select IrDA */
if (interface == SIU_IRDA) {
switch (module) {
case IRDA_SHARP:
val = IRDA_MODULE_SHARP;
break;
case IRDA_TEMIC:
val = IRDA_MODULE_TEMIC;
break;
case IRDA_HP:
val = IRDA_MODULE_HP;
break;
}
val |= USE_IRDA | SIU_USES_IRDA;
}
switch (current_cpu_data.cputype) {
case CPU_VR4111:
case CPU_VR4121:
writew(val, VR4111_SIUIRSEL);
break;
case CPU_VR4122:
case CPU_VR4131:
writew(val, VR4122_SIUIRSEL);
break;
default:
printk(KERN_INFO "Unexpected CPU of NEC VR4100 series\n");
break;
}
}
void __init vr41xx_siu_init(int interface, int module)
{
struct serial_struct s;
vr41xx_siu_ifselect(interface, module);
memset(&s, 0, sizeof(s));
s.line = vr41xx_serial_ports;
s.baud_base = SIU_BASE_BAUD;
s.irq = SIU_IRQ;
s.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
switch (current_cpu_data.cputype) {
case CPU_VR4111:
case CPU_VR4121:
s.iomem_base = (unsigned char *)VR4111_SIURB;
break;
case CPU_VR4122:
case CPU_VR4131:
s.iomem_base = (unsigned char *)VR4122_SIURB;
break;
default:
panic("Unexpected CPU of NEC VR4100 series");
break;
}
s.iomem_reg_shift = 0;
s.io_type = SERIAL_IO_MEM;
if (early_serial_setup(&s) != 0)
printk(KERN_ERR "SIU setup failed!\n");
vr41xx_clock_supply(SIU_CLOCK);
vr41xx_serial_ports++;
}
void __init vr41xx_dsiu_init(void)
{
struct serial_struct s;
if (current_cpu_data.cputype != CPU_VR4122 &&
current_cpu_data.cputype != CPU_VR4131)
return;
memset(&s, 0, sizeof(s));
s.line = vr41xx_serial_ports;
s.baud_base = DSIU_BASE_BAUD;
s.irq = DSIU_IRQ;
s.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
s.iomem_base = (unsigned char *)DSIURB;
s.iomem_reg_shift = 0;
s.io_type = SERIAL_IO_MEM;
if (early_serial_setup(&s) != 0)
printk(KERN_ERR "DSIU setup failed!\n");
vr41xx_clock_supply(DSIU_CLOCK);
writew(INTDSIU, MDSIUINTREG);
vr41xx_serial_ports++;
}
arch/mips/vr41xx/common/time.c 0 → 100644
View file @ 4ee45a31
/*
* FILE NAME
* arch/mips/vr41xx/common/time.c
*
* BRIEF MODULE DESCRIPTION
* Timer routines for the NEC VR4100 series.
*
* Author: Yoichi Yuasa
* yyuasa@mvista.com or source@mvista.com
*
* Copyright 2001,2002 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
/*
* Changes:
* MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
* - Added support for NEC VR4100 series RTC Unit.
*
* MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
* - New creation, NEC VR4100 series are supported.
*/
#include <linux/config.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/types.h>
#include <asm/cpu.h>
#include <asm/io.h>
#include <asm/mipsregs.h>
#include <asm/param.h>
#include <asm/time.h>
#include <asm/vr41xx/vr41xx.h>
#define VR4111_ETIMELREG KSEG1ADDR(0x0b0000c0)
#define VR4122_ETIMELREG KSEG1ADDR(0x0f000100)
u32 vr41xx_rtc_base = 0;
#ifdef CONFIG_VR41XX_RTC
extern unsigned long vr41xx_rtc_get_time(void);
extern int vr41xx_rtc_set_time(unsigned long sec);
#endif
void vr41xx_time_init(void)
{
switch (current_cpu_data.cputype) {
case CPU_VR4111:
case CPU_VR4121:
vr41xx_rtc_base = VR4111_ETIMELREG;
break;
case CPU_VR4122:
case CPU_VR4131:
vr41xx_rtc_base = VR4122_ETIMELREG;
break;
default:
panic("Unexpected CPU of NEC VR4100 series");
break;
}
#ifdef CONFIG_VR41XX_RTC
rtc_get_time = vr41xx_rtc_get_time;
rtc_set_time = vr41xx_rtc_set_time;
#endif
}
void vr41xx_timer_setup(struct irqaction *irq)
{
u32 count;
setup_irq(MIPS_COUNTER_IRQ, irq);
count = read_c0_count();
write_c0_compare(count + (mips_counter_frequency / HZ));
}
arch/mips/vr41xx/common/vrc4173.c 0 → 100644
View file @ 4ee45a31
/*
* FILE NAME
* drivers/char/vrc4173.c
*
* BRIEF MODULE DESCRIPTION
* NEC VRC4173 driver for NEC VR4122/VR4131.
*
* Author: Yoichi Yuasa
* yyuasa@mvista.com or source@mvista.com
*
* Copyright 2001,2002 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/config.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/pci.h>
#include <linux/types.h>
#include <asm/vr41xx/vr41xx.h>
#include <asm/vr41xx/vrc4173.h>
MODULE_DESCRIPTION("NEC VRC4173 driver for NEC VR4122/4131");
MODULE_AUTHOR("Yoichi Yuasa <yyuasa@mvista.com>");
MODULE_LICENSE("GPL");
#define VRC4173_CMUCLKMSK 0x040
#define VRC4173_CMUSRST 0x042
#define VRC4173_SELECTREG 0x09e
#define VRC4173_SYSINT1REG 0x060
#define VRC4173_MSYSINT1REG 0x06c
static struct pci_device_id vrc4173_table[] __devinitdata = {
{PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_VRC4173, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{0, }
};
unsigned long vrc4173_io_offset = 0;
EXPORT_SYMBOL(vrc4173_io_offset);
static u16 vrc4173_cmuclkmsk;
static int vrc4173_initialized;
void vrc4173_clock_supply(u16 mask)
{
if (vrc4173_initialized) {
vrc4173_cmuclkmsk |= mask;
vrc4173_outw(vrc4173_cmuclkmsk, VRC4173_CMUCLKMSK);
}
}
void vrc4173_clock_mask(u16 mask)
{
if (vrc4173_initialized) {
vrc4173_cmuclkmsk &= ~mask;
vrc4173_outw(vrc4173_cmuclkmsk, VRC4173_CMUCLKMSK);
}
}
static inline void vrc4173_cmu_init(void)
{
vrc4173_cmuclkmsk = vrc4173_inw(VRC4173_CMUCLKMSK);
}
EXPORT_SYMBOL(vrc4173_clock_supply);
EXPORT_SYMBOL(vrc4173_clock_mask);
void vrc4173_select_function(int func)
{
u16 val;
if (vrc4173_initialized) {
val = vrc4173_inw(VRC4173_SELECTREG);
switch(func) {
case PS2CH1_SELECT:
val |= 0x0004;
break;
case PS2CH2_SELECT:
val |= 0x0002;
break;
case TOUCHPANEL_SELECT:
val &= 0x0007;
break;
case KIU8_SELECT:
val &= 0x000e;
break;
case KIU10_SELECT:
val &= 0x000c;
break;
case KIU12_SELECT:
val &= 0x0008;
break;
case GPIO_SELECT:
val |= 0x0008;
break;
}
vrc4173_outw(val, VRC4173_SELECTREG);
}
}
EXPORT_SYMBOL(vrc4173_select_function);
static void enable_vrc4173_irq(unsigned int irq)
{
u16 val;
val = vrc4173_inw(VRC4173_MSYSINT1REG);
val |= (u16)1 << (irq - VRC4173_IRQ_BASE);
vrc4173_outw(val, VRC4173_MSYSINT1REG);
}
static void disable_vrc4173_irq(unsigned int irq)
{
u16 val;
val = vrc4173_inw(VRC4173_MSYSINT1REG);
val &= ~((u16)1 << (irq - VRC4173_IRQ_BASE));
vrc4173_outw(val, VRC4173_MSYSINT1REG);
}
static unsigned int startup_vrc4173_irq(unsigned int irq)
{
enable_vrc4173_irq(irq);
return 0; /* never anything pending */
}
#define shutdown_vrc4173_irq disable_vrc4173_irq
#define ack_vrc4173_irq disable_vrc4173_irq
static void end_vrc4173_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
enable_vrc4173_irq(irq);
}
static struct hw_interrupt_type vrc4173_irq_type = {
"VRC4173",
startup_vrc4173_irq,
shutdown_vrc4173_irq,
enable_vrc4173_irq,
disable_vrc4173_irq,
ack_vrc4173_irq,
end_vrc4173_irq,
NULL
};
static int vrc4173_get_irq_number(int irq)
{
u16 status, mask;
int i;
status = vrc4173_inw(VRC4173_SYSINT1REG);
mask = vrc4173_inw(VRC4173_MSYSINT1REG);
status &= mask;
if (status) {
for (i = 0; i < 16; i++)
if (status & (0x0001 << i))
return VRC4173_IRQ_BASE + i;
}
return -EINVAL;
}
static inline void vrc4173_icu_init(int cascade_irq)
{
int i;
if (cascade_irq < GIU_IRQ(0) || cascade_irq > GIU_IRQ(15))
return;
vrc4173_outw(0, VRC4173_MSYSINT1REG);
vr41xx_set_irq_trigger(cascade_irq - GIU_IRQ(0), TRIGGER_LEVEL, SIGNAL_THROUGH);
vr41xx_set_irq_level(cascade_irq - GIU_IRQ(0), LEVEL_LOW);
for (i = VRC4173_IRQ_BASE; i <= VRC4173_IRQ_LAST; i++)
irq_desc[i].handler = &vrc4173_irq_type;
}
static int __devinit vrc4173_probe(struct pci_dev *pdev,
const struct pci_device_id *ent)
{
unsigned long start, flags;
int err;
if ((err = pci_enable_device(pdev)) < 0) {
printk(KERN_ERR "vrc4173: failed to enable device -- err=%d\n", err);
return err;
}
pci_set_master(pdev);
start = pci_resource_start(pdev, 0);
if (!start) {
printk(KERN_ERR "vrc4173:No PCI I/O resources, aborting\n");
return -ENODEV;
}
if (!start || (((flags = pci_resource_flags(pdev, 0)) & IORESOURCE_IO) == 0)) {
printk(KERN_ERR "vrc4173: No PCI I/O resources, aborting\n");
return -ENODEV;
}
if ((err = pci_request_regions(pdev, "NEC VRC4173")) < 0) {
printk(KERN_ERR "vrc4173: PCI resources are busy, aborting\n");
return err;
}
set_vrc4173_io_offset(start);
vrc4173_cmu_init();
vrc4173_icu_init(pdev->irq);
if ((err = vr41xx_cascade_irq(pdev->irq, vrc4173_get_irq_number)) < 0) {
printk(KERN_ERR
"vrc4173: IRQ resource %d is busy, aborting\n", pdev->irq);
return err;
}
printk(KERN_INFO
"NEC VRC4173 at 0x%#08lx, IRQ is cascaded to %d\n", start, pdev->irq);
return 0;
}
static struct pci_driver vrc4173_driver = {
name: "NEC VRC4173",
probe: vrc4173_probe,
remove: NULL,
id_table: vrc4173_table,
};
static int __devinit vrc4173_init(void)
{
int err;
if ((err = pci_module_init(&vrc4173_driver)) < 0)
return err;
vrc4173_initialized = 1;
return 0;
}
static void __devexit vrc4173_exit(void)
{
vrc4173_initialized = 0;
pci_unregister_driver(&vrc4173_driver);
}
module_init(vrc4173_init);
module_exit(vrc4173_exit);
arch/mips/vr41xx/ibm-workpad/Makefile 0 → 100644
View file @ 4ee45a31
#
# Makefile for the IBM WorkPad z50 specific parts of the kernel
#
obj-y += init.o setup.o
obj-$(CONFIG_IDE) += ide-workpad.o
arch/mips/vr41xx/ibm-workpad/ide-workpad.c 0 → 100644
View file @ 4ee45a31
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* IDE routines for typical pc-like standard configurations for the IBM WorkPad z50.
*
* Copyright (C) 1998, 1999, 2001 by Ralf Baechle
*/
/*
* Changes:
* Yoichi Yuasa <yuasa@hh.iij4u.or.jp> Sun, 24 Feb 2002
* - Added IBM WorkPad z50 support.
*/
#include <linux/sched.h>
#include <linux/ide.h>
#include <linux/ioport.h>
#include <linux/hdreg.h>
#include <asm/ptrace.h>
#include <asm/hdreg.h>
static int workpad_ide_default_irq(ide_ioreg_t base)
{
return 49;
}
static ide_ioreg_t workpad_ide_default_io_base(int index)
{
switch (index) {
case 0: return 0x1f0;
case 1: return 0x170;
case 2: return 0x1e8;
case 3: return 0x168;
case 4: return 0x1e0;
case 5: return 0x160;
}
return 0;
}
static void workpad_ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port,
ide_ioreg_t ctrl_port, int *irq)
{
ide_ioreg_t reg = data_port;
int i;
for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
hw->io_ports[i] = reg;
reg += 1;
}
if (ctrl_port) {
hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
} else {
hw->io_ports[IDE_CONTROL_OFFSET] = hw->io_ports[IDE_DATA_OFFSET] + 0x206;
}
if (irq != NULL)
*irq = 0;
hw->io_ports[IDE_IRQ_OFFSET] = 0;
}
static int workpad_ide_request_irq(unsigned int irq,
void (*handler)(int,void *, struct pt_regs *),
unsigned long flags, const char *device,
void *dev_id)
{
return request_irq(irq, handler, SA_SHIRQ, device, dev_id);
}
static void workpad_ide_free_irq(unsigned int irq, void *dev_id)
{
free_irq(irq, dev_id);
}
static int workpad_ide_check_region(ide_ioreg_t from, unsigned int extent)
{
return check_region(from, extent);
}
static void workpad_ide_request_region(ide_ioreg_t from, unsigned int extent,
const char *name)
{
request_region(from, extent, name);
}
static void workpad_ide_release_region(ide_ioreg_t from, unsigned int extent)
{
release_region(from, extent);
}
struct ide_ops workpad_ide_ops = {
&workpad_ide_default_irq,
&workpad_ide_default_io_base,
&workpad_ide_init_hwif_ports,
&workpad_ide_request_irq,
&workpad_ide_free_irq,
&workpad_ide_check_region,
&workpad_ide_request_region,
&workpad_ide_release_region
};
arch/mips/vr41xx/ibm-workpad/init.c 0 → 100644
View file @ 4ee45a31
/*
* FILE NAME
* arch/mips/vr41xx/ibm-workpad/init.c
*
* BRIEF MODULE DESCRIPTION
* Initialisation code for the IBM WorkPad z50.
*
* Copyright 2002 Yoichi Yuasa
* yuasa@hh.iij4u.or.jp
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <asm/bootinfo.h>
char arcs_cmdline[CL_SIZE];
const char *get_system_type(void)
{
return "IBM WorkPad z50";
}
void __init prom_init(int argc, char **argv, unsigned long magic, int *prom_vec)
{
int i;
/*
* collect args and prepare cmd_line
*/
for (i = 1; i < argc; i++) {
strcat(arcs_cmdline, argv[i]);
if (i < (argc - 1))
strcat(arcs_cmdline, " ");
}
mips_machgroup = MACH_GROUP_NEC_VR41XX;
mips_machtype = MACH_IBM_WORKPAD;
}
void __init prom_free_prom_memory (void)
{
}
arch/mips/vr41xx/ibm-workpad/setup.c 0 → 100644
View file @ 4ee45a31
/*
* FILE NAME
* arch/mips/vr41xx/workpad/setup.c
*
* BRIEF MODULE DESCRIPTION
* Setup for the IBM WorkPad z50.
*
* Copyright 2002 Yoichi Yuasa
* yuasa@hh.iij4u.or.jp
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/config.h>
#include <linux/init.h>
#include <linux/console.h>
#include <linux/ide.h>
#include <linux/ioport.h>
#include <linux/major.h>
#include <linux/kdev_t.h>
#include <linux/root_dev.h>
#include <asm/reboot.h>
#include <asm/time.h>
#include <asm/vr41xx/workpad.h>
#ifdef CONFIG_BLK_DEV_INITRD
extern unsigned long initrd_start, initrd_end;
extern void * __rd_start, * __rd_end;
#endif
#ifdef CONFIG_BLK_DEV_IDE
extern struct ide_ops workpad_ide_ops;
#endif
void __init ibm_workpad_setup(void)
{
set_io_port_base(IO_PORT_BASE);
ioport_resource.start = IO_PORT_RESOURCE_START;
ioport_resource.end = IO_PORT_RESOURCE_END;
iomem_resource.start = IO_MEM_RESOURCE_START;
iomem_resource.end = IO_MEM_RESOURCE_END;
#ifdef CONFIG_BLK_DEV_INITRD
ROOT_DEV = Root_RAM0;
initrd_start = (unsigned long)&__rd_start;
initrd_end = (unsigned long)&__rd_end;
#endif
_machine_restart = vr41xx_restart;
_machine_halt = vr41xx_halt;
_machine_power_off = vr41xx_power_off;
board_time_init = vr41xx_time_init;
board_timer_setup = vr41xx_timer_setup;
#ifdef CONFIG_FB
conswitchp = &dummy_con;
#endif
#ifdef CONFIG_BLK_DEV_IDE
ide_ops = &workpad_ide_ops;
#endif
vr41xx_bcu_init();
vr41xx_cmu_init(0);
#ifdef CONFIG_SERIAL_8250
vr41xx_siu_init(SIU_RS232C, 0);
#endif
}
arch/mips/vr41xx/nec-eagle/Makefile 0 → 100644
View file @ 4ee45a31
#
# Makefile for the NEC Eagle/Hawk specific parts of the kernel
#
# Author: Yoichi Yuasa
# yyuasa@mvista.com or source@mvista.com
#
# Copyright 2001,2002 MontaVista Software Inc.
#
obj-y += init.o irq.o setup.o
obj-$(CONFIG_IDE) += ide-eagle.o
arch/mips/vr41xx/nec-eagle/ide-eagle.c 0 → 100644
View file @ 4ee45a31
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* IDE routines for typical pc-like standard configurations
* for the NEC Eagle/Hawk board.
*
* Copyright (C) 1998, 1999, 2001 by Ralf Baechle
*/
/*
* Changes:
* MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
* Fri, 5 Apr 2002
* - Added support for NEC Hawk.
*
* MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
* Fri, 1 Mar 2002
* - Added support for NEC Eagle.
*/
#include <linux/sched.h>
#include <linux/ide.h>
#include <linux/ioport.h>
#include <linux/hdreg.h>
#include <asm/ptrace.h>
#include <asm/hdreg.h>
static int eagle_ide_default_irq(ide_ioreg_t base)
{
return 0;
}
static ide_ioreg_t eagle_ide_default_io_base(int index)
{
return 0;
}
static void eagle_ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port,
ide_ioreg_t ctrl_port, int *irq)
{
ide_ioreg_t reg = data_port;
int i;
for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
hw->io_ports[i] = reg;
reg += 1;
}
if (ctrl_port) {
hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
} else {
hw->io_ports[IDE_CONTROL_OFFSET] = hw->io_ports[IDE_DATA_OFFSET] + 0x206;
}
if (irq != NULL)
*irq = 0;
hw->io_ports[IDE_IRQ_OFFSET] = 0;
}
static int eagle_ide_request_irq(unsigned int irq,
void (*handler)(int,void *, struct pt_regs *),
unsigned long flags, const char *device,
void *dev_id)
{
return request_irq(irq, handler, SA_SHIRQ, device, dev_id);
}
static void eagle_ide_free_irq(unsigned int irq, void *dev_id)
{
free_irq(irq, dev_id);
}
static int eagle_ide_check_region(ide_ioreg_t from, unsigned int extent)
{
return check_region(from, extent);
}
static void eagle_ide_request_region(ide_ioreg_t from, unsigned int extent,
const char *name)
{
request_region(from, extent, name);
}
static void eagle_ide_release_region(ide_ioreg_t from, unsigned int extent)
{
release_region(from, extent);
}
struct ide_ops eagle_ide_ops = {
&eagle_ide_default_irq,
&eagle_ide_default_io_base,
&eagle_ide_init_hwif_ports,
&eagle_ide_request_irq,
&eagle_ide_free_irq,
&eagle_ide_check_region,
&eagle_ide_request_region,
&eagle_ide_release_region
};
arch/mips/vr41xx/nec-eagle/init.c 0 → 100644
View file @ 4ee45a31
/*
* FILE NAME
* arch/mips/vr41xx/nec-eagle/init.c
*
* BRIEF MODULE DESCRIPTION
* Initialisation code for the NEC Eagle/Hawk board.
*
* Author: Yoichi Yuasa
* yyuasa@mvista.com or source@mvista.com
*
* Copyright 2001,2002 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
/*
* Changes:
* MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
* - Added support for NEC Hawk.
*
* MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
* - New creation, NEC Eagle is supported.
*/
#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <asm/bootinfo.h>
char arcs_cmdline[CL_SIZE];
const char *get_system_type(void)
{
return "NEC Eagle/Hawk";
}
void __init prom_init(int argc, char **argv, unsigned long magic, int *prom_vec)
{
int i;
/*
* collect args and prepare cmd_line
*/
for (i = 1; i < argc; i++) {
strcat(arcs_cmdline, argv[i]);
if (i < (argc - 1))
strcat(arcs_cmdline, " ");
}
mips_machgroup = MACH_GROUP_NEC_VR41XX;
mips_machtype = MACH_NEC_EAGLE;
}
void __init prom_free_prom_memory (void)
{
}
arch/mips/vr41xx/nec-eagle/irq.c 0 → 100644
View file @ 4ee45a31
/*
* FILE NAME
* arch/mips/vr41xx/nec-eagle/irq.c
*
* BRIEF MODULE DESCRIPTION
* Interrupt routines for the NEC Eagle/Hawk board.
*
* Author: Yoichi Yuasa
* yyuasa@mvista.com or source@mvista.com
*
* Copyright 2002 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
/*
* Changes:
* MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
* - Added support for NEC Hawk.
*
* MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
* - New creation, NEC Eagle is supported.
*/
#include <linux/init.h>
#include <linux/interrupt.h>
#include <asm/io.h>
#include <asm/vr41xx/eagle.h>
static void enable_pciint_irq(unsigned int irq)
{
u8 val;
val = readb(NEC_EAGLE_PCIINTMSKREG);
val |= (u8)1 << (irq - PCIINT_IRQ_BASE);
writeb(val, NEC_EAGLE_PCIINTMSKREG);
}
static void disable_pciint_irq(unsigned int irq)
{
u8 val;
val = readb(NEC_EAGLE_PCIINTMSKREG);
val &= ~((u8)1 << (irq - PCIINT_IRQ_BASE));
writeb(val, NEC_EAGLE_PCIINTMSKREG);
}
static unsigned int startup_pciint_irq(unsigned int irq)
{
enable_pciint_irq(irq);
return 0; /* never anything pending */
}
#define shutdown_pciint_irq disable_pciint_irq
#define ack_pciint_irq disable_pciint_irq
static void end_pciint_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
enable_pciint_irq(irq);
}
static struct hw_interrupt_type pciint_irq_type = {
"PCIINT",
startup_pciint_irq,
shutdown_pciint_irq,
enable_pciint_irq,
disable_pciint_irq,
ack_pciint_irq,
end_pciint_irq,
NULL
};
static void enable_sdbint_irq(unsigned int irq)
{
u8 val;
val = readb(NEC_EAGLE_SDBINTMSK);
val |= (u8)1 << (irq - SDBINT_IRQ_BASE);
writeb(val, NEC_EAGLE_SDBINTMSK);
}
static void disable_sdbint_irq(unsigned int irq)
{
u8 val;
val = readb(NEC_EAGLE_SDBINTMSK);
val &= ~((u8)1 << (irq - SDBINT_IRQ_BASE));
writeb(val, NEC_EAGLE_SDBINTMSK);
}
static unsigned int startup_sdbint_irq(unsigned int irq)
{
enable_sdbint_irq(irq);
return 0; /* never anything pending */
}
#define shutdown_sdbint_irq disable_sdbint_irq
#define ack_sdbint_irq disable_sdbint_irq
static void end_sdbint_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
enable_sdbint_irq(irq);
}
static struct hw_interrupt_type sdbint_irq_type = {
"SDBINT",
startup_sdbint_irq,
shutdown_sdbint_irq,
enable_sdbint_irq,
disable_sdbint_irq,
ack_sdbint_irq,
end_sdbint_irq,
NULL
};
static int eagle_get_irq_number(int irq)
{
u8 sdbint, pciint;
int i;
sdbint = readb(NEC_EAGLE_SDBINT);
sdbint &= (NEC_EAGLE_SDBINT_DEG | NEC_EAGLE_SDBINT_ENUM |
NEC_EAGLE_SDBINT_SIO1INT | NEC_EAGLE_SDBINT_SIO2INT |
NEC_EAGLE_SDBINT_PARINT);
pciint = readb(NEC_EAGLE_PCIINTREG);
pciint &= (NEC_EAGLE_PCIINT_CP_INTA | NEC_EAGLE_PCIINT_CP_INTB |
NEC_EAGLE_PCIINT_CP_INTC | NEC_EAGLE_PCIINT_CP_INTD |
NEC_EAGLE_PCIINT_LANINT);
for (i = 1; i < 6; i++)
if (sdbint & (0x01 << i))
return SDBINT_IRQ_BASE + i;
for (i = 0; i < 5; i++)
if (pciint & (0x01 << i))
return PCIINT_IRQ_BASE + i;
return -EINVAL;
}
void __init eagle_irq_init(void)
{
int i;
writeb(0, NEC_EAGLE_SDBINTMSK);
writeb(0, NEC_EAGLE_PCIINTMSKREG);
vr41xx_set_irq_trigger(PCISLOT_PIN, TRIGGER_LEVEL, SIGNAL_THROUGH);
vr41xx_set_irq_level(PCISLOT_PIN, LEVEL_HIGH);
vr41xx_set_irq_trigger(FPGA_PIN, TRIGGER_LEVEL, SIGNAL_THROUGH);
vr41xx_set_irq_level(FPGA_PIN, LEVEL_HIGH);
vr41xx_set_irq_trigger(DCD_PIN, TRIGGER_EDGE, SIGNAL_HOLD);
vr41xx_set_irq_level(DCD_PIN, LEVEL_LOW);
for (i = SDBINT_IRQ_BASE; i <= SDBINT_IRQ_LAST; i++)
irq_desc[i].handler = &sdbint_irq_type;
for (i = PCIINT_IRQ_BASE; i <= PCIINT_IRQ_LAST; i++)
irq_desc[i].handler = &pciint_irq_type;
vr41xx_cascade_irq(FPGA_CASCADE_IRQ, eagle_get_irq_number);
}
arch/mips/vr41xx/nec-eagle/setup.c 0 → 100644
View file @ 4ee45a31
/*
* FILE NAME
* arch/mips/vr41xx/nec-eagle/setup.c
*
* BRIEF MODULE DESCRIPTION
* Setup for the NEC Eagle/Hawk board.
*
* Author: Yoichi Yuasa
* yyuasa@mvista.com or source@mvista.com
*
* Copyright 2001,2002 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
/*
* Changes:
* MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
* - Moved mips_pci_channels[] from arch/mips/vr41xx/vr4122/eagle/setup.c.
* - Added support for NEC Hawk.
*
* MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
* - New creation, NEC Eagle is supported.
*/
#include <linux/config.h>
#include <linux/init.h>
#include <linux/console.h>
#include <linux/ide.h>
#include <linux/ioport.h>
#include <linux/major.h>
#include <linux/kdev_t.h>
#include <linux/root_dev.h>
#include <asm/pci_channel.h>
#include <asm/reboot.h>
#include <asm/time.h>
#include <asm/vr41xx/eagle.h>
#ifdef CONFIG_BLK_DEV_INITRD
extern unsigned long initrd_start, initrd_end;
extern void * __rd_start, * __rd_end;
#endif
#ifdef CONFIG_BLK_DEV_IDE
extern struct ide_ops eagle_ide_ops;
#endif
extern void eagle_irq_init(void);
#ifdef CONFIG_PCI
extern void vrc4173_preinit(void);
static struct resource vr41xx_pci_io_resource = {
"PCI I/O space",
VR41XX_PCI_IO_START,
VR41XX_PCI_IO_END,
IORESOURCE_IO
};
static struct resource vr41xx_pci_mem_resource = {
"PCI memory space",
VR41XX_PCI_MEM_START,
VR41XX_PCI_MEM_END,
IORESOURCE_MEM
};
extern struct pci_ops vr41xx_pci_ops;
struct pci_channel mips_pci_channels[] = {
{&vr41xx_pci_ops, &vr41xx_pci_io_resource, &vr41xx_pci_mem_resource, 0, 256},
{NULL, NULL, NULL, 0, 0}
};
struct vr41xx_pci_address_space vr41xx_pci_mem1 = {
VR41XX_PCI_MEM1_BASE,
VR41XX_PCI_MEM1_MASK,
IO_MEM1_RESOURCE_START
};
struct vr41xx_pci_address_space vr41xx_pci_mem2 = {
VR41XX_PCI_MEM2_BASE,
VR41XX_PCI_MEM2_MASK,
IO_MEM2_RESOURCE_START
};
struct vr41xx_pci_address_space vr41xx_pci_io = {
VR41XX_PCI_IO_BASE,
VR41XX_PCI_IO_MASK,
IO_PORT_RESOURCE_START
};
static struct vr41xx_pci_address_map pci_address_map = {
&vr41xx_pci_mem1,
&vr41xx_pci_mem2,
&vr41xx_pci_io
};
#endif
void __init nec_eagle_setup(void)
{
set_io_port_base(IO_PORT_BASE);
ioport_resource.start = IO_PORT_RESOURCE_START;
ioport_resource.end = IO_PORT_RESOURCE_END;
iomem_resource.start = IO_MEM1_RESOURCE_START;
iomem_resource.end = IO_MEM2_RESOURCE_END;
#ifdef CONFIG_BLK_DEV_INITRD
ROOT_DEV = Root_RAM0;
initrd_start = (unsigned long)&__rd_start;
initrd_end = (unsigned long)&__rd_end;
#endif
_machine_restart = vr41xx_restart;
_machine_halt = vr41xx_halt;
_machine_power_off = vr41xx_power_off;
board_time_init = vr41xx_time_init;
board_timer_setup = vr41xx_timer_setup;
board_irq_init = eagle_irq_init;
#ifdef CONFIG_FB
conswitchp = &dummy_con;
#endif
#ifdef CONFIG_BLK_DEV_IDE
ide_ops = &eagle_ide_ops;
#endif
vr41xx_bcu_init();
vr41xx_cmu_init(0);
#ifdef CONFIG_SERIAL_8250
vr41xx_dsiu_init();
vr41xx_siu_init(SIU_RS232C, 0);
#endif
#ifdef CONFIG_PCI
vr41xx_pciu_init(&pci_address_map);
vrc4173_preinit();
#endif
}
arch/mips/vr41xx/tanbac-tb0226/Makefile 0 → 100644
View file @ 4ee45a31
#
# Makefile for the TANBAC TB0226 specific parts of the kernel
#
obj-y += init.o setup.o
arch/mips/vr41xx/tanbac-tb0226/init.c 0 → 100644
View file @ 4ee45a31
/*
* FILE NAME
* arch/mips/vr41xx/tanbac-tb0226/init.c
*
* BRIEF MODULE DESCRIPTION
* Initialisation code for the TANBAC TB0226.
*
* Copyright 2002,2003 Yoichi Yuasa
* yuasa@hh.iij4u.or.jp
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <asm/bootinfo.h>
#include <asm/cpu.h>
#include <asm/mipsregs.h>
#include <asm/vr41xx/vr41xx.h>
char arcs_cmdline[CL_SIZE];
const char *get_system_type(void)
{
return "TANBAC TB0226";
}
void __init prom_init(int argc, char **argv, unsigned long magic, int *prom_vec)
{
u32 config;
int i;
/*
* collect args and prepare cmd_line
*/
for (i = 1; i < argc; i++) {
strcat(arcs_cmdline, argv[i]);
if (i < (argc - 1))
strcat(arcs_cmdline, " ");
}
mips_machgroup = MACH_GROUP_NEC_VR41XX;
mips_machtype = MACH_TANBAC_TB0226;
switch (current_cpu_data.processor_id) {
case PRID_VR4131_REV1_2:
config = read_c0_config();
config &= ~0x00000030UL;
config |= 0x00410000UL;
write_c0_config(config);
break;
default:
break;
}
}
void __init prom_free_prom_memory (void)
{
}
arch/mips/vr41xx/tanbac-tb0226/setup.c 0 → 100644
View file @ 4ee45a31
/*
* FILE NAME
* arch/mips/vr41xx/tanbac-tb0226/setup.c
*
* BRIEF MODULE DESCRIPTION
* Setup for the TANBAC TB0226.
*
* Copyright 2002,2003 Yoichi Yuasa
* yuasa@hh.iij4u.or.jp
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/config.h>
#include <linux/init.h>
#include <linux/console.h>
#include <linux/ide.h>
#include <linux/ioport.h>
#include <asm/pci_channel.h>
#include <asm/reboot.h>
#include <asm/time.h>
#include <asm/vr41xx/tb0226.h>
#ifdef CONFIG_BLK_DEV_INITRD
extern unsigned long initrd_start, initrd_end;
extern void * __rd_start, * __rd_end;
#endif
#ifdef CONFIG_PCI
static struct resource vr41xx_pci_io_resource = {
.name = "PCI I/O space",
.start = VR41XX_PCI_IO_START,
.end = VR41XX_PCI_IO_END,
.flags = IORESOURCE_IO,
};
static struct resource vr41xx_pci_mem_resource = {
.name = "PCI memory space",
.start = VR41XX_PCI_MEM_START,
.end = VR41XX_PCI_MEM_END,
.flags = IORESOURCE_MEM,
};
extern struct pci_ops vr41xx_pci_ops;
struct pci_channel mips_pci_channels[] = {
{ .pci_ops = &vr41xx_pci_ops,
.io_resource = &vr41xx_pci_io_resource,
.mem_resource = &vr41xx_pci_mem_resource,
.first_devfn = 0,
.last_devfn = 256, },
{ .pci_ops = NULL,
.io_resource = NULL,
.mem_resource = NULL,
.first_devfn = 0,
.last_devfn = 0, },
};
struct vr41xx_pci_address_space vr41xx_pci_mem1 = {
.internal_base = VR41XX_PCI_MEM1_BASE,
.address_mask = VR41XX_PCI_MEM1_MASK,
.pci_base = IO_MEM1_RESOURCE_START,
};
struct vr41xx_pci_address_space vr41xx_pci_mem2 = {
.internal_base = VR41XX_PCI_MEM2_BASE,
.address_mask = VR41XX_PCI_MEM2_MASK,
.pci_base = IO_MEM2_RESOURCE_START,
};
struct vr41xx_pci_address_space vr41xx_pci_io = {
.internal_base = VR41XX_PCI_IO_BASE,
.address_mask = VR41XX_PCI_IO_MASK,
.pci_base = IO_PORT_RESOURCE_START,
};
static struct vr41xx_pci_address_map pci_address_map = {
.mem1 = &vr41xx_pci_mem1,
.mem2 = &vr41xx_pci_mem2,
.io = &vr41xx_pci_io,
};
#endif
void __init tanbac_tb0226_setup(void)
{
set_io_port_base(IO_PORT_BASE);
ioport_resource.start = IO_PORT_RESOURCE_START;
ioport_resource.end = IO_PORT_RESOURCE_END;
iomem_resource.start = IO_MEM1_RESOURCE_START;
iomem_resource.end = IO_MEM2_RESOURCE_END;
#ifdef CONFIG_BLK_DEV_INITRD
ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);
initrd_start = (unsigned long)&__rd_start;
initrd_end = (unsigned long)&__rd_end;
#endif
_machine_restart = vr41xx_restart;
_machine_halt = vr41xx_halt;
_machine_power_off = vr41xx_power_off;
board_time_init = vr41xx_time_init;
board_timer_setup = vr41xx_timer_setup;
#ifdef CONFIG_FB
conswitchp = &dummy_con;
#endif
vr41xx_bcu_init();
vr41xx_cmu_init(0);
vr41xx_siu_init(SIU_RS232C, 0);
#ifdef CONFIG_PCI
vr41xx_pciu_init(&pci_address_map);
#endif
}
arch/mips/vr41xx/tanbac-tb0229/Makefile 0 → 100644
View file @ 4ee45a31
#
# Makefile for the TANBAC TB0229(VR4131DIMM) specific parts of the kernel
#
obj-y := init.o reboot.o setup.o
arch/mips/vr41xx/tanbac-tb0229/init.c 0 → 100644
View file @ 4ee45a31
/*
* FILE NAME
* arch/mips/vr41xx/tanbac-tb0229/init.c
*
* BRIEF MODULE DESCRIPTION
* Initialisation code for the TANBAC TB0229(VR4131DIMM)
*
* Copyright 2002,2003 Yoichi Yuasa
* yuasa@hh.iij4u.or.jp
*
* Modified for TANBAC TB0229:
* Copyright 2003 Megasolution Inc.
* matsu@megasolution.jp
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/string.h>
#include <asm/bootinfo.h>
#include <asm/cpu.h>
#include <asm/mipsregs.h>
#include <asm/vr41xx/vr41xx.h>
char arcs_cmdline[CL_SIZE];
const char *get_system_type(void)
{
return "TANBAC TB0229";
}
void __init prom_init(int argc, char **argv, unsigned long magic, int *prom_vec)
{
u32 config;
int i;
/*
* collect args and prepare cmd_line
*/
for (i = 1; i < argc; i++) {
strcat(arcs_cmdline, argv[i]);
if (i < (argc - 1))
strcat(arcs_cmdline, " ");
}
mips_machgroup = MACH_GROUP_NEC_VR41XX;
mips_machtype = MACH_TANBAC_TB0229;
switch (current_cpu_data.processor_id) {
case PRID_VR4131_REV1_2:
config = read_c0_config();
config &= ~0x00000030UL;
config |= 0x00410000UL;
write_c0_config(config);
break;
default:
break;
}
}
void __init prom_free_prom_memory (void)
{
}
arch/mips/vr41xx/tanbac-tb0229/reboot.c 0 → 100644
View file @ 4ee45a31
/*
* FILE NAME
* arch/mips/vr41xx/tanbac-tb0229/reboot.c
*
* BRIEF MODULE DESCRIPTION
* Depending on TANBAC TB0229(VR4131DIMM) of reboot system call.
*
* Copyright 2003 Megasolution Inc.
* matsu@megasolution.jp
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <asm/io.h>
#include <asm/vr41xx/tb0229.h>
#define tb0229_hard_reset() writew(0, TB0219_RESET_REGS)
void tanbac_tb0229_restart(char *command)
{
#ifdef CONFIG_TANBAC_TB0219
local_irq_disable();
tb0229_hard_reset();
while (1);
#else
vr41xx_restart(command);
#endif
}
arch/mips/vr41xx/tanbac-tb0229/setup.c 0 → 100644
View file @ 4ee45a31
/*
* FILE NAME
* arch/mips/vr41xx/tanbac-tb0229/setup.c
*
* BRIEF MODULE DESCRIPTION
* Setup for the TANBAC TB0229 (VR4131DIMM)
*
* Copyright 2002,2003 Yoichi Yuasa
* yuasa@hh.iij4u.or.jp
*
* Modified for TANBAC TB0229:
* Copyright 2003 Megasolution Inc.
* matsu@megasolution.jp
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/config.h>
#include <linux/blk.h>
#include <linux/console.h>
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/root_dev.h>
#include <asm/pci_channel.h>
#include <asm/reboot.h>
#include <asm/time.h>
#include <asm/vr41xx/tb0229.h>
#ifdef CONFIG_BLK_DEV_INITRD
extern void * __rd_start, * __rd_end;
#endif
#ifdef CONFIG_PCI
static struct resource vr41xx_pci_io_resource = {
.name = "PCI I/O space",
.start = VR41XX_PCI_IO_START,
.end = VR41XX_PCI_IO_END,
.flags = IORESOURCE_IO,
};
static struct resource vr41xx_pci_mem_resource = {
.name = "PCI memory space",
.start = VR41XX_PCI_MEM_START,
.end = VR41XX_PCI_MEM_END,
.flags = IORESOURCE_MEM,
};
extern struct pci_ops vr41xx_pci_ops;
struct pci_channel mips_pci_channels[] = {
{ .pci_ops = &vr41xx_pci_ops,
.io_resource = &vr41xx_pci_io_resource,
.mem_resource = &vr41xx_pci_mem_resource,
.first_devfn = 0,
.last_devfn = 256, },
{ .pci_ops = NULL,
.io_resource = NULL,
.mem_resource = NULL,
.first_devfn = 0,
.last_devfn = 0, }
};
struct vr41xx_pci_address_space vr41xx_pci_mem1 = {
.internal_base = VR41XX_PCI_MEM1_BASE,
.address_mask = VR41XX_PCI_MEM1_MASK,
.pci_base = IO_MEM1_RESOURCE_START,
};
struct vr41xx_pci_address_space vr41xx_pci_mem2 = {
.internal_base = VR41XX_PCI_MEM2_BASE,
.address_mask = VR41XX_PCI_MEM2_MASK,
.pci_base = IO_MEM2_RESOURCE_START,
};
struct vr41xx_pci_address_space vr41xx_pci_io = {
.internal_base = VR41XX_PCI_IO_BASE,
.address_mask = VR41XX_PCI_IO_MASK,
.pci_base = IO_PORT_RESOURCE_START
};
static struct vr41xx_pci_address_map pci_address_map = {
.mem1 = &vr41xx_pci_mem1,
.mem2 = &vr41xx_pci_mem2,
.io = &vr41xx_pci_io,
};
#endif
void __init tanbac_tb0229_setup(void)
{
set_io_port_base(IO_PORT_BASE);
ioport_resource.start = IO_PORT_RESOURCE_START;
ioport_resource.end = IO_PORT_RESOURCE_END;
iomem_resource.start = IO_MEM1_RESOURCE_START;
iomem_resource.end = IO_MEM2_RESOURCE_END;
#ifdef CONFIG_BLK_DEV_INITRD
ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);
initrd_start = (unsigned long)&__rd_start;
initrd_end = (unsigned long)&__rd_end;
#endif
_machine_restart = tanbac_tb0229_restart;
_machine_halt = vr41xx_halt;
_machine_power_off = vr41xx_power_off;
board_time_init = vr41xx_time_init;
board_timer_setup = vr41xx_timer_setup;
#ifdef CONFIG_FB
conswitchp = &dummy_con;
#endif
vr41xx_bcu_init();
vr41xx_cmu_init(0);
vr41xx_siu_init(SIU_RS232C, 0);
vr41xx_dsiu_init();
#ifdef CONFIG_PCI
vr41xx_pciu_init(&pci_address_map);
#endif
}
arch/mips/vr41xx/victor-mpc30x/Makefile 0 → 100644
View file @ 4ee45a31
#
# Makefile for the Victor MP-C303/304 specific parts of the kernel
#
obj-y += init.o setup.o
obj-$(CONFIG_IDE) += ide-mpc30x.o
arch/mips/vr41xx/victor-mpc30x/ide-mpc30x.c 0 → 100644
View file @ 4ee45a31
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* IDE routines for typical pc-like standard configurations
* for the ZAO Networks Capcella.
*
* Copyright (C) 1998, 1999, 2001 by Ralf Baechle
*/
/*
* Changes:
* Yoichi Yuasa <yuasa@hh.iij4u.or.jp> Fri, 23 Aug 2002
* - Added Victor MP-C303/304 support.
*/
#include <linux/sched.h>
#include <linux/ide.h>
#include <linux/ioport.h>
#include <linux/hdreg.h>
#include <asm/ptrace.h>
#include <asm/hdreg.h>
static int mpc30x_ide_default_irq(ide_ioreg_t base)
{
return 0;
}
static ide_ioreg_t mpc30x_ide_default_io_base(int index)
{
return 0;
}
static void mpc30x_ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port,
ide_ioreg_t ctrl_port, int *irq)
{
ide_ioreg_t reg = data_port;
int i;
for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
hw->io_ports[i] = reg;
reg += 1;
}
if (ctrl_port) {
hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
} else {
hw->io_ports[IDE_CONTROL_OFFSET] = hw->io_ports[IDE_DATA_OFFSET] + 0x206;
}
if (irq != NULL)
*irq = 0;
hw->io_ports[IDE_IRQ_OFFSET] = 0;
}
static int mpc30x_ide_request_irq(unsigned int irq,
void (*handler)(int,void *, struct pt_regs *),
unsigned long flags, const char *device,
void *dev_id)
{
return request_irq(irq, handler, flags, device, dev_id);
}
static void mpc30x_ide_free_irq(unsigned int irq, void *dev_id)
{
free_irq(irq, dev_id);
}
static int mpc30x_ide_check_region(ide_ioreg_t from, unsigned int extent)
{
return check_region(from, extent);
}
static void mpc30x_ide_request_region(ide_ioreg_t from, unsigned int extent,
const char *name)
{
request_region(from, extent, name);
}
static void mpc30x_ide_release_region(ide_ioreg_t from, unsigned int extent)
{
release_region(from, extent);
}
struct ide_ops mpc30x_ide_ops = {
&mpc30x_ide_default_irq,
&mpc30x_ide_default_io_base,
&mpc30x_ide_init_hwif_ports,
&mpc30x_ide_request_irq,
&mpc30x_ide_free_irq,
&mpc30x_ide_check_region,
&mpc30x_ide_request_region,
&mpc30x_ide_release_region
};
arch/mips/vr41xx/victor-mpc30x/init.c 0 → 100644
View file @ 4ee45a31
/*
* FILE NAME
* arch/mips/vr41xx/victor-mpc30x/init.c
*
* BRIEF MODULE DESCRIPTION
* Initialisation code for the Victor MP-C303/304.
*
* Copyright 2002 Yoichi Yuasa
* yuasa@hh.iij4u.or.jp
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <asm/bootinfo.h>
#include <asm/cpu.h>
#include <asm/mipsregs.h>
#include <asm/vr41xx/vr41xx.h>
char arcs_cmdline[CL_SIZE];
const char *get_system_type(void)
{
return "Victor MP-C303/304";
}
void __init prom_init(int argc, char **argv, unsigned long magic, int *prom_vec)
{
int i;
/*
* collect args and prepare cmd_line
*/
for (i = 1; i < argc; i++) {
strcat(arcs_cmdline, argv[i]);
if (i < (argc - 1))
strcat(arcs_cmdline, " ");
}
mips_machgroup = MACH_GROUP_NEC_VR41XX;
mips_machtype = MACH_VICTOR_MPC30X;
add_memory_region(0, 32 << 20, BOOT_MEM_RAM);
}
void __init prom_free_prom_memory (void)
{
}
arch/mips/vr41xx/victor-mpc30x/setup.c 0 → 100644
View file @ 4ee45a31
/*
* FILE NAME
* arch/mips/vr41xx/victor-mpc30x/setup.c
*
* BRIEF MODULE DESCRIPTION
* Setup for the Victor MP-C303/304.
*
* Copyright 2002 Yoichi Yuasa
* yuasa@hh.iij4u.or.jp
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/config.h>
#include <linux/init.h>
#include <linux/console.h>
#include <linux/ide.h>
#include <linux/ioport.h>
#include <linux/major.h>
#include <linux/kdev_t.h>
#include <linux/root_dev.h>
#include <asm/pci_channel.h>
#include <asm/reboot.h>
#include <asm/time.h>
#include <asm/vr41xx/mpc30x.h>
#ifdef CONFIG_BLK_DEV_INITRD
extern unsigned long initrd_start, initrd_end;
extern void * __rd_start, * __rd_end;
#endif
#ifdef CONFIG_BLK_DEV_IDE
extern struct ide_ops mpc30x_ide_ops;
#endif
#ifdef CONFIG_PCI
static struct resource vr41xx_pci_io_resource = {
"PCI I/O space",
VR41XX_PCI_IO_START,
VR41XX_PCI_IO_END,
IORESOURCE_IO
};
static struct resource vr41xx_pci_mem_resource = {
"PCI memory space",
VR41XX_PCI_MEM_START,
VR41XX_PCI_MEM_END,
IORESOURCE_MEM
};
extern struct pci_ops vr41xx_pci_ops;
struct pci_channel mips_pci_channels[] = {
{&vr41xx_pci_ops, &vr41xx_pci_io_resource, &vr41xx_pci_mem_resource, 0, 256},
{NULL, NULL, NULL, 0, 0}
};
struct vr41xx_pci_address_space vr41xx_pci_mem1 = {
VR41XX_PCI_MEM1_BASE,
VR41XX_PCI_MEM1_MASK,
IO_MEM1_RESOURCE_START
};
struct vr41xx_pci_address_space vr41xx_pci_mem2 = {
VR41XX_PCI_MEM2_BASE,
VR41XX_PCI_MEM2_MASK,
IO_MEM2_RESOURCE_START
};
struct vr41xx_pci_address_space vr41xx_pci_io = {
VR41XX_PCI_IO_BASE,
VR41XX_PCI_IO_MASK,
IO_PORT_RESOURCE_START
};
static struct vr41xx_pci_address_map pci_address_map = {
&vr41xx_pci_mem1,
&vr41xx_pci_mem2,
&vr41xx_pci_io
};
#endif
void __init victor_mpc30x_setup(void)
{
set_io_port_base(IO_PORT_BASE);
ioport_resource.start = IO_PORT_RESOURCE_START;
ioport_resource.end = IO_PORT_RESOURCE_END;
iomem_resource.start = IO_MEM1_RESOURCE_START;
iomem_resource.end = IO_MEM2_RESOURCE_END;
#ifdef CONFIG_BLK_DEV_INITRD
ROOT_DEV = Root_RAM0;
initrd_start = (unsigned long)&__rd_start;
initrd_end = (unsigned long)&__rd_end;
#endif
_machine_restart = vr41xx_restart;
_machine_halt = vr41xx_halt;
_machine_power_off = vr41xx_power_off;
board_time_init = vr41xx_time_init;
board_timer_setup = vr41xx_timer_setup;
#ifdef CONFIG_FB
conswitchp = &dummy_con;
#endif
#ifdef CONFIG_BLK_DEV_IDE
ide_ops = &mpc30x_ide_ops;
#endif
vr41xx_bcu_init();
vr41xx_cmu_init(0);
#ifdef CONFIG_SERIAL_8250
vr41xx_siu_init(SIU_RS232C, 0);
#endif
#ifdef CONFIG_PCI
vr41xx_pciu_init(&pci_address_map);
#endif
}
arch/mips/vr41xx/zao-capcella/Makefile 0 → 100644
View file @ 4ee45a31
#
# Makefile for the ZAO Networks Capcella specific parts of the kernel
#
obj-y += init.o setup.o
obj-$(CONFIG_IDE) += ide-capcella.o
arch/mips/vr41xx/zao-capcella/ide-capcella.c 0 → 100644
View file @ 4ee45a31
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* IDE routines for typical pc-like standard configurations
* for the ZAO Networks Capcella.
*
* Copyright (C) 1998, 1999, 2001 by Ralf Baechle
*/
/*
* Changes:
* Yoichi Yuasa <yuasa@hh.iij4u.or.jp> Sun, 24 Feb 2002
* - Added ZAO Networks Capcella support.
*/
#include <linux/sched.h>
#include <linux/ide.h>
#include <linux/ioport.h>
#include <linux/hdreg.h>
#include <asm/ptrace.h>
#include <asm/hdreg.h>
static int capcella_ide_default_irq(ide_ioreg_t base)
{
switch (base) {
case 0x8300: return 42;
}
return 0;
}
static ide_ioreg_t capcella_ide_default_io_base(int index)
{
switch (index) {
case 0: return 0x8300;
}
return 0;
}
static void capcella_ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port,
ide_ioreg_t ctrl_port, int *irq)
{
ide_ioreg_t reg = data_port;
int i;
for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
hw->io_ports[i] = reg;
reg += 1;
}
if (ctrl_port) {
hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
} else {
hw->io_ports[IDE_CONTROL_OFFSET] = hw->io_ports[IDE_DATA_OFFSET] + 0x206;
}
if (irq != NULL)
*irq = 0;
hw->io_ports[IDE_IRQ_OFFSET] = 0;
}
static int capcella_ide_request_irq(unsigned int irq,
void (*handler)(int,void *, struct pt_regs *),
unsigned long flags, const char *device,
void *dev_id)
{
return request_irq(irq, handler, flags, device, dev_id);
}
static void capcella_ide_free_irq(unsigned int irq, void *dev_id)
{
free_irq(irq, dev_id);
}
static int capcella_ide_check_region(ide_ioreg_t from, unsigned int extent)
{
return check_region(from, extent);
}
static void capcella_ide_request_region(ide_ioreg_t from, unsigned int extent,
const char *name)
{
request_region(from, extent, name);
}
static void capcella_ide_release_region(ide_ioreg_t from, unsigned int extent)
{
release_region(from, extent);
}
struct ide_ops capcella_ide_ops = {
&capcella_ide_default_irq,
&capcella_ide_default_io_base,
&capcella_ide_init_hwif_ports,
&capcella_ide_request_irq,
&capcella_ide_free_irq,
&capcella_ide_check_region,
&capcella_ide_request_region,
&capcella_ide_release_region
};
arch/mips/vr41xx/zao-capcella/init.c 0 → 100644
View file @ 4ee45a31
/*
* FILE NAME
* arch/mips/vr41xx/zao-capcella/init.c
*
* BRIEF MODULE DESCRIPTION
* Initialisation code for the ZAO Networks Capcella.
*
* Copyright 2002 Yoichi Yuasa
* yuasa@hh.iij4u.or.jp
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <asm/bootinfo.h>
#include <asm/cpu.h>
#include <asm/mipsregs.h>
#include <asm/vr41xx/vr41xx.h>
char arcs_cmdline[CL_SIZE];
const char *get_system_type(void)
{
return "ZAO Networks Capcella";
}
void __init prom_init(int argc, char **argv, unsigned long magic, int *prom_vec)
{
u32 config;
int i;
/*
* collect args and prepare cmd_line
*/
for (i = 1; i < argc; i++) {
strcat(arcs_cmdline, argv[i]);
if (i < (argc - 1))
strcat(arcs_cmdline, " ");
}
mips_machgroup = MACH_GROUP_NEC_VR41XX;
mips_machtype = MACH_ZAO_CAPCELLA;
switch (current_cpu_data.processor_id) {
case PRID_VR4131_REV1_2:
config = read_c0_config();
config &= ~0x00000030UL;
config |= 0x00410000UL;
write_c0_config(config);
break;
default:
break;
}
}
void __init prom_free_prom_memory (void)
{
}
arch/mips/vr41xx/zao-capcella/setup.c 0 → 100644
View file @ 4ee45a31
/*
* FILE NAME
* arch/mips/vr41xx/zao-capcella/setup.c
*
* BRIEF MODULE DESCRIPTION
* Setup for the ZAO Networks Capcella.
*
* Copyright 2002 Yoichi Yuasa
* yuasa@hh.iij4u.or.jp
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/config.h>
#include <linux/init.h>
#include <linux/console.h>
#include <linux/ide.h>
#include <linux/ioport.h>
#include <linux/major.h>
#include <linux/kdev_t.h>
#include <linux/root_dev.h>
#include <asm/pci_channel.h>
#include <asm/reboot.h>
#include <asm/time.h>
#include <asm/vr41xx/capcella.h>
#ifdef CONFIG_BLK_DEV_INITRD
extern unsigned long initrd_start, initrd_end;
extern void * __rd_start, * __rd_end;
#endif
#ifdef CONFIG_BLK_DEV_IDE
extern struct ide_ops capcella_ide_ops;
#endif
#ifdef CONFIG_PCI
static struct resource vr41xx_pci_io_resource = {
"PCI I/O space",
VR41XX_PCI_IO_START,
VR41XX_PCI_IO_END,
IORESOURCE_IO
};
static struct resource vr41xx_pci_mem_resource = {
"PCI memory space",
VR41XX_PCI_MEM_START,
VR41XX_PCI_MEM_END,
IORESOURCE_MEM
};
extern struct pci_ops vr41xx_pci_ops;
struct pci_channel mips_pci_channels[] = {
{&vr41xx_pci_ops, &vr41xx_pci_io_resource, &vr41xx_pci_mem_resource, 0, 256},
{NULL, NULL, NULL, 0, 0}
};
struct vr41xx_pci_address_space vr41xx_pci_mem1 = {
VR41XX_PCI_MEM1_BASE,
VR41XX_PCI_MEM1_MASK,
IO_MEM1_RESOURCE_START
};
struct vr41xx_pci_address_space vr41xx_pci_mem2 = {
VR41XX_PCI_MEM2_BASE,
VR41XX_PCI_MEM2_MASK,
IO_MEM2_RESOURCE_START
};
struct vr41xx_pci_address_space vr41xx_pci_io = {
VR41XX_PCI_IO_BASE,
VR41XX_PCI_IO_MASK,
IO_PORT_RESOURCE_START
};
static struct vr41xx_pci_address_map pci_address_map = {
&vr41xx_pci_mem1,
&vr41xx_pci_mem2,
&vr41xx_pci_io
};
#endif
void __init zao_capcella_setup(void)
{
set_io_port_base(IO_PORT_BASE);
ioport_resource.start = IO_PORT_RESOURCE_START;
ioport_resource.end = IO_PORT_RESOURCE_END;
iomem_resource.start = IO_MEM1_RESOURCE_START;
iomem_resource.end = IO_MEM2_RESOURCE_END;
#ifdef CONFIG_BLK_DEV_INITRD
ROOT_DEV = Root_RAM0;
initrd_start = (unsigned long)&__rd_start;
initrd_end = (unsigned long)&__rd_end;
#endif
_machine_restart = vr41xx_restart;
_machine_halt = vr41xx_halt;
_machine_power_off = vr41xx_power_off;
board_time_init = vr41xx_time_init;
board_timer_setup = vr41xx_timer_setup;
#ifdef CONFIG_FB
conswitchp = &dummy_con;
#endif
#ifdef CONFIG_BLK_DEV_IDE
ide_ops = &capcella_ide_ops;
#endif
vr41xx_bcu_init();
vr41xx_cmu_init(0x0102);
#ifdef CONFIG_SERIAL_8250
vr41xx_siu_init(SIU_RS232C, 0);
vr41xx_dsiu_init();
#endif
#ifdef CONFIG_PCI
vr41xx_pciu_init(&pci_address_map);
#endif
}
include/asm-mips/vr41xx/capcella.h 0 → 100644
View file @ 4ee45a31
/*
* FILE NAME
* include/asm-mips/vr41xx/capcella.h
*
* BRIEF MODULE DESCRIPTION
* Include file for ZAO Networks Capcella.
*
* Copyright 2002,2003 Yoichi Yuasa
* yuasa@hh.iij4u.or.jp
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#ifndef __ZAO_CAPCELLA_H
#define __ZAO_CAPCELLA_H
#include <asm/addrspace.h>
#include <asm/vr41xx/vr41xx.h>
/*
* Board specific address mapping
*/
#define VR41XX_PCI_MEM1_BASE 0x10000000
#define VR41XX_PCI_MEM1_SIZE 0x04000000
#define VR41XX_PCI_MEM1_MASK 0x7c000000
#define VR41XX_PCI_MEM2_BASE 0x14000000
#define VR41XX_PCI_MEM2_SIZE 0x02000000
#define VR41XX_PCI_MEM2_MASK 0x7e000000
#define VR41XX_PCI_IO_BASE 0x16000000
#define VR41XX_PCI_IO_SIZE 0x02000000
#define VR41XX_PCI_IO_MASK 0x7e000000
#define VR41XX_PCI_IO_START 0x01000000
#define VR41XX_PCI_IO_END 0x01ffffff
#define VR41XX_PCI_MEM_START 0x12000000
#define VR41XX_PCI_MEM_END 0x15ffffff
#define IO_PORT_BASE KSEG1ADDR(VR41XX_PCI_IO_BASE)
#define IO_PORT_RESOURCE_START 0
#define IO_PORT_RESOURCE_END VR41XX_PCI_IO_SIZE
#define IO_MEM1_RESOURCE_START VR41XX_PCI_MEM1_BASE
#define IO_MEM1_RESOURCE_END (VR41XX_PCI_MEM1_BASE + VR41XX_PCI_MEM1_SIZE)
#define IO_MEM2_RESOURCE_START VR41XX_PCI_MEM2_BASE
#define IO_MEM2_RESOURCE_END (VR41XX_PCI_MEM2_BASE + VR41XX_PCI_MEM2_SIZE)
/*
* General-Purpose I/O Pin Number
*/
#define PC104PLUS_INTA_PIN 2
#define PC104PLUS_INTB_PIN 3
#define PC104PLUS_INTC_PIN 4
#define PC104PLUS_INTD_PIN 5
/*
* Interrupt Number
*/
#define RTL8139_1_IRQ GIU_IRQ(PC104PLUS_INTC_PIN)
#define RTL8139_2_IRQ GIU_IRQ(PC104PLUS_INTD_PIN)
#define PC104PLUS_INTA_IRQ GIU_IRQ(PC104PLUS_INTA_PIN)
#define PC104PLUS_INTB_IRQ GIU_IRQ(PC104PLUS_INTB_PIN)
#define PC104PLUS_INTC_IRQ GIU_IRQ(PC104PLUS_INTC_PIN)
#define PC104PLUS_INTD_IRQ GIU_IRQ(PC104PLUS_INTD_PIN)
#endif /* __ZAO_CAPCELLA_H */
include/asm-mips/vr41xx/e55.h 0 → 100644
View file @ 4ee45a31
/*
* FILE NAME
* include/asm-mips/vr41xx/e55.h
*
* BRIEF MODULE DESCRIPTION
* Include file for CASIO CASSIOPEIA E-10/15/55/65.
*
* Copyright 2002 Yoichi Yuasa
* yuasa@hh.iij4u.or.jp
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#ifndef __CASIO_E55_H
#define __CASIO_E55_H
#include <asm/addrspace.h>
#include <asm/vr41xx/vr41xx.h>
/*
* Board specific address mapping
*/
#define VR41XX_ISA_MEM_BASE 0x10000000
#define VR41XX_ISA_MEM_SIZE 0x04000000
#define VR41XX_ISA_IO_BASE 0x14000000
#define VR41XX_ISA_IO_SIZE 0x04000000
#define IO_PORT_BASE KSEG1ADDR(VR41XX_ISA_IO_BASE)
#define IO_PORT_RESOURCE_START 0
#define IO_PORT_RESOURCE_END VR41XX_ISA_IO_SIZE
#define IO_MEM_RESOURCE_START VR41XX_ISA_MEM_BASE
#define IO_MEM_RESOURCE_END (VR41XX_ISA_MEM_BASE + VR41XX_ISA_MEM_SIZE)
#endif /* __CASIO_E55_H */
include/asm-mips/vr41xx/eagle.h 0 → 100644
View file @ 4ee45a31
/*
* FILE NAME
* include/asm-mips/vr41xx/eagle.h
*
* BRIEF MODULE DESCRIPTION
* Include file for NEC Eagle board.
*
* Author: MontaVista Software, Inc.
* yyuasa@mvista.com or source@mvista.com
*
* Copyright 2001-2003 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef __NEC_EAGLE_H
#define __NEC_EAGLE_H
#include <asm/addrspace.h>
#include <asm/vr41xx/vr41xx.h>
/*
* Board specific address mapping
*/
#define VR41XX_PCI_MEM1_BASE 0x10000000
#define VR41XX_PCI_MEM1_SIZE 0x04000000
#define VR41XX_PCI_MEM1_MASK 0x7c000000
#define VR41XX_PCI_MEM2_BASE 0x14000000
#define VR41XX_PCI_MEM2_SIZE 0x02000000
#define VR41XX_PCI_MEM2_MASK 0x7e000000
#define VR41XX_PCI_IO_BASE 0x16000000
#define VR41XX_PCI_IO_SIZE 0x02000000
#define VR41XX_PCI_IO_MASK 0x7e000000
#define VR41XX_PCI_IO_START 0x01000000
#define VR41XX_PCI_IO_END 0x01ffffff
#define VR41XX_PCI_MEM_START 0x12000000
#define VR41XX_PCI_MEM_END 0x15ffffff
#define IO_PORT_BASE KSEG1ADDR(VR41XX_PCI_IO_BASE)
#define IO_PORT_RESOURCE_START 0
#define IO_PORT_RESOURCE_END VR41XX_PCI_IO_SIZE
#define IO_MEM1_RESOURCE_START VR41XX_PCI_MEM1_BASE
#define IO_MEM1_RESOURCE_END (VR41XX_PCI_MEM1_BASE + VR41XX_PCI_MEM1_SIZE)
#define IO_MEM2_RESOURCE_START VR41XX_PCI_MEM2_BASE
#define IO_MEM2_RESOURCE_END (VR41XX_PCI_MEM2_BASE + VR41XX_PCI_MEM2_SIZE)
/*
* General-Purpose I/O Pin Number
*/
#define VRC4173_PIN 1
#define PCISLOT_PIN 4
#define FPGA_PIN 5
#define DCD_PIN 15
/*
* Interrupt Number
*/
#define VRC4173_CASCADE_IRQ GIU_IRQ(VRC4173_PIN)
#define PCISLOT_IRQ GIU_IRQ(PCISLOT_PIN)
#define FPGA_CASCADE_IRQ GIU_IRQ(FPGA_PIN)
#define DCD_IRQ GIU_IRQ(DCD_PIN)
#define SDBINT_IRQ_BASE 88
#define SDBINT_IRQ(x) (SDBINT_IRQ_BASE + (x))
/* RFU */
#define DEG_IRQ SDBINT_IRQ(1)
#define ENUM_IRQ SDBINT_IRQ(2)
#define SIO1INT_IRQ SDBINT_IRQ(3)
#define SIO2INT_IRQ SDBINT_IRQ(4)
#define PARINT_IRQ SDBINT_IRQ(5)
#define SDBINT_IRQ_LAST PARINT_IRQ
#define PCIINT_IRQ_BASE 96
#define PCIINT_IRQ(x) (PCIINT_IRQ_BASE + (x))
#define CP_INTA_IRQ PCIINT_IRQ(0)
#define CP_INTB_IRQ PCIINT_IRQ(1)
#define CP_INTC_IRQ PCIINT_IRQ(2)
#define CP_INTD_IRQ PCIINT_IRQ(3)
#define LANINTA_IRQ PCIINT_IRQ(4)
#define PCIINT_IRQ_LAST LANINTA_IRQ
/*
* On board Devices I/O Mapping
*/
#define NEC_EAGLE_SIO1RB KSEG1ADDR(0x0DFFFEC0)
#define NEC_EAGLE_SIO1TH KSEG1ADDR(0x0DFFFEC0)
#define NEC_EAGLE_SIO1IE KSEG1ADDR(0x0DFFFEC2)
#define NEC_EAGLE_SIO1IID KSEG1ADDR(0x0DFFFEC4)
#define NEC_EAGLE_SIO1FC KSEG1ADDR(0x0DFFFEC4)
#define NEC_EAGLE_SIO1LC KSEG1ADDR(0x0DFFFEC6)
#define NEC_EAGLE_SIO1MC KSEG1ADDR(0x0DFFFEC8)
#define NEC_EAGLE_SIO1LS KSEG1ADDR(0x0DFFFECA)
#define NEC_EAGLE_SIO1MS KSEG1ADDR(0x0DFFFECC)
#define NEC_EAGLE_SIO1SC KSEG1ADDR(0x0DFFFECE)
#define NEC_EAGLE_SIO2TH KSEG1ADDR(0x0DFFFED0)
#define NEC_EAGLE_SIO2IE KSEG1ADDR(0x0DFFFED2)
#define NEC_EAGLE_SIO2IID KSEG1ADDR(0x0DFFFED4)
#define NEC_EAGLE_SIO2FC KSEG1ADDR(0x0DFFFED4)
#define NEC_EAGLE_SIO2LC KSEG1ADDR(0x0DFFFED6)
#define NEC_EAGLE_SIO2MC KSEG1ADDR(0x0DFFFED8)
#define NEC_EAGLE_SIO2LS KSEG1ADDR(0x0DFFFEDA)
#define NEC_EAGLE_SIO2MS KSEG1ADDR(0x0DFFFEDC)
#define NEC_EAGLE_SIO2SC KSEG1ADDR(0x0DFFFEDE)
#define NEC_EAGLE_PIOPP_DATA KSEG1ADDR(0x0DFFFEE0)
#define NEC_EAGLE_PIOPP_STATUS KSEG1ADDR(0x0DFFFEE2)
#define NEC_EAGLE_PIOPP_CNT KSEG1ADDR(0x0DFFFEE4)
#define NEC_EAGLE_PIOPP_EPPADDR KSEG1ADDR(0x0DFFFEE6)
#define NEC_EAGLE_PIOPP_EPPDATA0 KSEG1ADDR(0x0DFFFEE8)
#define NEC_EAGLE_PIOPP_EPPDATA1 KSEG1ADDR(0x0DFFFEEA)
#define NEC_EAGLE_PIOPP_EPPDATA2 KSEG1ADDR(0x0DFFFEEC)
#define NEC_EAGLE_PIOECP_DATA KSEG1ADDR(0x0DFFFEF0)
#define NEC_EAGLE_PIOECP_CONFIG KSEG1ADDR(0x0DFFFEF2)
#define NEC_EAGLE_PIOECP_EXTCNT KSEG1ADDR(0x0DFFFEF4)
/*
* FLSHCNT Register
*/
#define NEC_EAGLE_FLSHCNT KSEG1ADDR(0x0DFFFFA0)
#define NEC_EAGLE_FLSHCNT_FRDY 0x80
#define NEC_EAGLE_FLSHCNT_VPPE 0x40
#define NEC_EAGLE_FLSHCNT_WP2 0x01
/*
* FLSHBANK Register
*/
#define NEC_EAGLE_FLSHBANK KSEG1ADDR(0x0DFFFFA4)
#define NEC_EAGLE_FLSHBANK_S_BANK2 0x40
#define NEC_EAGLE_FLSHBANK_S_BANK1 0x20
#define NEC_EAGLE_FLSHBANK_BNKQ4 0x10
#define NEC_EAGLE_FLSHBANK_BNKQ3 0x08
#define NEC_EAGLE_FLSHBANK_BNKQ2 0x04
#define NEC_EAGLE_FLSHBANK_BNKQ1 0x02
#define NEC_EAGLE_FLSHBANK_BNKQ0 0x01
/*
* SWITCH Setting Register
*/
#define NEC_EAGLE_SWTCHSET KSEG1ADDR(0x0DFFFFA8)
#define NEC_EAGLE_SWTCHSET_DP2SW4 0x80
#define NEC_EAGLE_SWTCHSET_DP2SW3 0x40
#define NEC_EAGLE_SWTCHSET_DP2SW2 0x20
#define NEC_EAGLE_SWTCHSET_DP2SW1 0x10
#define NEC_EAGLE_SWTCHSET_DP1SW4 0x08
#define NEC_EAGLE_SWTCHSET_DP1SW3 0x04
#define NEC_EAGLE_SWTCHSET_DP1SW2 0x02
#define NEC_EAGLE_SWTCHSET_DP1SW1 0x01
/*
* PPT Parallel Port Device Controller
*/
#define NEC_EAGLE_PPT_WRITE_DATA KSEG1ADDR(0x0DFFFFB0)
#define NEC_EAGLE_PPT_READ_DATA KSEG1ADDR(0x0DFFFFB2)
#define NEC_EAGLE_PPT_CNT KSEG1ADDR(0x0DFFFFB4)
#define NEC_EAGLE_PPT_CNT2 KSEG1ADDR(0x0DFFFFB4)
/* Control Register */
#define NEC_EAGLE_PPT_INTMSK 0x20
#define NEC_EAGLE_PPT_PARIINT 0x10
#define NEC_EAGLE_PPT_SELECTIN 0x08
#define NEC_EAGLE_PPT_INIT 0x04
#define NEC_EAGLE_PPT_AUTOFD 0x02
#define NEC_EAGLE_PPT_STROBE 0x01
/* Control Rgister 2 */
#define NEC_EAGLE_PPT_PAREN 0x80
#define NEC_EAGLE_PPT_AUTOEN 0x20
#define NEC_EAGLE_PPT_BUSY 0x10
#define NEC_EAGLE_PPT_ACK 0x08
#define NEC_EAGLE_PPT_PE 0x04
#define NEC_EAGLE_PPT_SELECT 0x02
#define NEC_EAGLE_PPT_FAULT 0x01
/*
* LEDWR Register
*/
#define NEC_EAGLE_LEDWR1 KSEG1ADDR(0x0DFFFFC0)
#define NEC_EAGLE_LEDWR2 KSEG1ADDR(0x0DFFFFC4)
/*
* SDBINT Register
*/
#define NEC_EAGLE_SDBINT KSEG1ADDR(0x0DFFFFD0)
#define NEC_EAGLE_SDBINT_PARINT 0x20
#define NEC_EAGLE_SDBINT_SIO2INT 0x10
#define NEC_EAGLE_SDBINT_SIO1INT 0x08
#define NEC_EAGLE_SDBINT_ENUM 0x04
#define NEC_EAGLE_SDBINT_DEG 0x02
/*
* SDB INTMSK Register
*/
#define NEC_EAGLE_SDBINTMSK KSEG1ADDR(0x0DFFFFD4)
#define NEC_EAGLE_SDBINTMSK_MSKPAR 0x20
#define NEC_EAGLE_SDBINTMSK_MSKSIO2 0x10
#define NEC_EAGLE_SDBINTMSK_MSKSIO1 0x08
#define NEC_EAGLE_SDBINTMSK_MSKENUM 0x04
#define NEC_EAGLE_SDBINTMSK_MSKDEG 0x02
/*
* RSTREG Register
*/
#define NEC_EAGLE_RSTREG KSEG1ADDR(0x0DFFFFD8)
#define NEC_EAGLE_RST_RSTSW 0x02
#define NEC_EAGLE_RST_LEDOFF 0x01
/*
* PCI INT Rgister
*/
#define NEC_EAGLE_PCIINTREG KSEG1ADDR(0x0DFFFFDC)
#define NEC_EAGLE_PCIINT_LANINT 0x10
#define NEC_EAGLE_PCIINT_CP_INTD 0x08
#define NEC_EAGLE_PCIINT_CP_INTC 0x04
#define NEC_EAGLE_PCIINT_CP_INTB 0x02
#define NEC_EAGLE_PCIINT_CP_INTA 0x01
/*
* PCI INT Mask Register
*/
#define NEC_EAGLE_PCIINTMSKREG KSEG1ADDR(0x0DFFFFE0)
#define NEC_EAGLE_PCIINTMSK_MSKLANINT 0x10
#define NEC_EAGLE_PCIINTMSK_MSKCP_INTD 0x08
#define NEC_EAGLE_PCIINTMSK_MSKCP_INTC 0x04
#define NEC_EAGLE_PCIINTMSK_MSKCP_INTB 0x02
#define NEC_EAGLE_PCIINTMSK_MSKCP_INTA 0x01
/*
* CLK Division Register
*/
#define NEC_EAGLE_CLKDIV KSEG1ADDR(0x0DFFFFE4)
#define NEC_EAGLE_CLKDIV_PCIDIV1 0x10
#define NEC_EAGLE_CLKDIV_PCIDIV0 0x08
#define NEC_EAGLE_CLKDIV_VTDIV2 0x04
#define NEC_EAGLE_CLKDIV_VTDIV1 0x02
#define NEC_EAGLE_CLKDIV_VTDIV0 0x01
/*
* Source Revision Register
*/
#define NEC_EAGLE_REVISION KSEG1ADDR(0x0DFFFFE8)
#endif /* __NEC_EAGLE_H */
include/asm-mips/vr41xx/mpc30x.h 0 → 100644
View file @ 4ee45a31
/*
* FILE NAME
* include/asm-mips/vr41xx/mpc30x.h
*
* BRIEF MODULE DESCRIPTION
* Include file for Victor MP-C303/304.
*
* Copyright 2002,2003 Yoichi Yuasa
* yuasa@hh.iij4u.or.jp
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#ifndef __VICTOR_MPC30X_H
#define __VICTOR_MPC30X_H
#include <linux/config.h>
#include <asm/addrspace.h>
#include <asm/vr41xx/vr41xx.h>
/*
* Board specific address mapping
*/
#define VR41XX_PCI_MEM1_BASE 0x10000000
#define VR41XX_PCI_MEM1_SIZE 0x04000000
#define VR41XX_PCI_MEM1_MASK 0x7c000000
#define VR41XX_PCI_MEM2_BASE 0x14000000
#define VR41XX_PCI_MEM2_SIZE 0x02000000
#define VR41XX_PCI_MEM2_MASK 0x7e000000
#define VR41XX_PCI_IO_BASE 0x16000000
#define VR41XX_PCI_IO_SIZE 0x02000000
#define VR41XX_PCI_IO_MASK 0x7e000000
#define VR41XX_PCI_IO_START 0x01000000
#define VR41XX_PCI_IO_END 0x01ffffff
#define VR41XX_PCI_MEM_START 0x12000000
#define VR41XX_PCI_MEM_END 0x15ffffff
#define IO_PORT_BASE KSEG1ADDR(VR41XX_PCI_IO_BASE)
#define IO_PORT_RESOURCE_START 0
#define IO_PORT_RESOURCE_END VR41XX_PCI_IO_SIZE
#define IO_MEM1_RESOURCE_START VR41XX_PCI_MEM1_BASE
#define IO_MEM1_RESOURCE_END (VR41XX_PCI_MEM1_BASE + VR41XX_PCI_MEM1_SIZE)
#define IO_MEM2_RESOURCE_START VR41XX_PCI_MEM2_BASE
#define IO_MEM2_RESOURCE_END (VR41XX_PCI_MEM2_BASE + VR41XX_PCI_MEM2_SIZE)
/*
* General-Purpose I/O Pin Number
*/
#define VRC4173_PIN 1
#define MQ200_PIN 4
/*
* Interrupt Number
*/
#define VRC4173_CASCADE_IRQ GIU_IRQ(VRC4173_PIN)
#define MQ200_IRQ GIU_IRQ(MQ200_PIN)
#endif /* __VICTOR_MPC30X_H */
include/asm-mips/vr41xx/tb0226.h 0 → 100644
View file @ 4ee45a31
/*
* FILE NAME
* include/asm-mips/vr41xx/tb0226.h
*
* BRIEF MODULE DESCRIPTION
* Include file for TANBAC TB0226.
*
* Copyright 2002,2003 Yoichi Yuasa
* yuasa@hh.iij4u.or.jp
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#ifndef __TANBAC_TB0226_H
#define __TANBAC_TB0226_H
#include <asm/addrspace.h>
#include <asm/vr41xx/vr41xx.h>
/*
* Board specific address mapping
*/
#define VR41XX_PCI_MEM1_BASE 0x10000000
#define VR41XX_PCI_MEM1_SIZE 0x04000000
#define VR41XX_PCI_MEM1_MASK 0x7c000000
#define VR41XX_PCI_MEM2_BASE 0x14000000
#define VR41XX_PCI_MEM2_SIZE 0x02000000
#define VR41XX_PCI_MEM2_MASK 0x7e000000
#define VR41XX_PCI_IO_BASE 0x16000000
#define VR41XX_PCI_IO_SIZE 0x02000000
#define VR41XX_PCI_IO_MASK 0x7e000000
#define VR41XX_PCI_IO_START 0x01000000
#define VR41XX_PCI_IO_END 0x01ffffff
#define VR41XX_PCI_MEM_START 0x12000000
#define VR41XX_PCI_MEM_END 0x15ffffff
#define IO_PORT_BASE KSEG1ADDR(VR41XX_PCI_IO_BASE)
#define IO_PORT_RESOURCE_START 0
#define IO_PORT_RESOURCE_END VR41XX_PCI_IO_SIZE
#define IO_MEM1_RESOURCE_START VR41XX_PCI_MEM1_BASE
#define IO_MEM1_RESOURCE_END (VR41XX_PCI_MEM1_BASE + VR41XX_PCI_MEM1_SIZE)
#define IO_MEM2_RESOURCE_START VR41XX_PCI_MEM2_BASE
#define IO_MEM2_RESOURCE_END (VR41XX_PCI_MEM2_BASE + VR41XX_PCI_MEM2_SIZE)
/*
* General-Purpose I/O Pin Number
*/
#define GD82559_1_PIN 2
#define GD82559_2_PIN 3
#define UPD720100_INTA_PIN 4
#define UPD720100_INTB_PIN 8
#define UPD720100_INTC_PIN 13
/*
* Interrupt Number
*/
#define GD82559_1_IRQ GIU_IRQ(GD82559_1_PIN)
#define GD82559_2_IRQ GIU_IRQ(GD82559_2_PIN)
#define UPD720100_INTA_IRQ GIU_IRQ(UPD720100_INTA_PIN)
#define UPD720100_INTB_IRQ GIU_IRQ(UPD720100_INTB_PIN)
#define UPD720100_INTC_IRQ GIU_IRQ(UPD720100_INTC_PIN)
#endif /* __TANBAC_TB0226_H */
include/asm-mips/vr41xx/tb0229.h 0 → 100644
View file @ 4ee45a31
/*
* FILE NAME
* include/asm-mips/vr41xx/tb0229.h
*
* BRIEF MODULE DESCRIPTION
* Include file for TANBAC TB0229 and TB0219.
*
* Copyright 2002,2003 Yoichi Yuasa
* yuasa@hh.iij4u.or.jp
*
* Modified for TANBAC TB0229:
* Copyright 2003 Megasolution Inc.
* matsu@megasolution.jp
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#ifndef __TANBAC_TB0229_H
#define __TANBAC_TB0229_H
#include <asm/addrspace.h>
#include <asm/vr41xx/vr41xx.h>
/*
* Board specific address mapping
*/
#define VR41XX_PCI_MEM1_BASE 0x10000000
#define VR41XX_PCI_MEM1_SIZE 0x04000000
#define VR41XX_PCI_MEM1_MASK 0x7c000000
#define VR41XX_PCI_MEM2_BASE 0x14000000
#define VR41XX_PCI_MEM2_SIZE 0x02000000
#define VR41XX_PCI_MEM2_MASK 0x7e000000
#define VR41XX_PCI_IO_BASE 0x16000000
#define VR41XX_PCI_IO_SIZE 0x02000000
#define VR41XX_PCI_IO_MASK 0x7e000000
#define VR41XX_PCI_IO_START 0x01000000
#define VR41XX_PCI_IO_END 0x01ffffff
#define VR41XX_PCI_MEM_START 0x12000000
#define VR41XX_PCI_MEM_END 0x15ffffff
#define IO_PORT_BASE KSEG1ADDR(VR41XX_PCI_IO_BASE)
#define IO_PORT_RESOURCE_START 0
#define IO_PORT_RESOURCE_END VR41XX_PCI_IO_SIZE
#define IO_MEM1_RESOURCE_START VR41XX_PCI_MEM1_BASE
#define IO_MEM1_RESOURCE_END (VR41XX_PCI_MEM1_BASE + VR41XX_PCI_MEM1_SIZE)
#define IO_MEM2_RESOURCE_START VR41XX_PCI_MEM2_BASE
#define IO_MEM2_RESOURCE_END (VR41XX_PCI_MEM2_BASE + VR41XX_PCI_MEM2_SIZE)
/*
* General-Purpose I/O Pin Number
*/
#define TB0219_PCI_SLOT1_PIN 2
#define TB0219_PCI_SLOT2_PIN 3
#define TB0219_PCI_SLOT3_PIN 4
/*
* Interrupt Number
*/
#define TB0219_PCI_SLOT1_IRQ GIU_IRQ(TB0219_PCI_SLOT1_PIN)
#define TB0219_PCI_SLOT2_IRQ GIU_IRQ(TB0219_PCI_SLOT2_PIN)
#define TB0219_PCI_SLOT3_IRQ GIU_IRQ(TB0219_PCI_SLOT3_PIN)
#define TB0219_RESET_REGS KSEG1ADDR(0x0a00000e)
extern void tanbac_tb0229_restart(char *command);
#endif /* __TANBAC_TB0229_H */
include/asm-mips/vr41xx/vr41xx.h 0 → 100644
View file @ 4ee45a31
/*
* include/asm-mips/vr41xx/vr41xx.h
*
* Include file for NEC VR4100 series.
*
* Copyright (C) 1999 Michael Klar
* Copyright (C) 2001, 2002 Paul Mundt
* Copyright (C) 2002 MontaVista Software, Inc.
* Copyright (C) 2002 TimeSys Corp.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#ifndef __NEC_VR41XX_H
#define __NEC_VR41XX_H
#include <linux/interrupt.h>
/*
* CPU Revision
*/
/* VR4122 0x00000c70-0x00000c72 */
#define PRID_VR4122_REV1_0 0x00000c70
#define PRID_VR4122_REV2_0 0x00000c70
#define PRID_VR4122_REV2_1 0x00000c70
#define PRID_VR4122_REV3_0 0x00000c71
#define PRID_VR4122_REV3_1 0x00000c72
/* VR4181A 0x00000c73-0x00000c7f */
#define PRID_VR4181A_REV1_0 0x00000c73
#define PRID_VR4181A_REV1_1 0x00000c74
/* VR4131 0x00000c80-0x00000c8f */
#define PRID_VR4131_REV1_2 0x00000c80
#define PRID_VR4131_REV2_0 0x00000c81
#define PRID_VR4131_REV2_1 0x00000c82
#define PRID_VR4131_REV2_2 0x00000c83
/*
* Bus Control Uint
*/
extern void vr41xx_bcu_init(void);
/*
* Clock Mask Unit
*/
extern void vr41xx_cmu_init(u16 mask);
extern void vr41xx_clock_supply(u16 mask);
extern void vr41xx_clock_mask(u16 mask);
/*
* Interrupt Control Unit
*/
/* CPU core Interrupt Numbers */
#define MIPS_CPU_IRQ_BASE 0
#define MIPS_CPU_IRQ(x) (MIPS_CPU_IRQ_BASE + (x))
#define MIPS_SOFTINT0_IRQ MIPS_CPU_IRQ(0)
#define MIPS_SOFTINT1_IRQ MIPS_CPU_IRQ(1)
#define ICU_CASCADE_IRQ MIPS_CPU_IRQ(2)
#define RTC_LONG1_IRQ MIPS_CPU_IRQ(3)
#define RTC_LONG2_IRQ MIPS_CPU_IRQ(4)
/* RFU */
#define BATTERY_IRQ MIPS_CPU_IRQ(6)
#define MIPS_COUNTER_IRQ MIPS_CPU_IRQ(7)
/* SYINT1 Interrupt Numbers */
#define SYSINT1_IRQ_BASE 8
#define SYSINT1_IRQ(x) (SYSINT1_IRQ_BASE + (x))
/* RFU */
#define POWER_IRQ SYSINT1_IRQ(1)
/* RFU */
#define GIUINT_CASCADE_IRQ SYSINT1_IRQ(8)
#define SIU_IRQ SYSINT1_IRQ(9)
/* RFU */
#define SOFTINT_IRQ SYSINT1_IRQ(11)
#define CLKRUN_IRQ SYSINT1_IRQ(12)
#define SYSINT1_IRQ_LAST CLKRUN_IRQ
/* SYSINT2 Interrupt Numbers */
#define SYSINT2_IRQ_BASE 24
#define SYSINT2_IRQ(x) (SYSINT2_IRQ_BASE + (x))
/* RFU */
#define LED_IRQ SYSINT2_IRQ(1)
/* RFU */
#define VTCLOCK_IRQ SYSINT2_IRQ(3)
#define FIR_IRQ SYSINT2_IRQ(4)
#define DSIU_IRQ SYSINT2_IRQ(5)
#define PCI_IRQ SYSINT2_IRQ(6)
#define SCU_IRQ SYSINT2_IRQ(7)
#define CSI_IRQ SYSINT2_IRQ(8)
#define BCU_IRQ SYSINT2_IRQ(9)
#define SYSINT2_IRQ_LAST BCU_IRQ
/* GIU Interrupt Numbers */
#define GIU_IRQ_BASE 40
#define GIU_IRQ(x) (GIU_IRQ_BASE + (x)) /* IRQ 40-71 */
#define GIU_IRQ_LAST GIU_IRQ(31)
extern void (*board_irq_init)(void);
extern int vr41xx_cascade_irq(unsigned int irq, int (*get_irq_number)(int irq));
/*
* Gegeral-Purpose I/O Unit
*/
extern void vr41xx_enable_giuint(int pin);
extern void vr41xx_disable_giuint(int pin);
extern void vr41xx_clear_giuint(int pin);
enum {
TRIGGER_LEVEL,
TRIGGER_EDGE
};
enum {
SIGNAL_THROUGH,
SIGNAL_HOLD
};
extern void vr41xx_set_irq_trigger(int pin, int trigger, int hold);
enum {
LEVEL_LOW,
LEVEL_HIGH
};
extern void vr41xx_set_irq_level(int pin, int level);
enum {
PIO_INPUT,
PIO_OUTPUT
};
enum {
DATA_LOW,
DATA_HIGH
};
/*
* Serial Interface Unit
*/
extern void vr41xx_siu_init(int interface, int module);
extern void vr41xx_siu_ifselect(int interface, int module);
extern int vr41xx_serial_ports;
/* SIU interfaces */
enum {
SIU_RS232C,
SIU_IRDA
};
/* IrDA interfaces */
enum {
IRDA_SHARP = 1,
IRDA_TEMIC,
IRDA_HP
};
/*
* Debug Serial Interface Unit
*/
extern void vr41xx_dsiu_init(void);
/*
* PCI Control Unit
*/
struct vr41xx_pci_address_space {
u32 internal_base;
u32 address_mask;
u32 pci_base;
};
struct vr41xx_pci_address_map {
struct vr41xx_pci_address_space *mem1;
struct vr41xx_pci_address_space *mem2;
struct vr41xx_pci_address_space *io;
};
extern void vr41xx_pciu_init(struct vr41xx_pci_address_map *map);
/*
* MISC
*/
extern void vr41xx_time_init(void);
extern void vr41xx_timer_setup(struct irqaction *irq);
extern void vr41xx_restart(char *command);
extern void vr41xx_halt(void);
extern void vr41xx_power_off(void);
#endif /* __NEC_VR41XX_H */
include/asm-mips/vr41xx/vrc4173.h 0 → 100644
View file @ 4ee45a31
/*
* FILE NAME
* include/asm-mips/vr41xx/vrc4173.h
*
* BRIEF MODULE DESCRIPTION
* Include file for NEC VRC4173.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2000 by Michael R. McDonald
*
* Copyright 2001-2003 Montavista Software Inc.
* Author: Yoichi Yuasa
* yyuasa@mvista.com or source@mvista.com
*/
#ifndef __NEC_VRC4173_H
#define __NEC_VRC4173_H
#include <asm/io.h>
/*
* Interrupt Number
*/
#define VRC4173_IRQ_BASE 72
#define VRC4173_IRQ(x) (VRC4173_IRQ_BASE + (x))
#define VRC4173_USB_IRQ VRC4173_IRQ(0)
#define VRC4173_PCMCIA2_IRQ VRC4173_IRQ(1)
#define VRC4173_PCMCIA1_IRQ VRC4173_IRQ(2)
#define VRC4173_PS2CH2_IRQ VRC4173_IRQ(3)
#define VRC4173_PS2CH1_IRQ VRC4173_IRQ(4)
#define VRC4173_PIU_IRQ VRC4173_IRQ(5)
#define VRC4173_AIU_IRQ VRC4173_IRQ(6)
#define VRC4173_KIU_IRQ VRC4173_IRQ(7)
#define VRC4173_GIU_IRQ VRC4173_IRQ(8)
#define VRC4173_AC97_IRQ VRC4173_IRQ(9)
#define VRC4173_AC97INT1_IRQ VRC4173_IRQ(10)
/* RFU */
#define VRC4173_DOZEPIU_IRQ VRC4173_IRQ(13)
#define VRC4173_IRQ_LAST VRC4173_DOZEPIU_IRQ
/*
* PCI I/O accesses
*/
extern unsigned long vrc4173_io_offset;
#define set_vrc4173_io_offset(offset) do { vrc4173_io_offset = (offset); } while (0)
#define vrc4173_outb(val,port) outb((val), vrc4173_io_offset+(port))
#define vrc4173_outw(val,port) outw((val), vrc4173_io_offset+(port))
#define vrc4173_outl(val,port) outl((val), vrc4173_io_offset+(port))
#define vrc4173_outb_p(val,port) outb_p((val), vrc4173_io_offset+(port))
#define vrc4173_outw_p(val,port) outw_p((val), vrc4173_io_offset+(port))
#define vrc4173_outl_p(val,port) outl_p((val), vrc4173_io_offset+(port))
#define vrc4173_inb(port) inb(vrc4173_io_offset+(port))
#define vrc4173_inw(port) inw(vrc4173_io_offset+(port))
#define vrc4173_inl(port) inl(vrc4173_io_offset+(port))
#define vrc4173_inb_p(port) inb_p(vrc4173_io_offset+(port))
#define vrc4173_inw_p(port) inw_p(vrc4173_io_offset+(port))
#define vrc4173_inl_p(port) inl_p(vrc4173_io_offset+(port))
#define vrc4173_outsb(port,addr,count) outsb(vrc4173_io_offset+(port),(addr),(count))
#define vrc4173_outsw(port,addr,count) outsw(vrc4173_io_offset+(port),(addr),(count))
#define vrc4173_outsl(port,addr,count) outsl(vrc4173_io_offset+(port),(addr),(count))
#define vrc4173_insb(port,addr,count) insb(vrc4173_io_offset+(port),(addr),(count))
#define vrc4173_insw(port,addr,count) insw(vrc4173_io_offset+(port),(addr),(count))
#define vrc4173_insl(port,addr,count) insl(vrc4173_io_offset+(port),(addr),(count))
/*
* Clock Mask Unit
*/
extern void vrc4173_clock_supply(u16 mask);
extern void vrc4173_clock_mask(u16 mask);
/*
* General-Purpose I/O Unit
*/
enum {
PS2CH1_SELECT,
PS2CH2_SELECT,
TOUCHPANEL_SELECT,
KIU8_SELECT,
KIU10_SELECT,
KIU12_SELECT,
GPIO_SELECT
};
extern void vrc4173_select_function(int func);
#endif /* __NEC_VRC4173_H */
include/asm-mips/vr41xx/workpad.h 0 → 100644
View file @ 4ee45a31
/*
* FILE NAME
* include/asm-mips/vr41xx/workpad.h
*
* BRIEF MODULE DESCRIPTION
* Include file for IBM WorkPad z50.
*
* Copyright 2002 Yoichi Yuasa
* yuasa@hh.iij4u.or.jp
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#ifndef __IBM_WORKPAD_H
#define __IBM_WORKPAD_H
#include <asm/addrspace.h>
#include <asm/vr41xx/vr41xx.h>
/*
* Board specific address mapping
*/
#define VR41XX_ISA_MEM_BASE 0x100000000
#define VR41XX_ISA_MEM_SIZE 0x04000000
/* VR41XX_ISA_IO_BASE includes offset from real base. */
#define VR41XX_ISA_IO_BASE 0x15000000
#define VR41XX_ISA_IO_SIZE 0x03000000
#define IO_PORT_BASE KSEG1ADDR(VR41XX_ISA_IO_BASE)
#define IO_PORT_RESOURCE_START 0
#define IO_PORT_RESOURCE_END VR41XX_ISA_IO_SIZE
#define IO_MEM_RESOURCE_START VR41XX_ISA_MEM_BASE
#define IO_MEM_RESOURCE_END (VR41XX_ISA_MEM_BASE + VR41XX_ISA_MEM_SIZE)
#endif /* __IBM_WORKPAD_H */
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