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Commit 51f94a7b authored by Bartlomiej Zolnierkiewicz's avatar Bartlomiej Zolnierkiewicz Committed by Greg Kroah-Hartman
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Staging: rt2860: remove dead RT_BIG_ENDIAN code 

Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent b34b33ca
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Showing with 50 additions and 2062 deletions
drivers/staging/rt2860/2860_main_dev.c
View file @ 51f94a7b
...@@ -1167,9 +1167,7 @@ VOID RT28xx_UpdateBeaconToAsic( ...@@ -1167,9 +1167,7 @@ VOID RT28xx_UpdateBeaconToAsic(
else else
{ {
ptr = (PUCHAR)&pAd->BeaconTxWI; ptr = (PUCHAR)&pAd->BeaconTxWI;
#ifdef RT_BIG_ENDIAN
RTMPWIEndianChange(ptr, TYPE_TXWI);
#endif
for (i=0; i<TXWI_SIZE; i+=4) // 16-byte TXWI field for (i=0; i<TXWI_SIZE; i+=4) // 16-byte TXWI field
{ {
UINT32 longptr = *ptr + (*(ptr+1)<<8) + (*(ptr+2)<<16) + (*(ptr+3)<<24); UINT32 longptr = *ptr + (*(ptr+1)<<8) + (*(ptr+2)<<16) + (*(ptr+3)<<24);
......
drivers/staging/rt2860/common/2860_rtmp_init.c
View file @ 51f94a7b
...@@ -173,9 +173,6 @@ NDIS_STATUS RTMPAllocTxRxRingMemory( ...@@ -173,9 +173,6 @@ NDIS_STATUS RTMPAllocTxRxRingMemory(
pTxD->SDPtr0 = BufBasePaLow; pTxD->SDPtr0 = BufBasePaLow;
// advance to next ring descriptor address // advance to next ring descriptor address
pTxD->DMADONE = 1; pTxD->DMADONE = 1;
#ifdef RT_BIG_ENDIAN
RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
#endif
RingBasePaLow += TXD_SIZE; RingBasePaLow += TXD_SIZE;
RingBaseVa = (PUCHAR) RingBaseVa + TXD_SIZE; RingBaseVa = (PUCHAR) RingBaseVa + TXD_SIZE;
...@@ -236,9 +233,6 @@ NDIS_STATUS RTMPAllocTxRxRingMemory( ...@@ -236,9 +233,6 @@ NDIS_STATUS RTMPAllocTxRxRingMemory(
pTxD = (PTXD_STRUC) pAd->MgmtRing.Cell[index].AllocVa; pTxD = (PTXD_STRUC) pAd->MgmtRing.Cell[index].AllocVa;
pTxD->DMADONE = 1; pTxD->DMADONE = 1;
#ifdef RT_BIG_ENDIAN
RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
#endif
// no pre-allocated buffer required in MgmtRing for scatter-gather case // no pre-allocated buffer required in MgmtRing for scatter-gather case
} }
DBGPRINT(RT_DEBUG_TRACE, ("MGMT Ring: total %d entry allocated\n", index)); DBGPRINT(RT_DEBUG_TRACE, ("MGMT Ring: total %d entry allocated\n", index));
...@@ -318,10 +312,6 @@ NDIS_STATUS RTMPAllocTxRxRingMemory( ...@@ -318,10 +312,6 @@ NDIS_STATUS RTMPAllocTxRxRingMemory(
pRxD = (PRXD_STRUC) pAd->RxRing.Cell[index].AllocVa; pRxD = (PRXD_STRUC) pAd->RxRing.Cell[index].AllocVa;
pRxD->SDP0 = RTMP_GetPhysicalAddressLow(pDmaBuf->AllocPa); pRxD->SDP0 = RTMP_GetPhysicalAddressLow(pDmaBuf->AllocPa);
pRxD->DDONE = 0; pRxD->DDONE = 0;
#ifdef RT_BIG_ENDIAN
RTMPDescriptorEndianChange((PUCHAR)pRxD, TYPE_RXD);
#endif
} }
DBGPRINT(RT_DEBUG_TRACE, ("Rx Ring: total %d entry allocated\n", index)); DBGPRINT(RT_DEBUG_TRACE, ("Rx Ring: total %d entry allocated\n", index));
...@@ -821,10 +811,6 @@ PNDIS_PACKET GetPacketFromRxRing( ...@@ -821,10 +811,6 @@ PNDIS_PACKET GetPacketFromRxRing(
IN OUT UINT32 *pRxPending) IN OUT UINT32 *pRxPending)
{ {
PRXD_STRUC pRxD; PRXD_STRUC pRxD;
#ifdef RT_BIG_ENDIAN
PRXD_STRUC pDestRxD;
RXD_STRUC RxD;
#endif
PNDIS_PACKET pRxPacket = NULL; PNDIS_PACKET pRxPacket = NULL;
PNDIS_PACKET pNewPacket; PNDIS_PACKET pNewPacket;
PVOID AllocVa; PVOID AllocVa;
...@@ -853,15 +839,8 @@ PNDIS_PACKET GetPacketFromRxRing( ...@@ -853,15 +839,8 @@ PNDIS_PACKET GetPacketFromRxRing(
} }
#ifdef RT_BIG_ENDIAN
pDestRxD = (PRXD_STRUC) pAd->RxRing.Cell[pAd->RxRing.RxSwReadIdx].AllocVa;
RxD = *pDestRxD;
pRxD = &RxD;
RTMPDescriptorEndianChange((PUCHAR)pRxD, TYPE_RXD);
#else
// Point to Rx indexed rx ring descriptor // Point to Rx indexed rx ring descriptor
pRxD = (PRXD_STRUC) pAd->RxRing.Cell[pAd->RxRing.RxSwReadIdx].AllocVa; pRxD = (PRXD_STRUC) pAd->RxRing.Cell[pAd->RxRing.RxSwReadIdx].AllocVa;
#endif
if (pRxD->DDONE == 0) if (pRxD->DDONE == 0)
{ {
...@@ -904,10 +883,6 @@ PNDIS_PACKET GetPacketFromRxRing( ...@@ -904,10 +883,6 @@ PNDIS_PACKET GetPacketFromRxRing(
*pRxPending = *pRxPending - 1; *pRxPending = *pRxPending - 1;
// update rx descriptor and kick rx // update rx descriptor and kick rx
#ifdef RT_BIG_ENDIAN
RTMPDescriptorEndianChange((PUCHAR)pRxD, TYPE_RXD);
WriteBackToDescriptor((PUCHAR)pDestRxD, (PUCHAR)pRxD, FALSE, TYPE_RXD);
#endif
INC_RING_INDEX(pAd->RxRing.RxSwReadIdx, RX_RING_SIZE); INC_RING_INDEX(pAd->RxRing.RxSwReadIdx, RX_RING_SIZE);
pAd->RxRing.RxCpuIdx = (pAd->RxRing.RxSwReadIdx == 0) ? (RX_RING_SIZE-1) : (pAd->RxRing.RxSwReadIdx-1); pAd->RxRing.RxCpuIdx = (pAd->RxRing.RxSwReadIdx == 0) ? (RX_RING_SIZE-1) : (pAd->RxRing.RxSwReadIdx-1);
......
drivers/staging/rt2860/common/action.h
View file @ 51f94a7b
...@@ -41,17 +41,10 @@ ...@@ -41,17 +41,10 @@
typedef struct PACKED __HT_INFO_OCTET typedef struct PACKED __HT_INFO_OCTET
{ {
#ifdef RT_BIG_ENDIAN
UCHAR Reserved:5;
UCHAR STA_Channel_Width:1;
UCHAR Forty_MHz_Intolerant:1;
UCHAR Request:1;
#else
UCHAR Request:1; UCHAR Request:1;
UCHAR Forty_MHz_Intolerant:1; UCHAR Forty_MHz_Intolerant:1;
UCHAR STA_Channel_Width:1; UCHAR STA_Channel_Width:1;
UCHAR Reserved:5; UCHAR Reserved:5;
#endif
} HT_INFORMATION_OCTET; } HT_INFORMATION_OCTET;
......
drivers/staging/rt2860/common/cmm_data.c
View file @ 51f94a7b
...@@ -300,10 +300,6 @@ NDIS_STATUS MlmeHardTransmitTxRing( ...@@ -300,10 +300,6 @@ NDIS_STATUS MlmeHardTransmitTxRing(
PUCHAR pSrcBufVA; PUCHAR pSrcBufVA;
UINT SrcBufLen; UINT SrcBufLen;
PTXD_STRUC pTxD; PTXD_STRUC pTxD;
#ifdef RT_BIG_ENDIAN
PTXD_STRUC pDestTxD;
TXD_STRUC TxD;
#endif
PHEADER_802_11 pHeader_802_11; PHEADER_802_11 pHeader_802_11;
BOOLEAN bAckRequired, bInsertTimestamp; BOOLEAN bAckRequired, bInsertTimestamp;
ULONG SrcBufPA; ULONG SrcBufPA;
...@@ -335,14 +331,7 @@ NDIS_STATUS MlmeHardTransmitTxRing( ...@@ -335,14 +331,7 @@ NDIS_STATUS MlmeHardTransmitTxRing(
SwIdx = pAd->TxRing[QueIdx].TxCpuIdx; SwIdx = pAd->TxRing[QueIdx].TxCpuIdx;
#ifndef RT_BIG_ENDIAN
pTxD = (PTXD_STRUC) pAd->TxRing[QueIdx].Cell[SwIdx].AllocVa; pTxD = (PTXD_STRUC) pAd->TxRing[QueIdx].Cell[SwIdx].AllocVa;
#else
pDestTxD = (PTXD_STRUC)pAd->TxRing[QueIdx].Cell[SwIdx].AllocVa;
TxD = *pDestTxD;
pTxD = &TxD;
RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
#endif
if (pAd->TxRing[QueIdx].Cell[SwIdx].pNdisPacket) if (pAd->TxRing[QueIdx].Cell[SwIdx].pNdisPacket)
{ {
...@@ -438,9 +427,6 @@ NDIS_STATUS MlmeHardTransmitTxRing( ...@@ -438,9 +427,6 @@ NDIS_STATUS MlmeHardTransmitTxRing(
return (NDIS_STATUS_FAILURE); return (NDIS_STATUS_FAILURE);
} }
#ifdef RT_BIG_ENDIAN
RTMPFrameEndianChange(pAd, (PUCHAR)pHeader_802_11, DIR_WRITE, FALSE);
#endif
// //
// fill scatter-and-gather buffer list into TXD. Internally created NDIS PACKET // fill scatter-and-gather buffer list into TXD. Internally created NDIS PACKET
// should always has only one ohysical buffer, and the whole frame size equals // should always has only one ohysical buffer, and the whole frame size equals
...@@ -470,9 +456,7 @@ NDIS_STATUS MlmeHardTransmitTxRing( ...@@ -470,9 +456,7 @@ NDIS_STATUS MlmeHardTransmitTxRing(
pAd->TxRing[QueIdx].Cell[SwIdx].pNdisPacket = pPacket; pAd->TxRing[QueIdx].Cell[SwIdx].pNdisPacket = pPacket;
pAd->TxRing[QueIdx].Cell[SwIdx].pNextNdisPacket = NULL; pAd->TxRing[QueIdx].Cell[SwIdx].pNextNdisPacket = NULL;
#ifdef RT_BIG_ENDIAN
RTMPWIEndianChange((PUCHAR)pFirstTxWI, TYPE_TXWI);
#endif
SrcBufPA = PCI_MAP_SINGLE(pAd, pSrcBufVA, SrcBufLen, 0, PCI_DMA_TODEVICE); SrcBufPA = PCI_MAP_SINGLE(pAd, pSrcBufVA, SrcBufLen, 0, PCI_DMA_TODEVICE);
...@@ -484,11 +468,6 @@ NDIS_STATUS MlmeHardTransmitTxRing( ...@@ -484,11 +468,6 @@ NDIS_STATUS MlmeHardTransmitTxRing(
pTxD->SDPtr0 = SrcBufPA; pTxD->SDPtr0 = SrcBufPA;
pTxD->DMADONE = 0; pTxD->DMADONE = 0;
#ifdef RT_BIG_ENDIAN
RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
WriteBackToDescriptor((PUCHAR)pDestTxD, (PUCHAR)pTxD, FALSE, TYPE_TXD);
#endif
pAd->RalinkCounters.KickTxCount++; pAd->RalinkCounters.KickTxCount++;
pAd->RalinkCounters.OneSecTxDoneCount++; pAd->RalinkCounters.OneSecTxDoneCount++;
...@@ -639,10 +618,6 @@ NDIS_STATUS MlmeHardTransmitMgmtRing( ...@@ -639,10 +618,6 @@ NDIS_STATUS MlmeHardTransmitMgmtRing(
return (NDIS_STATUS_FAILURE); return (NDIS_STATUS_FAILURE);
} }
#ifdef RT_BIG_ENDIAN
RTMPFrameEndianChange(pAd, (PUCHAR)pHeader_802_11, DIR_WRITE, FALSE);
#endif
// //
// fill scatter-and-gather buffer list into TXD. Internally created NDIS PACKET // fill scatter-and-gather buffer list into TXD. Internally created NDIS PACKET
// should always has only one ohysical buffer, and the whole frame size equals // should always has only one ohysical buffer, and the whole frame size equals
...@@ -669,10 +644,6 @@ NDIS_STATUS MlmeHardTransmitMgmtRing( ...@@ -669,10 +644,6 @@ NDIS_STATUS MlmeHardTransmitMgmtRing(
IFS_BACKOFF, FALSE, &pMacEntry->MaxHTPhyMode); IFS_BACKOFF, FALSE, &pMacEntry->MaxHTPhyMode);
} }
#ifdef RT_BIG_ENDIAN
RTMPWIEndianChange((PUCHAR)pFirstTxWI, TYPE_TXWI);
#endif
// Now do hardware-depened kick out. // Now do hardware-depened kick out.
HAL_KickOutMgmtTx(pAd, QueIdx, pPacket, pSrcBufVA, SrcBufLen); HAL_KickOutMgmtTx(pAd, QueIdx, pPacket, pSrcBufVA, SrcBufLen);
...@@ -1723,9 +1694,6 @@ BOOLEAN RTMPFreeTXDUponTxDmaDone( ...@@ -1723,9 +1694,6 @@ BOOLEAN RTMPFreeTXDUponTxDmaDone(
{ {
PRTMP_TX_RING pTxRing; PRTMP_TX_RING pTxRing;
PTXD_STRUC pTxD; PTXD_STRUC pTxD;
#ifdef RT_BIG_ENDIAN
PTXD_STRUC pDestTxD;
#endif
PNDIS_PACKET pPacket; PNDIS_PACKET pPacket;
UCHAR FREE = 0; UCHAR FREE = 0;
TXD_STRUC TxD, *pOriTxD; TXD_STRUC TxD, *pOriTxD;
...@@ -1745,18 +1713,10 @@ BOOLEAN RTMPFreeTXDUponTxDmaDone( ...@@ -1745,18 +1713,10 @@ BOOLEAN RTMPFreeTXDUponTxDmaDone(
/* Note : If (pAd->ate.bQATxStart == TRUE), we will never reach here. */ /* Note : If (pAd->ate.bQATxStart == TRUE), we will never reach here. */
FREE++; FREE++;
#ifndef RT_BIG_ENDIAN
pTxD = (PTXD_STRUC) (pTxRing->Cell[pTxRing->TxSwFreeIdx].AllocVa); pTxD = (PTXD_STRUC) (pTxRing->Cell[pTxRing->TxSwFreeIdx].AllocVa);
pOriTxD = pTxD; pOriTxD = pTxD;
NdisMoveMemory(&TxD, pTxD, sizeof(TXD_STRUC)); NdisMoveMemory(&TxD, pTxD, sizeof(TXD_STRUC));
pTxD = &TxD; pTxD = &TxD;
#else
pDestTxD = (PTXD_STRUC) (pTxRing->Cell[pTxRing->TxSwFreeIdx].AllocVa);
pOriTxD = pDestTxD ;
TxD = *pDestTxD;
pTxD = &TxD;
RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
#endif
pTxD->DMADONE = 0; pTxD->DMADONE = 0;
...@@ -1799,12 +1759,8 @@ BOOLEAN RTMPFreeTXDUponTxDmaDone( ...@@ -1799,12 +1759,8 @@ BOOLEAN RTMPFreeTXDUponTxDmaDone(
INC_RING_INDEX(pTxRing->TxSwFreeIdx, TX_RING_SIZE); INC_RING_INDEX(pTxRing->TxSwFreeIdx, TX_RING_SIZE);
/* get tx_tdx_idx again */ /* get tx_tdx_idx again */
RTMP_IO_READ32(pAd, TX_DTX_IDX0 + QueIdx * RINGREG_DIFF , &pTxRing->TxDmaIdx); RTMP_IO_READ32(pAd, TX_DTX_IDX0 + QueIdx * RINGREG_DIFF , &pTxRing->TxDmaIdx);
#ifdef RT_BIG_ENDIAN
RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
*pDestTxD = TxD;
#else
NdisMoveMemory(pOriTxD, pTxD, sizeof(TXD_STRUC)); NdisMoveMemory(pOriTxD, pTxD, sizeof(TXD_STRUC));
#endif
} }
...@@ -1887,10 +1843,6 @@ VOID RTMPHandleMgmtRingDmaDoneInterrupt( ...@@ -1887,10 +1843,6 @@ VOID RTMPHandleMgmtRingDmaDoneInterrupt(
IN PRTMP_ADAPTER pAd) IN PRTMP_ADAPTER pAd)
{ {
PTXD_STRUC pTxD; PTXD_STRUC pTxD;
#ifdef RT_BIG_ENDIAN
PTXD_STRUC pDestTxD;
TXD_STRUC TxD;
#endif
PNDIS_PACKET pPacket; PNDIS_PACKET pPacket;
UCHAR FREE = 0; UCHAR FREE = 0;
PRTMP_MGMT_RING pMgmtRing = &pAd->MgmtRing; PRTMP_MGMT_RING pMgmtRing = &pAd->MgmtRing;
...@@ -1901,14 +1853,7 @@ VOID RTMPHandleMgmtRingDmaDoneInterrupt( ...@@ -1901,14 +1853,7 @@ VOID RTMPHandleMgmtRingDmaDoneInterrupt(
while (pMgmtRing->TxSwFreeIdx!= pMgmtRing->TxDmaIdx) while (pMgmtRing->TxSwFreeIdx!= pMgmtRing->TxDmaIdx)
{ {
FREE++; FREE++;
#ifdef RT_BIG_ENDIAN
pDestTxD = (PTXD_STRUC) (pMgmtRing->Cell[pAd->MgmtRing.TxSwFreeIdx].AllocVa);
TxD = *pDestTxD;
pTxD = &TxD;
RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
#else
pTxD = (PTXD_STRUC) (pMgmtRing->Cell[pAd->MgmtRing.TxSwFreeIdx].AllocVa); pTxD = (PTXD_STRUC) (pMgmtRing->Cell[pAd->MgmtRing.TxSwFreeIdx].AllocVa);
#endif
pTxD->DMADONE = 0; pTxD->DMADONE = 0;
pPacket = pMgmtRing->Cell[pMgmtRing->TxSwFreeIdx].pNdisPacket; pPacket = pMgmtRing->Cell[pMgmtRing->TxSwFreeIdx].pNdisPacket;
...@@ -1928,11 +1873,6 @@ VOID RTMPHandleMgmtRingDmaDoneInterrupt( ...@@ -1928,11 +1873,6 @@ VOID RTMPHandleMgmtRingDmaDoneInterrupt(
} }
pMgmtRing->Cell[pMgmtRing->TxSwFreeIdx].pNextNdisPacket = NULL; pMgmtRing->Cell[pMgmtRing->TxSwFreeIdx].pNextNdisPacket = NULL;
INC_RING_INDEX(pMgmtRing->TxSwFreeIdx, MGMT_RING_SIZE); INC_RING_INDEX(pMgmtRing->TxSwFreeIdx, MGMT_RING_SIZE);
#ifdef RT_BIG_ENDIAN
RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
WriteBackToDescriptor((PUCHAR)pDestTxD, (PUCHAR)pTxD, TRUE, TYPE_TXD);
#endif
} }
NdisReleaseSpinLock(&pAd->MgmtRingLock); NdisReleaseSpinLock(&pAd->MgmtRingLock);
......
drivers/staging/rt2860/common/cmm_data_2860.c
View file @ 51f94a7b
...@@ -110,10 +110,6 @@ USHORT RtmpPCI_WriteSingleTxResource( ...@@ -110,10 +110,6 @@ USHORT RtmpPCI_WriteSingleTxResource(
UCHAR *pDMAHeaderBufVA; UCHAR *pDMAHeaderBufVA;
USHORT TxIdx, RetTxIdx; USHORT TxIdx, RetTxIdx;
PTXD_STRUC pTxD; PTXD_STRUC pTxD;
#ifdef RT_BIG_ENDIAN
PTXD_STRUC pDestTxD;
TXD_STRUC TxD;
#endif
UINT32 BufBasePaLow; UINT32 BufBasePaLow;
PRTMP_TX_RING pTxRing; PRTMP_TX_RING pTxRing;
USHORT hwHeaderLen; USHORT hwHeaderLen;
...@@ -137,13 +133,8 @@ USHORT RtmpPCI_WriteSingleTxResource( ...@@ -137,13 +133,8 @@ USHORT RtmpPCI_WriteSingleTxResource(
// //
// build Tx Descriptor // build Tx Descriptor
// //
#ifndef RT_BIG_ENDIAN
pTxD = (PTXD_STRUC) pTxRing->Cell[TxIdx].AllocVa; pTxD = (PTXD_STRUC) pTxRing->Cell[TxIdx].AllocVa;
#else
pDestTxD = (PTXD_STRUC) pTxRing->Cell[TxIdx].AllocVa;
TxD = *pDestTxD;
pTxD = &TxD;
#endif
NdisZeroMemory(pTxD, TXD_SIZE); NdisZeroMemory(pTxD, TXD_SIZE);
pTxD->SDPtr0 = BufBasePaLow; pTxD->SDPtr0 = BufBasePaLow;
...@@ -154,12 +145,6 @@ USHORT RtmpPCI_WriteSingleTxResource( ...@@ -154,12 +145,6 @@ USHORT RtmpPCI_WriteSingleTxResource(
pTxD->LastSec1 = (bIsLast) ? 1 : 0; pTxD->LastSec1 = (bIsLast) ? 1 : 0;
RTMPWriteTxDescriptor(pAd, pTxD, FALSE, FIFO_EDCA); RTMPWriteTxDescriptor(pAd, pTxD, FALSE, FIFO_EDCA);
#ifdef RT_BIG_ENDIAN
RTMPWIEndianChange((PUCHAR)(pDMAHeaderBufVA + TXINFO_SIZE), TYPE_TXWI);
RTMPFrameEndianChange(pAd, (PUCHAR)(pDMAHeaderBufVA + TXINFO_SIZE + TXWI_SIZE), DIR_WRITE, FALSE);
RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
WriteBackToDescriptor((PUCHAR)pDestTxD, (PUCHAR)pTxD, FALSE, TYPE_TXD);
#endif // RT_BIG_ENDIAN //
RetTxIdx = TxIdx; RetTxIdx = TxIdx;
// //
...@@ -184,10 +169,6 @@ USHORT RtmpPCI_WriteMultiTxResource( ...@@ -184,10 +169,6 @@ USHORT RtmpPCI_WriteMultiTxResource(
UCHAR *pDMAHeaderBufVA; UCHAR *pDMAHeaderBufVA;
USHORT TxIdx, RetTxIdx; USHORT TxIdx, RetTxIdx;
PTXD_STRUC pTxD; PTXD_STRUC pTxD;
#ifdef RT_BIG_ENDIAN
PTXD_STRUC pDestTxD;
TXD_STRUC TxD;
#endif
UINT32 BufBasePaLow; UINT32 BufBasePaLow;
PRTMP_TX_RING pTxRing; PRTMP_TX_RING pTxRing;
USHORT hwHdrLen; USHORT hwHdrLen;
...@@ -231,13 +212,8 @@ USHORT RtmpPCI_WriteMultiTxResource( ...@@ -231,13 +212,8 @@ USHORT RtmpPCI_WriteMultiTxResource(
// //
// build Tx Descriptor // build Tx Descriptor
// //
#ifndef RT_BIG_ENDIAN
pTxD = (PTXD_STRUC) pTxRing->Cell[TxIdx].AllocVa; pTxD = (PTXD_STRUC) pTxRing->Cell[TxIdx].AllocVa;
#else
pDestTxD = (PTXD_STRUC) pTxRing->Cell[TxIdx].AllocVa;
TxD = *pDestTxD;
pTxD = &TxD;
#endif
NdisZeroMemory(pTxD, TXD_SIZE); NdisZeroMemory(pTxD, TXD_SIZE);
pTxD->SDPtr0 = BufBasePaLow; pTxD->SDPtr0 = BufBasePaLow;
...@@ -249,17 +225,6 @@ USHORT RtmpPCI_WriteMultiTxResource( ...@@ -249,17 +225,6 @@ USHORT RtmpPCI_WriteMultiTxResource(
RTMPWriteTxDescriptor(pAd, pTxD, FALSE, FIFO_EDCA); RTMPWriteTxDescriptor(pAd, pTxD, FALSE, FIFO_EDCA);
#ifdef RT_BIG_ENDIAN
if (frameNum == 0)
RTMPFrameEndianChange(pAd, (PUCHAR)(pDMAHeaderBufVA+ TXINFO_SIZE + TXWI_SIZE), DIR_WRITE, FALSE);
if (frameNum != 0)
RTMPWIEndianChange((PUCHAR)(pDMAHeaderBufVA + TXINFO_SIZE), TYPE_TXWI);
RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
WriteBackToDescriptor((PUCHAR)pDestTxD, (PUCHAR)pTxD, FALSE, TYPE_TXD);
#endif // RT_BIG_ENDIAN //
RetTxIdx = TxIdx; RetTxIdx = TxIdx;
// //
// Update Tx index // Update Tx index
...@@ -290,10 +255,6 @@ VOID RtmpPCI_FinalWriteTxResource( ...@@ -290,10 +255,6 @@ VOID RtmpPCI_FinalWriteTxResource(
pTxRing = &pAd->TxRing[pTxBlk->QueIdx]; pTxRing = &pAd->TxRing[pTxBlk->QueIdx];
pTxWI = (PTXWI_STRUC) pTxRing->Cell[FirstTxIdx].DmaBuf.AllocVa; pTxWI = (PTXWI_STRUC) pTxRing->Cell[FirstTxIdx].DmaBuf.AllocVa;
pTxWI->MPDUtotalByteCount = totalMPDUSize; pTxWI->MPDUtotalByteCount = totalMPDUSize;
#ifdef RT_BIG_ENDIAN
RTMPWIEndianChange((PUCHAR)pTxWI, TYPE_TXWI);
#endif // RT_BIG_ENDIAN //
} }
...@@ -303,10 +264,6 @@ VOID RtmpPCIDataLastTxIdx( ...@@ -303,10 +264,6 @@ VOID RtmpPCIDataLastTxIdx(
IN USHORT LastTxIdx) IN USHORT LastTxIdx)
{ {
PTXD_STRUC pTxD; PTXD_STRUC pTxD;
#ifdef RT_BIG_ENDIAN
PTXD_STRUC pDestTxD;
TXD_STRUC TxD;
#endif
PRTMP_TX_RING pTxRing; PRTMP_TX_RING pTxRing;
// //
...@@ -317,21 +274,9 @@ VOID RtmpPCIDataLastTxIdx( ...@@ -317,21 +274,9 @@ VOID RtmpPCIDataLastTxIdx(
// //
// build Tx Descriptor // build Tx Descriptor
// //
#ifndef RT_BIG_ENDIAN
pTxD = (PTXD_STRUC) pTxRing->Cell[LastTxIdx].AllocVa; pTxD = (PTXD_STRUC) pTxRing->Cell[LastTxIdx].AllocVa;
#else
pDestTxD = (PTXD_STRUC) pTxRing->Cell[LastTxIdx].AllocVa;
TxD = *pDestTxD;
pTxD = &TxD;
#endif
pTxD->LastSec1 = 1; pTxD->LastSec1 = 1;
#ifdef RT_BIG_ENDIAN
RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
WriteBackToDescriptor((PUCHAR)pDestTxD, (PUCHAR)pTxD, FALSE, TYPE_TXD);
#endif // RT_BIG_ENDIAN //
} }
...@@ -344,10 +289,6 @@ USHORT RtmpPCI_WriteFragTxResource( ...@@ -344,10 +289,6 @@ USHORT RtmpPCI_WriteFragTxResource(
UCHAR *pDMAHeaderBufVA; UCHAR *pDMAHeaderBufVA;
USHORT TxIdx, RetTxIdx; USHORT TxIdx, RetTxIdx;
PTXD_STRUC pTxD; PTXD_STRUC pTxD;
#ifdef RT_BIG_ENDIAN
PTXD_STRUC pDestTxD;
TXD_STRUC TxD;
#endif
UINT32 BufBasePaLow; UINT32 BufBasePaLow;
PRTMP_TX_RING pTxRing; PRTMP_TX_RING pTxRing;
USHORT hwHeaderLen; USHORT hwHeaderLen;
...@@ -373,13 +314,8 @@ USHORT RtmpPCI_WriteFragTxResource( ...@@ -373,13 +314,8 @@ USHORT RtmpPCI_WriteFragTxResource(
// //
// Build Tx Descriptor // Build Tx Descriptor
// //
#ifndef RT_BIG_ENDIAN
pTxD = (PTXD_STRUC) pTxRing->Cell[TxIdx].AllocVa; pTxD = (PTXD_STRUC) pTxRing->Cell[TxIdx].AllocVa;
#else
pDestTxD = (PTXD_STRUC) pTxRing->Cell[TxIdx].AllocVa;
TxD = *pDestTxD;
pTxD = &TxD;
#endif
NdisZeroMemory(pTxD, TXD_SIZE); NdisZeroMemory(pTxD, TXD_SIZE);
if (fragNum == pTxBlk->TotalFragNum) if (fragNum == pTxBlk->TotalFragNum)
...@@ -397,13 +333,6 @@ USHORT RtmpPCI_WriteFragTxResource( ...@@ -397,13 +333,6 @@ USHORT RtmpPCI_WriteFragTxResource(
RTMPWriteTxDescriptor(pAd, pTxD, FALSE, FIFO_EDCA); RTMPWriteTxDescriptor(pAd, pTxD, FALSE, FIFO_EDCA);
#ifdef RT_BIG_ENDIAN
RTMPWIEndianChange((PUCHAR)(pDMAHeaderBufVA + TXINFO_SIZE), TYPE_TXWI);
RTMPFrameEndianChange(pAd, (PUCHAR)(pDMAHeaderBufVA + TXINFO_SIZE + TXWI_SIZE), DIR_WRITE, FALSE);
RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
WriteBackToDescriptor((PUCHAR)pDestTxD, (PUCHAR)pTxD, FALSE, TYPE_TXD);
#endif // RT_BIG_ENDIAN //
RetTxIdx = TxIdx; RetTxIdx = TxIdx;
pTxBlk->Priv += pTxBlk->SrcBufLen; pTxBlk->Priv += pTxBlk->SrcBufLen;
...@@ -431,20 +360,9 @@ int RtmpPCIMgmtKickOut( ...@@ -431,20 +360,9 @@ int RtmpPCIMgmtKickOut(
IN UINT SrcBufLen) IN UINT SrcBufLen)
{ {
PTXD_STRUC pTxD; PTXD_STRUC pTxD;
#ifdef RT_BIG_ENDIAN
PTXD_STRUC pDestTxD;
TXD_STRUC TxD;
#endif
ULONG SwIdx = pAd->MgmtRing.TxCpuIdx; ULONG SwIdx = pAd->MgmtRing.TxCpuIdx;
#ifdef RT_BIG_ENDIAN
pDestTxD = (PTXD_STRUC)pAd->MgmtRing.Cell[SwIdx].AllocVa;
TxD = *pDestTxD;
pTxD = &TxD;
RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
#else
pTxD = (PTXD_STRUC) pAd->MgmtRing.Cell[SwIdx].AllocVa; pTxD = (PTXD_STRUC) pAd->MgmtRing.Cell[SwIdx].AllocVa;
#endif
pAd->MgmtRing.Cell[SwIdx].pNdisPacket = pPacket; pAd->MgmtRing.Cell[SwIdx].pNdisPacket = pPacket;
pAd->MgmtRing.Cell[SwIdx].pNextNdisPacket = NULL; pAd->MgmtRing.Cell[SwIdx].pNextNdisPacket = NULL;
...@@ -457,11 +375,6 @@ int RtmpPCIMgmtKickOut( ...@@ -457,11 +375,6 @@ int RtmpPCIMgmtKickOut(
pTxD->SDPtr0 = PCI_MAP_SINGLE(pAd, pSrcBufVA, SrcBufLen, 0, PCI_DMA_TODEVICE);; pTxD->SDPtr0 = PCI_MAP_SINGLE(pAd, pSrcBufVA, SrcBufLen, 0, PCI_DMA_TODEVICE);;
pTxD->SDLen0 = SrcBufLen; pTxD->SDLen0 = SrcBufLen;
#ifdef RT_BIG_ENDIAN
RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
WriteBackToDescriptor((PUCHAR)pDestTxD, (PUCHAR)pTxD, FALSE, TYPE_TXD);
#endif
pAd->RalinkCounters.KickTxCount++; pAd->RalinkCounters.KickTxCount++;
pAd->RalinkCounters.OneSecTxDoneCount++; pAd->RalinkCounters.OneSecTxDoneCount++;
......
drivers/staging/rt2860/common/cmm_sync.c
View file @ 51f94a7b
...@@ -582,52 +582,27 @@ VOID ScanNextChannel( ...@@ -582,52 +582,27 @@ VOID ScanNextChannel(
ULONG Tmp; ULONG Tmp;
UCHAR HtLen; UCHAR HtLen;
UCHAR BROADCOM[4] = {0x0, 0x90, 0x4c, 0x33}; UCHAR BROADCOM[4] = {0x0, 0x90, 0x4c, 0x33};
#ifdef RT_BIG_ENDIAN
HT_CAPABILITY_IE HtCapabilityTmp;
#endif
if (pAd->bBroadComHT == TRUE) if (pAd->bBroadComHT == TRUE)
{ {
HtLen = pAd->MlmeAux.HtCapabilityLen + 4; HtLen = pAd->MlmeAux.HtCapabilityLen + 4;
#ifdef RT_BIG_ENDIAN
NdisMoveMemory(&HtCapabilityTmp, &pAd->MlmeAux.HtCapability, SIZE_HT_CAP_IE);
*(USHORT *)(&HtCapabilityTmp.HtCapInfo) = SWAP16(*(USHORT *)(&HtCapabilityTmp.HtCapInfo));
*(USHORT *)(&HtCapabilityTmp.ExtHtCapInfo) = SWAP16(*(USHORT *)(&HtCapabilityTmp.ExtHtCapInfo));
MakeOutgoingFrame(pOutBuffer + FrameLen, &Tmp,
1, &WpaIe,
1, &HtLen,
4, &BROADCOM[0],
pAd->MlmeAux.HtCapabilityLen, &HtCapabilityTmp,
END_OF_ARGS);
#else
MakeOutgoingFrame(pOutBuffer + FrameLen, &Tmp, MakeOutgoingFrame(pOutBuffer + FrameLen, &Tmp,
1, &WpaIe, 1, &WpaIe,
1, &HtLen, 1, &HtLen,
4, &BROADCOM[0], 4, &BROADCOM[0],
pAd->MlmeAux.HtCapabilityLen, &pAd->MlmeAux.HtCapability, pAd->MlmeAux.HtCapabilityLen, &pAd->MlmeAux.HtCapability,
END_OF_ARGS); END_OF_ARGS);
#endif // RT_BIG_ENDIAN //
} }
else else
{ {
HtLen = pAd->MlmeAux.HtCapabilityLen; HtLen = pAd->MlmeAux.HtCapabilityLen;
#ifdef RT_BIG_ENDIAN
NdisMoveMemory(&HtCapabilityTmp, &pAd->CommonCfg.HtCapability, SIZE_HT_CAP_IE);
*(USHORT *)(&HtCapabilityTmp.HtCapInfo) = SWAP16(*(USHORT *)(&HtCapabilityTmp.HtCapInfo));
*(USHORT *)(&HtCapabilityTmp.ExtHtCapInfo) = SWAP16(*(USHORT *)(&HtCapabilityTmp.ExtHtCapInfo));
MakeOutgoingFrame(pOutBuffer + FrameLen, &Tmp,
1, &HtCapIe,
1, &HtLen,
HtLen, &HtCapabilityTmp,
END_OF_ARGS);
#else
MakeOutgoingFrame(pOutBuffer + FrameLen, &Tmp, MakeOutgoingFrame(pOutBuffer + FrameLen, &Tmp,
1, &HtCapIe, 1, &HtCapIe,
1, &HtLen, 1, &HtLen,
HtLen, &pAd->CommonCfg.HtCapability, HtLen, &pAd->CommonCfg.HtCapability,
END_OF_ARGS); END_OF_ARGS);
#endif // RT_BIG_ENDIAN //
} }
FrameLen += Tmp; FrameLen += Tmp;
} }
......
drivers/staging/rt2860/common/md5.c
View file @ 51f94a7b
...@@ -131,19 +131,7 @@ void hmac_md5(u8 *key, size_t key_len, u8 *data, size_t data_len, u8 *mac) ...@@ -131,19 +131,7 @@ void hmac_md5(u8 *key, size_t key_len, u8 *data, size_t data_len, u8 *mac)
MD5Final(mac, &context); /* finish up 2nd pass */ MD5Final(mac, &context); /* finish up 2nd pass */
} }
#ifndef RT_BIG_ENDIAN
#define byteReverse(buf, len) /* Nothing */ #define byteReverse(buf, len) /* Nothing */
#else
void byteReverse(unsigned char *buf, unsigned longs);
void byteReverse(unsigned char *buf, unsigned longs)
{
do {
*(UINT32 *)buf = SWAP32(*(UINT32 *)buf);
buf += 4;
} while (--longs);
}
#endif
/* ========================== MD5 implementation =========================== */ /* ========================== MD5 implementation =========================== */
// four base functions for MD5 // four base functions for MD5
......
drivers/staging/rt2860/common/rtmp_tkip.c
View file @ 51f94a7b
...@@ -199,15 +199,9 @@ typedef struct PACKED _IV_CONTROL_ ...@@ -199,15 +199,9 @@ typedef struct PACKED _IV_CONTROL_
{ {
struct PACKED struct PACKED
{ {
#ifdef RT_BIG_ENDIAN
UCHAR KeyID:2;
UCHAR ExtIV:1;
UCHAR Rsvd:5;
#else
UCHAR Rsvd:5; UCHAR Rsvd:5;
UCHAR ExtIV:1; UCHAR ExtIV:1;
UCHAR KeyID:2; UCHAR KeyID:2;
#endif
} field; } field;
UCHAR Byte; UCHAR Byte;
} CONTROL; } CONTROL;
...@@ -1114,10 +1108,6 @@ BOOLEAN RTMPSoftDecryptTKIP( ...@@ -1114,10 +1108,6 @@ BOOLEAN RTMPSoftDecryptTKIP(
UCHAR MIC[8]; UCHAR MIC[8];
UCHAR TrailMIC[8]; UCHAR TrailMIC[8];
#ifdef RT_BIG_ENDIAN
RTMPFrameEndianChange(pAd, (PUCHAR)pData, DIR_READ, FALSE);
#endif
fc0 = *pData; fc0 = *pData;
fc1 = *(pData + 1); fc1 = *(pData + 1);
...@@ -1224,9 +1214,6 @@ BOOLEAN RTMPSoftDecryptTKIP( ...@@ -1224,9 +1214,6 @@ BOOLEAN RTMPSoftDecryptTKIP(
return (FALSE); return (FALSE);
} }
#ifdef RT_BIG_ENDIAN
RTMPFrameEndianChange(pAd, (PUCHAR)pData, DIR_READ, FALSE);
#endif
return TRUE; return TRUE;
} }
...@@ -1266,10 +1253,6 @@ BOOLEAN RTMPSoftDecryptAES( ...@@ -1266,10 +1253,6 @@ BOOLEAN RTMPSoftDecryptAES(
UCHAR MIC[8]; UCHAR MIC[8];
UCHAR TrailMIC[8]; UCHAR TrailMIC[8];
#ifdef RT_BIG_ENDIAN
RTMPFrameEndianChange(pAd, (PUCHAR)pData, DIR_READ, FALSE);
#endif
fc0 = *pData; fc0 = *pData;
fc1 = *(pData + 1); fc1 = *(pData + 1);
...@@ -1437,10 +1420,6 @@ BOOLEAN RTMPSoftDecryptAES( ...@@ -1437,10 +1420,6 @@ BOOLEAN RTMPSoftDecryptAES(
return FALSE; return FALSE;
} }
#ifdef RT_BIG_ENDIAN
RTMPFrameEndianChange(pAd, (PUCHAR)pData, DIR_READ, FALSE);
#endif
return TRUE; return TRUE;
} }
......
drivers/staging/rt2860/mlme.h
View file @ 51f94a7b
This diff is collapsed.
drivers/staging/rt2860/oid.h
View file @ 51f94a7b
...@@ -682,17 +682,6 @@ enum { ...@@ -682,17 +682,6 @@ enum {
// MIMO Tx parameter, ShortGI, MCS, STBC, etc. these are fields in TXWI. Don't change this definition!!! // MIMO Tx parameter, ShortGI, MCS, STBC, etc. these are fields in TXWI. Don't change this definition!!!
typedef union _HTTRANSMIT_SETTING { typedef union _HTTRANSMIT_SETTING {
#ifdef RT_BIG_ENDIAN
struct {
USHORT MODE:2; // Use definition MODE_xxx.
USHORT TxBF:1;
USHORT rsv:2;
USHORT STBC:2; //SPACE
USHORT ShortGI:1;
USHORT BW:1; //channel bandwidth 20MHz or 40 MHz
USHORT MCS:7; // MCS
} field;
#else
struct { struct {
USHORT MCS:7; // MCS USHORT MCS:7; // MCS
USHORT BW:1; //channel bandwidth 20MHz or 40 MHz USHORT BW:1; //channel bandwidth 20MHz or 40 MHz
...@@ -702,7 +691,6 @@ typedef union _HTTRANSMIT_SETTING { ...@@ -702,7 +691,6 @@ typedef union _HTTRANSMIT_SETTING {
USHORT TxBF:1; USHORT TxBF:1;
USHORT MODE:2; // Use definition MODE_xxx. USHORT MODE:2; // Use definition MODE_xxx.
} field; } field;
#endif
USHORT word; USHORT word;
} HTTRANSMIT_SETTING, *PHTTRANSMIT_SETTING; } HTTRANSMIT_SETTING, *PHTTRANSMIT_SETTING;
......
drivers/staging/rt2860/rt28xx.h
View file @ 51f94a7b
This diff is collapsed.
drivers/staging/rt2860/rtmp.h
View file @ 51f94a7b
This diff is collapsed.
drivers/staging/rt2860/rtmp_def.h
View file @ 51f94a7b
...@@ -1249,17 +1249,6 @@ ...@@ -1249,17 +1249,6 @@
#define OPMODE_AP 1 #define OPMODE_AP 1
//#define OPMODE_L3_BRG 2 // as AP and STA at the same time //#define OPMODE_L3_BRG 2 // as AP and STA at the same time
#ifdef RT_BIG_ENDIAN
#define DIR_READ 0
#define DIR_WRITE 1
#define TYPE_TXD 0
#define TYPE_RXD 1
#define TYPE_TXINFO 0
#define TYPE_RXINFO 1
#define TYPE_TXWI 0
#define TYPE_RXWI 1
#endif
// ========================= AP rtmp_def.h =========================== // ========================= AP rtmp_def.h ===========================
// value domain for pAd->EventTab.Log[].Event // value domain for pAd->EventTab.Log[].Event
#define EVENT_RESET_ACCESS_POINT 0 // Log = "hh:mm:ss Restart Access Point" #define EVENT_RESET_ACCESS_POINT 0 // Log = "hh:mm:ss Restart Access Point"
...@@ -1440,23 +1429,6 @@ ...@@ -1440,23 +1429,6 @@
(UINT64)(((UINT64)(x) & (UINT64) 0x00ff000000000000ULL) >> 40) | \ (UINT64)(((UINT64)(x) & (UINT64) 0x00ff000000000000ULL) >> 40) | \
(UINT64)(((UINT64)(x) & (UINT64) 0xff00000000000000ULL) >> 56) )) (UINT64)(((UINT64)(x) & (UINT64) 0xff00000000000000ULL) >> 56) ))
#ifdef RT_BIG_ENDIAN
#define cpu2le64(x) SWAP64((x))
#define le2cpu64(x) SWAP64((x))
#define cpu2le32(x) SWAP32((x))
#define le2cpu32(x) SWAP32((x))
#define cpu2le16(x) SWAP16((x))
#define le2cpu16(x) SWAP16((x))
#define cpu2be64(x) ((UINT64)(x))
#define be2cpu64(x) ((UINT64)(x))
#define cpu2be32(x) ((UINT32)(x))
#define be2cpu32(x) ((UINT32)(x))
#define cpu2be16(x) ((UINT16)(x))
#define be2cpu16(x) ((UINT16)(x))
#else // Little_Endian
#define cpu2le64(x) ((UINT64)(x)) #define cpu2le64(x) ((UINT64)(x))
#define le2cpu64(x) ((UINT64)(x)) #define le2cpu64(x) ((UINT64)(x))
#define cpu2le32(x) ((UINT32)(x)) #define cpu2le32(x) ((UINT32)(x))
...@@ -1470,8 +1442,6 @@ ...@@ -1470,8 +1442,6 @@
#define cpu2be16(x) SWAP16((x)) #define cpu2be16(x) SWAP16((x))
#define be2cpu16(x) SWAP16((x)) #define be2cpu16(x) SWAP16((x))
#endif // RT_BIG_ENDIAN
#endif // __RTMP_DEF_H__ #endif // __RTMP_DEF_H__
drivers/staging/rt2860/spectrum.h
View file @ 51f94a7b
...@@ -46,16 +46,6 @@ typedef struct PACKED _CH_SW_ANN_INFO ...@@ -46,16 +46,6 @@ typedef struct PACKED _CH_SW_ANN_INFO
typedef union PACKED _MEASURE_REQ_MODE typedef union PACKED _MEASURE_REQ_MODE
{ {
#ifdef RT_BIG_ENDIAN
struct PACKED
{
UINT8 Rev1:4;
UINT8 Report:1;
UINT8 Request:1;
UINT8 Enable:1;
UINT8 Rev0:1;
} field;
#else
struct PACKED struct PACKED
{ {
UINT8 Rev0:1; UINT8 Rev0:1;
...@@ -64,7 +54,6 @@ typedef union PACKED _MEASURE_REQ_MODE ...@@ -64,7 +54,6 @@ typedef union PACKED _MEASURE_REQ_MODE
UINT8 Report:1; UINT8 Report:1;
UINT8 Rev1:4; UINT8 Rev1:4;
} field; } field;
#endif // RT_BIG_ENDIAN //
UINT8 word; UINT8 word;
} MEASURE_REQ_MODE, *PMEASURE_REQ_MODE; } MEASURE_REQ_MODE, *PMEASURE_REQ_MODE;
...@@ -85,17 +74,6 @@ typedef struct PACKED _MEASURE_REQ_INFO ...@@ -85,17 +74,6 @@ typedef struct PACKED _MEASURE_REQ_INFO
typedef union PACKED _MEASURE_BASIC_REPORT_MAP typedef union PACKED _MEASURE_BASIC_REPORT_MAP
{ {
#ifdef RT_BIG_ENDIAN
struct PACKED
{
UINT8 Rev:3;
UINT8 Unmeasure:1;
UINT8 Radar:1;
UINT8 UnidentifiedSignal:1;
UINT8 OfdmPreamble:1;
UINT8 BSS:1;
} field;
#else
struct PACKED struct PACKED
{ {
UINT8 BSS:1; UINT8 BSS:1;
...@@ -105,7 +83,6 @@ typedef union PACKED _MEASURE_BASIC_REPORT_MAP ...@@ -105,7 +83,6 @@ typedef union PACKED _MEASURE_BASIC_REPORT_MAP
UINT8 Unmeasure:1; UINT8 Unmeasure:1;
UINT8 Rev:3; UINT8 Rev:3;
} field; } field;
#endif // RT_BIG_ENDIAN //
UINT8 word; UINT8 word;
} MEASURE_BASIC_REPORT_MAP, *PMEASURE_BASIC_REPORT_MAP; } MEASURE_BASIC_REPORT_MAP, *PMEASURE_BASIC_REPORT_MAP;
...@@ -137,17 +114,10 @@ typedef union PACKED _MEASURE_REPORT_MODE ...@@ -137,17 +114,10 @@ typedef union PACKED _MEASURE_REPORT_MODE
{ {
struct PACKED struct PACKED
{ {
#ifdef RT_BIG_ENDIAN
UINT8 Rev:5;
UINT8 Refused:1;
UINT8 Incapable:1;
UINT8 Late:1;
#else
UINT8 Late:1; UINT8 Late:1;
UINT8 Incapable:1; UINT8 Incapable:1;
UINT8 Refused:1; UINT8 Refused:1;
UINT8 Rev:5; UINT8 Rev:5;
#endif // RT_BIG_ENDIAN //
} field; } field;
UINT8 word; UINT8 word;
} MEASURE_REPORT_MODE, *PMEASURE_REPORT_MODE; } MEASURE_REPORT_MODE, *PMEASURE_REPORT_MODE;
......
drivers/staging/rt2860/sta/assoc.c
View file @ 51f94a7b
...@@ -360,28 +360,11 @@ VOID MlmeAssocReqAction( ...@@ -360,28 +360,11 @@ VOID MlmeAssocReqAction(
} }
else else
{ {
#ifdef RT_BIG_ENDIAN
HT_CAPABILITY_IE HtCapabilityTmp;
#endif
#ifndef RT_BIG_ENDIAN
MakeOutgoingFrame(pOutBuffer + FrameLen, &TmpLen, MakeOutgoingFrame(pOutBuffer + FrameLen, &TmpLen,
1, &HtCapIe, 1, &HtCapIe,
1, &pAd->MlmeAux.HtCapabilityLen, 1, &pAd->MlmeAux.HtCapabilityLen,
pAd->MlmeAux.HtCapabilityLen, &pAd->MlmeAux.HtCapability, pAd->MlmeAux.HtCapabilityLen, &pAd->MlmeAux.HtCapability,
END_OF_ARGS); END_OF_ARGS);
#else
NdisZeroMemory(&HtCapabilityTmp, sizeof(HT_CAPABILITY_IE));
NdisMoveMemory(&HtCapabilityTmp, &pAd->MlmeAux.HtCapability, pAd->MlmeAux.HtCapabilityLen);
*(USHORT *)(&HtCapabilityTmp.HtCapInfo) = SWAP16(*(USHORT *)(&HtCapabilityTmp.HtCapInfo));
*(USHORT *)(&HtCapabilityTmp.ExtHtCapInfo) = SWAP16(*(USHORT *)(&HtCapabilityTmp.ExtHtCapInfo));
MakeOutgoingFrame(pOutBuffer + FrameLen, &TmpLen,
1, &HtCapIe,
1, &pAd->MlmeAux.HtCapabilityLen,
pAd->MlmeAux.HtCapabilityLen,&HtCapabilityTmp,
END_OF_ARGS);
#endif
} }
FrameLen += TmpLen; FrameLen += TmpLen;
} }
......
drivers/staging/rt2860/sta/connect.c
View file @ 51f94a7b
...@@ -2389,16 +2389,10 @@ ULONG MakeIbssBeacon( ...@@ -2389,16 +2389,10 @@ ULONG MakeIbssBeacon(
ULONG TmpLen; ULONG TmpLen;
UCHAR HtLen, HtLen1; UCHAR HtLen, HtLen1;
#ifdef RT_BIG_ENDIAN
HT_CAPABILITY_IE HtCapabilityTmp;
ADD_HT_INFO_IE addHTInfoTmp;
USHORT b2lTmp, b2lTmp2;
#endif
// add HT Capability IE // add HT Capability IE
HtLen = sizeof(pAd->CommonCfg.HtCapability); HtLen = sizeof(pAd->CommonCfg.HtCapability);
HtLen1 = sizeof(pAd->CommonCfg.AddHTInfo); HtLen1 = sizeof(pAd->CommonCfg.AddHTInfo);
#ifndef RT_BIG_ENDIAN
MakeOutgoingFrame(pBeaconFrame+FrameLen, &TmpLen, MakeOutgoingFrame(pBeaconFrame+FrameLen, &TmpLen,
1, &HtCapIe, 1, &HtCapIe,
1, &HtLen, 1, &HtLen,
...@@ -2407,24 +2401,7 @@ ULONG MakeIbssBeacon( ...@@ -2407,24 +2401,7 @@ ULONG MakeIbssBeacon(
1, &HtLen1, 1, &HtLen1,
HtLen1, &pAd->CommonCfg.AddHTInfo, HtLen1, &pAd->CommonCfg.AddHTInfo,
END_OF_ARGS); END_OF_ARGS);
#else
NdisMoveMemory(&HtCapabilityTmp, &pAd->CommonCfg.HtCapability, HtLen);
*(USHORT *)(&HtCapabilityTmp.HtCapInfo) = SWAP16(*(USHORT *)(&HtCapabilityTmp.HtCapInfo));
*(USHORT *)(&HtCapabilityTmp.ExtHtCapInfo) = SWAP16(*(USHORT *)(&HtCapabilityTmp.ExtHtCapInfo));
NdisMoveMemory(&addHTInfoTmp, &pAd->CommonCfg.AddHTInfo, HtLen1);
*(USHORT *)(&addHTInfoTmp.AddHtInfo2) = SWAP16(*(USHORT *)(&addHTInfoTmp.AddHtInfo2));
*(USHORT *)(&addHTInfoTmp.AddHtInfo3) = SWAP16(*(USHORT *)(&addHTInfoTmp.AddHtInfo3));
MakeOutgoingFrame(pBeaconFrame+FrameLen, &TmpLen,
1, &HtCapIe,
1, &HtLen,
HtLen, &HtCapabilityTmp,
1, &AddHtInfoIe,
1, &HtLen1,
HtLen1, &addHTInfoTmp,
END_OF_ARGS);
#endif
FrameLen += TmpLen; FrameLen += TmpLen;
} }
#endif // DOT11_N_SUPPORT // #endif // DOT11_N_SUPPORT //
...@@ -2444,11 +2421,6 @@ ULONG MakeIbssBeacon( ...@@ -2444,11 +2421,6 @@ ULONG MakeIbssBeacon(
PID_MGMT, PID_BEACON, RATE_1, IFS_HTTXOP, FALSE, &Transmit); PID_MGMT, PID_BEACON, RATE_1, IFS_HTTXOP, FALSE, &Transmit);
} }
#ifdef RT_BIG_ENDIAN
RTMPFrameEndianChange(pAd, pBeaconFrame, DIR_WRITE, FALSE);
RTMPWIEndianChange((PUCHAR)pTxWI, TYPE_TXWI);
#endif
DBGPRINT(RT_DEBUG_TRACE, ("MakeIbssBeacon (len=%ld), SupRateLen=%d, ExtRateLen=%d, Channel=%d, PhyMode=%d\n", DBGPRINT(RT_DEBUG_TRACE, ("MakeIbssBeacon (len=%ld), SupRateLen=%d, ExtRateLen=%d, Channel=%d, PhyMode=%d\n",
FrameLen, SupRateLen, ExtRateLen, pAd->CommonCfg.Channel, pAd->CommonCfg.PhyMode)); FrameLen, SupRateLen, ExtRateLen, pAd->CommonCfg.Channel, pAd->CommonCfg.PhyMode));
return FrameLen; return FrameLen;
......
drivers/staging/rt2860/sta/rtmp_data.c
View file @ 51f94a7b
...@@ -687,11 +687,6 @@ BOOLEAN STARxDoneInterruptHandle( ...@@ -687,11 +687,6 @@ BOOLEAN STARxDoneInterruptHandle(
pRxWI = (PRXWI_STRUC) pData; pRxWI = (PRXWI_STRUC) pData;
pHeader = (PHEADER_802_11) (pData+RXWI_SIZE) ; pHeader = (PHEADER_802_11) (pData+RXWI_SIZE) ;
#ifdef RT_BIG_ENDIAN
RTMPFrameEndianChange(pAd, (PUCHAR)pHeader, DIR_READ, TRUE);
RTMPWIEndianChange((PUCHAR)pRxWI, TYPE_RXWI);
#endif
// build RxCell // build RxCell
RxCell.pRxWI = pRxWI; RxCell.pRxWI = pRxWI;
RxCell.pHeader = pHeader; RxCell.pHeader = pHeader;
......
drivers/staging/rt2860/wpa.h
View file @ 51f94a7b
...@@ -150,19 +150,6 @@ ...@@ -150,19 +150,6 @@
// EAPOL Key Information definition within Key descriptor format // EAPOL Key Information definition within Key descriptor format
typedef struct PACKED _KEY_INFO typedef struct PACKED _KEY_INFO
{ {
#ifdef RT_BIG_ENDIAN
UCHAR KeyAck:1;
UCHAR Install:1;
UCHAR KeyIndex:2;
UCHAR KeyType:1;
UCHAR KeyDescVer:3;
UCHAR Rsvd:3;
UCHAR EKD_DL:1; // EKD for AP; DL for STA
UCHAR Request:1;
UCHAR Error:1;
UCHAR Secure:1;
UCHAR KeyMic:1;
#else
UCHAR KeyMic:1; UCHAR KeyMic:1;
UCHAR Secure:1; UCHAR Secure:1;
UCHAR Error:1; UCHAR Error:1;
...@@ -174,7 +161,6 @@ typedef struct PACKED _KEY_INFO ...@@ -174,7 +161,6 @@ typedef struct PACKED _KEY_INFO
UCHAR KeyIndex:2; UCHAR KeyIndex:2;
UCHAR Install:1; UCHAR Install:1;
UCHAR KeyAck:1; UCHAR KeyAck:1;
#endif
} KEY_INFO, *PKEY_INFO; } KEY_INFO, *PKEY_INFO;
// EAPOL Key descriptor format // EAPOL Key descriptor format
...@@ -204,17 +190,10 @@ typedef struct PACKED _EAPOL_PACKET ...@@ -204,17 +190,10 @@ typedef struct PACKED _EAPOL_PACKET
//802.11i D10 page 83 //802.11i D10 page 83
typedef struct PACKED _GTK_ENCAP typedef struct PACKED _GTK_ENCAP
{ {
#ifndef RT_BIG_ENDIAN
UCHAR Kid:2; UCHAR Kid:2;
UCHAR tx:1; UCHAR tx:1;
UCHAR rsv:5; UCHAR rsv:5;
UCHAR rsv1; UCHAR rsv1;
#else
UCHAR rsv:5;
UCHAR tx:1;
UCHAR Kid:2;
UCHAR rsv1;
#endif
UCHAR GTK[TKIP_GTK_LENGTH]; UCHAR GTK[TKIP_GTK_LENGTH];
} GTK_ENCAP, *PGTK_ENCAP; } GTK_ENCAP, *PGTK_ENCAP;
...@@ -258,19 +237,11 @@ typedef struct PACKED _RSNIE_AUTH { ...@@ -258,19 +237,11 @@ typedef struct PACKED _RSNIE_AUTH {
typedef union PACKED _RSN_CAPABILITIES { typedef union PACKED _RSN_CAPABILITIES {
struct PACKED { struct PACKED {
#ifdef RT_BIG_ENDIAN
USHORT Rsvd:10;
USHORT GTKSA_R_Counter:2;
USHORT PTKSA_R_Counter:2;
USHORT No_Pairwise:1;
USHORT PreAuth:1;
#else
USHORT PreAuth:1; USHORT PreAuth:1;
USHORT No_Pairwise:1; USHORT No_Pairwise:1;
USHORT PTKSA_R_Counter:2; USHORT PTKSA_R_Counter:2;
USHORT GTKSA_R_Counter:2; USHORT GTKSA_R_Counter:2;
USHORT Rsvd:10; USHORT Rsvd:10;
#endif
} field; } field;
USHORT word; USHORT word;
} RSN_CAPABILITIES, *PRSN_CAPABILITIES; } RSN_CAPABILITIES, *PRSN_CAPABILITIES;
......
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