Commit 54f16ebf authored by Alex Deucher's avatar Alex Deucher

drm/amdgpu/pp: endian fixes for processpptables.c

Properly swap when reading from the vbios.
Reviewed-by: default avatarEvan Quan <evan.quan@amd.com>
Reviewed-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 2cf01099
...@@ -757,8 +757,8 @@ static int init_non_clock_fields(struct pp_hwmgr *hwmgr, ...@@ -757,8 +757,8 @@ static int init_non_clock_fields(struct pp_hwmgr *hwmgr,
ps->validation.supportedPowerLevels = pnon_clock_info->ucRequiredPower; ps->validation.supportedPowerLevels = pnon_clock_info->ucRequiredPower;
if (ATOM_PPLIB_NONCLOCKINFO_VER1 < version) { if (ATOM_PPLIB_NONCLOCKINFO_VER1 < version) {
ps->uvd_clocks.VCLK = pnon_clock_info->ulVCLK; ps->uvd_clocks.VCLK = le32_to_cpu(pnon_clock_info->ulVCLK);
ps->uvd_clocks.DCLK = pnon_clock_info->ulDCLK; ps->uvd_clocks.DCLK = le32_to_cpu(pnon_clock_info->ulDCLK);
} else { } else {
ps->uvd_clocks.VCLK = 0; ps->uvd_clocks.VCLK = 0;
ps->uvd_clocks.DCLK = 0; ps->uvd_clocks.DCLK = 0;
...@@ -937,7 +937,8 @@ int pp_tables_get_entry(struct pp_hwmgr *hwmgr, ...@@ -937,7 +937,8 @@ int pp_tables_get_entry(struct pp_hwmgr *hwmgr,
if (entry_index > powerplay_table->ucNumStates) if (entry_index > powerplay_table->ucNumStates)
return -1; return -1;
pstate_entry = (ATOM_PPLIB_STATE *)((unsigned long)powerplay_table + powerplay_table->usStateArrayOffset + pstate_entry = (ATOM_PPLIB_STATE *)((unsigned long)powerplay_table +
le16_to_cpu(powerplay_table->usStateArrayOffset) +
entry_index * powerplay_table->ucStateEntrySize); entry_index * powerplay_table->ucStateEntrySize);
pnon_clock_info = (ATOM_PPLIB_NONCLOCK_INFO *)((unsigned long)powerplay_table + pnon_clock_info = (ATOM_PPLIB_NONCLOCK_INFO *)((unsigned long)powerplay_table +
...@@ -1063,13 +1064,13 @@ static int init_overdrive_limits(struct pp_hwmgr *hwmgr, ...@@ -1063,13 +1064,13 @@ static int init_overdrive_limits(struct pp_hwmgr *hwmgr,
&size, &frev, &crev); &size, &frev, &crev);
if ((fw_info->ucTableFormatRevision == 1) if ((fw_info->ucTableFormatRevision == 1)
&& (fw_info->usStructureSize >= sizeof(ATOM_FIRMWARE_INFO_V1_4))) && (le16_to_cpu(fw_info->usStructureSize) >= sizeof(ATOM_FIRMWARE_INFO_V1_4)))
result = init_overdrive_limits_V1_4(hwmgr, result = init_overdrive_limits_V1_4(hwmgr,
powerplay_table, powerplay_table,
(const ATOM_FIRMWARE_INFO_V1_4 *)fw_info); (const ATOM_FIRMWARE_INFO_V1_4 *)fw_info);
else if ((fw_info->ucTableFormatRevision == 2) else if ((fw_info->ucTableFormatRevision == 2)
&& (fw_info->usStructureSize >= sizeof(ATOM_FIRMWARE_INFO_V2_1))) && (le16_to_cpu(fw_info->usStructureSize) >= sizeof(ATOM_FIRMWARE_INFO_V2_1)))
result = init_overdrive_limits_V2_1(hwmgr, result = init_overdrive_limits_V2_1(hwmgr,
powerplay_table, powerplay_table,
(const ATOM_FIRMWARE_INFO_V2_1 *)fw_info); (const ATOM_FIRMWARE_INFO_V2_1 *)fw_info);
...@@ -1303,7 +1304,7 @@ static int init_clock_voltage_dependency(struct pp_hwmgr *hwmgr, ...@@ -1303,7 +1304,7 @@ static int init_clock_voltage_dependency(struct pp_hwmgr *hwmgr,
if (0 != powerplay_table4->usVddcDependencyOnSCLKOffset) { if (0 != powerplay_table4->usVddcDependencyOnSCLKOffset) {
table = (ATOM_PPLIB_Clock_Voltage_Dependency_Table *) table = (ATOM_PPLIB_Clock_Voltage_Dependency_Table *)
(((unsigned long) powerplay_table4) + (((unsigned long) powerplay_table4) +
powerplay_table4->usVddcDependencyOnSCLKOffset); le16_to_cpu(powerplay_table4->usVddcDependencyOnSCLKOffset));
result = get_clock_voltage_dependency_table(hwmgr, result = get_clock_voltage_dependency_table(hwmgr,
&hwmgr->dyn_state.vddc_dependency_on_sclk, table); &hwmgr->dyn_state.vddc_dependency_on_sclk, table);
} }
...@@ -1311,7 +1312,7 @@ static int init_clock_voltage_dependency(struct pp_hwmgr *hwmgr, ...@@ -1311,7 +1312,7 @@ static int init_clock_voltage_dependency(struct pp_hwmgr *hwmgr,
if (result == 0 && (0 != powerplay_table4->usVddciDependencyOnMCLKOffset)) { if (result == 0 && (0 != powerplay_table4->usVddciDependencyOnMCLKOffset)) {
table = (ATOM_PPLIB_Clock_Voltage_Dependency_Table *) table = (ATOM_PPLIB_Clock_Voltage_Dependency_Table *)
(((unsigned long) powerplay_table4) + (((unsigned long) powerplay_table4) +
powerplay_table4->usVddciDependencyOnMCLKOffset); le16_to_cpu(powerplay_table4->usVddciDependencyOnMCLKOffset));
result = get_clock_voltage_dependency_table(hwmgr, result = get_clock_voltage_dependency_table(hwmgr,
&hwmgr->dyn_state.vddci_dependency_on_mclk, table); &hwmgr->dyn_state.vddci_dependency_on_mclk, table);
} }
...@@ -1319,7 +1320,7 @@ static int init_clock_voltage_dependency(struct pp_hwmgr *hwmgr, ...@@ -1319,7 +1320,7 @@ static int init_clock_voltage_dependency(struct pp_hwmgr *hwmgr,
if (result == 0 && (0 != powerplay_table4->usVddcDependencyOnMCLKOffset)) { if (result == 0 && (0 != powerplay_table4->usVddcDependencyOnMCLKOffset)) {
table = (ATOM_PPLIB_Clock_Voltage_Dependency_Table *) table = (ATOM_PPLIB_Clock_Voltage_Dependency_Table *)
(((unsigned long) powerplay_table4) + (((unsigned long) powerplay_table4) +
powerplay_table4->usVddcDependencyOnMCLKOffset); le16_to_cpu(powerplay_table4->usVddcDependencyOnMCLKOffset));
result = get_clock_voltage_dependency_table(hwmgr, result = get_clock_voltage_dependency_table(hwmgr,
&hwmgr->dyn_state.vddc_dependency_on_mclk, table); &hwmgr->dyn_state.vddc_dependency_on_mclk, table);
} }
...@@ -1327,7 +1328,7 @@ static int init_clock_voltage_dependency(struct pp_hwmgr *hwmgr, ...@@ -1327,7 +1328,7 @@ static int init_clock_voltage_dependency(struct pp_hwmgr *hwmgr,
if (result == 0 && (0 != powerplay_table4->usMaxClockVoltageOnDCOffset)) { if (result == 0 && (0 != powerplay_table4->usMaxClockVoltageOnDCOffset)) {
limit_table = (ATOM_PPLIB_Clock_Voltage_Limit_Table *) limit_table = (ATOM_PPLIB_Clock_Voltage_Limit_Table *)
(((unsigned long) powerplay_table4) + (((unsigned long) powerplay_table4) +
powerplay_table4->usMaxClockVoltageOnDCOffset); le16_to_cpu(powerplay_table4->usMaxClockVoltageOnDCOffset));
result = get_clock_voltage_limit(hwmgr, result = get_clock_voltage_limit(hwmgr,
&hwmgr->dyn_state.max_clock_voltage_on_dc, limit_table); &hwmgr->dyn_state.max_clock_voltage_on_dc, limit_table);
} }
...@@ -1346,7 +1347,7 @@ static int init_clock_voltage_dependency(struct pp_hwmgr *hwmgr, ...@@ -1346,7 +1347,7 @@ static int init_clock_voltage_dependency(struct pp_hwmgr *hwmgr,
if (result == 0 && (0 != powerplay_table4->usMvddDependencyOnMCLKOffset)) { if (result == 0 && (0 != powerplay_table4->usMvddDependencyOnMCLKOffset)) {
table = (ATOM_PPLIB_Clock_Voltage_Dependency_Table *) table = (ATOM_PPLIB_Clock_Voltage_Dependency_Table *)
(((unsigned long) powerplay_table4) + (((unsigned long) powerplay_table4) +
powerplay_table4->usMvddDependencyOnMCLKOffset); le16_to_cpu(powerplay_table4->usMvddDependencyOnMCLKOffset));
result = get_clock_voltage_dependency_table(hwmgr, result = get_clock_voltage_dependency_table(hwmgr,
&hwmgr->dyn_state.mvdd_dependency_on_mclk, table); &hwmgr->dyn_state.mvdd_dependency_on_mclk, table);
} }
...@@ -1569,7 +1570,8 @@ static int get_vce_state_table_entry(struct pp_hwmgr *hwmgr, ...@@ -1569,7 +1570,8 @@ static int get_vce_state_table_entry(struct pp_hwmgr *hwmgr,
const VCEClockInfoArray *vce_clock_info_array = (const VCEClockInfoArray *)(((unsigned long) powerplay_table) + vce_clock_info_array_offset); const VCEClockInfoArray *vce_clock_info_array = (const VCEClockInfoArray *)(((unsigned long) powerplay_table) + vce_clock_info_array_offset);
const ClockInfoArray *clock_arrays = (ClockInfoArray *)(((unsigned long)powerplay_table) + powerplay_table->usClockInfoArrayOffset); const ClockInfoArray *clock_arrays = (ClockInfoArray *)(((unsigned long)powerplay_table) +
le16_to_cpu(powerplay_table->usClockInfoArrayOffset));
const ATOM_PPLIB_VCE_State_Record *record = &vce_state_table->entries[i]; const ATOM_PPLIB_VCE_State_Record *record = &vce_state_table->entries[i];
...@@ -1579,8 +1581,8 @@ static int get_vce_state_table_entry(struct pp_hwmgr *hwmgr, ...@@ -1579,8 +1581,8 @@ static int get_vce_state_table_entry(struct pp_hwmgr *hwmgr,
*flag = (record->ucClockInfoIndex >> NUM_BITS_CLOCK_INFO_ARRAY_INDEX); *flag = (record->ucClockInfoIndex >> NUM_BITS_CLOCK_INFO_ARRAY_INDEX);
vce_state->evclk = ((uint32_t)vce_clock_info->ucEVClkHigh << 16) | vce_clock_info->usEVClkLow; vce_state->evclk = ((uint32_t)vce_clock_info->ucEVClkHigh << 16) | le16_to_cpu(vce_clock_info->usEVClkLow);
vce_state->ecclk = ((uint32_t)vce_clock_info->ucECClkHigh << 16) | vce_clock_info->usECClkLow; vce_state->ecclk = ((uint32_t)vce_clock_info->ucECClkHigh << 16) | le16_to_cpu(vce_clock_info->usECClkLow);
*clock_info = (void *)((unsigned long)(clock_arrays->clockInfo) + (clockInfoIndex * clock_arrays->ucEntrySize)); *clock_info = (void *)((unsigned long)(clock_arrays->clockInfo) + (clockInfoIndex * clock_arrays->ucEntrySize));
......
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