Commit 57d386d3 authored by Kai Germaschewski's avatar Kai Germaschewski

ISDN/HiSax: Further simplify *_empty_fifo() for B-Channel

Most drivers had ->read_fifo already, so we could call it from
common code, so just add read_fifo to the ones which were still
missing it and there we go.
parent 6fa2aea0
...@@ -175,6 +175,35 @@ WriteHDLCPnP(struct IsdnCardState *cs, int chan, u8 offset, u8 value) ...@@ -175,6 +175,35 @@ WriteHDLCPnP(struct IsdnCardState *cs, int chan, u8 offset, u8 value)
spin_unlock_irqrestore(&avm_pci_lock, flags); spin_unlock_irqrestore(&avm_pci_lock, flags);
} }
static void
hdlc_read_fifo(struct IsdnCardState *cs, int hscx, u8 *data, int len)
{
u8 idx = hscx ? AVM_HDLC_2 : AVM_HDLC_1;
int i;
if (cs->subtyp == AVM_FRITZ_PCI) {
u32 *ptr = (u32 *) data;
outl(idx, cs->hw.avm.cfg_reg + 4);
for (i = 0; i < len; i += 4) {
#ifdef __powerpc__
#ifdef CONFIG_APUS
*ptr++ = in_le32((u32 *)(cs->hw.avm.isac +_IO_BASE));
#else
*ptr++ = in_be32((u32 *)(cs->hw.avm.isac +_IO_BASE));
#endif /* CONFIG_APUS */
#else
*ptr++ = inl(cs->hw.avm.isac);
#endif /* __powerpc__ */
}
} else {
outb(idx, cs->hw.avm.cfg_reg + 4);
for (i = 0; i < len; i++) {
*data++ = inb(cs->hw.avm.isac);
}
}
}
static inline static inline
struct BCState *Sel_BCS(struct IsdnCardState *cs, int channel) struct BCState *Sel_BCS(struct IsdnCardState *cs, int channel)
{ {
...@@ -259,49 +288,7 @@ modehdlc(struct BCState *bcs, int mode, int bc) ...@@ -259,49 +288,7 @@ modehdlc(struct BCState *bcs, int mode, int bc)
static inline void static inline void
hdlc_empty_fifo(struct BCState *bcs, int count) hdlc_empty_fifo(struct BCState *bcs, int count)
{ {
register u_int *ptr; recv_empty_fifo_b(bcs, count);
u8 *p;
u8 idx = bcs->channel ? AVM_HDLC_2 : AVM_HDLC_1;
int cnt = 0;
struct IsdnCardState *cs = bcs->cs;
p = recv_empty_fifo_b(bcs, count);
if (!p) {
return;
}
ptr = (u_int *) p;
if (cs->subtyp == AVM_FRITZ_PCI) {
outl(idx, cs->hw.avm.cfg_reg + 4);
while (cnt < count) {
#ifdef __powerpc__
#ifdef CONFIG_APUS
*ptr++ = in_le32((unsigned *)(cs->hw.avm.isac +_IO_BASE));
#else
*ptr++ = in_be32((unsigned *)(cs->hw.avm.isac +_IO_BASE));
#endif /* CONFIG_APUS */
#else
*ptr++ = inl(cs->hw.avm.isac);
#endif /* __powerpc__ */
cnt += 4;
}
} else {
outb(idx, cs->hw.avm.cfg_reg + 4);
while (cnt < count) {
*p++ = inb(cs->hw.avm.isac);
cnt++;
}
}
if (cs->debug & L1_DEB_HSCX_FIFO) {
char *t = bcs->blog;
if (cs->subtyp == AVM_FRITZ_PNP)
p = (u8 *) ptr;
t += sprintf(t, "hdlc_empty_fifo %c cnt %d",
bcs->channel ? 'B' : 'A', count);
QuickHex(t, p, count);
debugl1(cs, bcs->blog);
}
} }
static void static void
...@@ -540,6 +527,7 @@ int ...@@ -540,6 +527,7 @@ int
setstack_hdlc(struct PStack *st, struct BCState *bcs) setstack_hdlc(struct PStack *st, struct BCState *bcs)
{ {
bcs->channel = st->l1.bc; bcs->channel = st->l1.bc;
bcs->hw.hscx.hscx = bcs->channel;
if (open_hdlcstate(st->l1.hardware, bcs)) if (open_hdlcstate(st->l1.hardware, bcs))
return (-1); return (-1);
st->l1.bcs = bcs; st->l1.bcs = bcs;
...@@ -550,6 +538,10 @@ setstack_hdlc(struct PStack *st, struct BCState *bcs) ...@@ -550,6 +538,10 @@ setstack_hdlc(struct PStack *st, struct BCState *bcs)
return (0); return (0);
} }
static struct bc_hw_ops hdlc_hw_ops = {
.read_fifo = hdlc_read_fifo,
};
void __init void __init
inithdlc(struct IsdnCardState *cs) inithdlc(struct IsdnCardState *cs)
{ {
...@@ -773,6 +765,7 @@ setup_avm_pcipnp(struct IsdnCard *card) ...@@ -773,6 +765,7 @@ setup_avm_pcipnp(struct IsdnCard *card)
cs->irq, cs->hw.avm.cfg_reg); cs->irq, cs->hw.avm.cfg_reg);
cs->dc_hw_ops = &isac_ops; cs->dc_hw_ops = &isac_ops;
cs->bc_hw_ops = &hdlc_hw_ops;
cs->bc_l1_ops = &hdlc_l1_ops; cs->bc_l1_ops = &hdlc_l1_ops;
cs->cardmsg = &AVM_card_msg; cs->cardmsg = &AVM_card_msg;
cs->irq_func = &avm_pcipnp_interrupt; cs->irq_func = &avm_pcipnp_interrupt;
......
...@@ -272,9 +272,19 @@ mem_hscx_write(struct IsdnCardState *cs, int hscx, u8 offset, u8 value) ...@@ -272,9 +272,19 @@ mem_hscx_write(struct IsdnCardState *cs, int hscx, u8 offset, u8 value)
memwritereg(cs->hw.diva.cfg_reg, offset + (hscx ? 0x40 : 0), value); memwritereg(cs->hw.diva.cfg_reg, offset + (hscx ? 0x40 : 0), value);
} }
static void
mem_hscx_read_fifo(struct IsdnCardState *cs, int hscx, u8 *data, int len)
{
int i;
for (i = 0; i < len; i++)
*data++ = memreadreg(cs->hw.diva.cfg_reg, hscx ? 0x40 : 0);
}
static struct bc_hw_ops mem_hscx_ops = { static struct bc_hw_ops mem_hscx_ops = {
.read_reg = mem_hscx_read, .read_reg = mem_hscx_read,
.write_reg = mem_hscx_write, .write_reg = mem_hscx_write,
.read_fifo = mem_hscx_read_fifo,
}; };
/* IO-Functions for IPACX type cards */ /* IO-Functions for IPACX type cards */
...@@ -325,9 +335,19 @@ ipacx_bc_write(struct IsdnCardState *cs, int hscx, u8 offset, u8 value) ...@@ -325,9 +335,19 @@ ipacx_bc_write(struct IsdnCardState *cs, int hscx, u8 offset, u8 value)
(hscx ? IPACX_OFF_B2 : IPACX_OFF_B1), value); (hscx ? IPACX_OFF_B2 : IPACX_OFF_B1), value);
} }
static void
ipacx_bc_read_fifo(struct IsdnCardState *cs, int hscx, u8 *data, int len)
{
int i;
for (i = 0; i < len ; i++)
*data++ = ipacx_bc_read(cs, hscx, IPACX_RFIFOB);
}
static struct bc_hw_ops ipacx_bc_ops = { static struct bc_hw_ops ipacx_bc_ops = {
.read_reg = ipacx_bc_read, .read_reg = ipacx_bc_read,
.write_reg = ipacx_bc_write, .write_reg = ipacx_bc_write,
.read_fifo = ipacx_bc_read_fifo,
}; };
static void static void
...@@ -433,41 +453,19 @@ MemwaitforXFW(struct IsdnCardState *cs, int hscx) ...@@ -433,41 +453,19 @@ MemwaitforXFW(struct IsdnCardState *cs, int hscx)
} }
static inline void static inline void
MemWriteHSCXCMDR(struct IsdnCardState *cs, int hscx, u8 data) MemWriteHSCXCMDR(struct BCState *bcs, u8 data)
{ {
unsigned long flags; int hscx = bcs->hw.hscx.hscx;
spin_lock_irqsave(&diva_lock, flags); MemwaitforCEC(bcs->cs, hscx);
MemwaitforCEC(cs, hscx); mem_hscx_write(bcs->cs, hscx, HSCX_CMDR, data);
mem_hscx_write(cs, hscx, HSCX_CMDR, data);
spin_unlock_irqrestore(&diva_lock, flags);
} }
static void static void
Memhscx_empty_fifo(struct BCState *bcs, int count) Memhscx_empty_fifo(struct BCState *bcs, int count)
{ {
u8 *p; recv_empty_fifo_b(bcs, count);
struct IsdnCardState *cs = bcs->cs; MemWriteHSCXCMDR(bcs, 0x80);
int cnt;
p = recv_empty_fifo_b(bcs, count);
if (!p) {
MemWriteHSCXCMDR(cs, bcs->hw.hscx.hscx, 0x80);
return;
}
cnt = count;
while (cnt--)
*p++ = memreadreg(cs->hw.diva.cfg_reg, bcs->hw.hscx.hscx ? 0x40 : 0);
MemWriteHSCXCMDR(cs, bcs->hw.hscx.hscx, 0x80);
if (cs->debug & L1_DEB_HSCX_FIFO) {
char *t = bcs->blog;
t += sprintf(t, "hscx_empty_fifo %c cnt %d",
bcs->hw.hscx.hscx ? 'B' : 'A', count);
QuickHex(t, p, count);
debugl1(cs, bcs->blog);
}
} }
static void static void
...@@ -486,7 +484,7 @@ Memhscx_fill_fifo(struct BCState *bcs) ...@@ -486,7 +484,7 @@ Memhscx_fill_fifo(struct BCState *bcs)
while (count--) while (count--)
memwritereg(cs->hw.diva.cfg_reg, bcs->hw.hscx.hscx ? 0x40 : 0, memwritereg(cs->hw.diva.cfg_reg, bcs->hw.hscx.hscx ? 0x40 : 0,
*p++); *p++);
MemWriteHSCXCMDR(cs, bcs->hw.hscx.hscx, more ? 0x8 : 0xa); MemWriteHSCXCMDR(bcs, more ? 0x8 : 0xa);
} }
static struct bc_l1_ops mem_hscx_l1_ops = { static struct bc_l1_ops mem_hscx_l1_ops = {
...@@ -518,7 +516,7 @@ Memhscx_interrupt(struct IsdnCardState *cs, u8 val, u8 hscx) ...@@ -518,7 +516,7 @@ Memhscx_interrupt(struct IsdnCardState *cs, u8 val, u8 hscx)
if (!(r & 0x20)) if (!(r & 0x20))
if (cs->debug & L1_DEB_WARN) if (cs->debug & L1_DEB_WARN)
debugl1(cs, "HSCX CRC error"); debugl1(cs, "HSCX CRC error");
MemWriteHSCXCMDR(cs, hscx, 0x80); MemWriteHSCXCMDR(bcs, 0x80);
} else { } else {
count = mem_hscx_read(cs, hscx, HSCX_RBCL) & ( count = mem_hscx_read(cs, hscx, HSCX_RBCL) & (
test_bit(HW_IPAC, &cs->HW_Flags)? 0x3f: 0x1f); test_bit(HW_IPAC, &cs->HW_Flags)? 0x3f: 0x1f);
...@@ -561,7 +559,7 @@ Memhscx_interrupt(struct IsdnCardState *cs, u8 val, u8 hscx) ...@@ -561,7 +559,7 @@ Memhscx_interrupt(struct IsdnCardState *cs, u8 val, u8 hscx)
static void static void
Memhscx_reset_xmit(struct BCState *bcs) Memhscx_reset_xmit(struct BCState *bcs)
{ {
MemWriteHSCXCMDR(bcs->cs, bcs->hw.hscx.hscx, 0x01); MemWriteHSCXCMDR(bcs, 0x01);
} }
static inline void static inline void
......
...@@ -39,15 +39,6 @@ hscx_write(struct BCState *bcs, u8 addr, u8 val) ...@@ -39,15 +39,6 @@ hscx_write(struct BCState *bcs, u8 addr, u8 val)
cs->bc_hw_ops->write_reg(cs, hscx, addr, val); cs->bc_hw_ops->write_reg(cs, hscx, addr, val);
} }
static inline void
hscx_read_fifo(struct BCState *bcs, u8 *p, int len)
{
struct IsdnCardState *cs = bcs->cs;
u8 hscx = bcs->hw.hscx.hscx;
cs->bc_hw_ops->read_fifo(cs, hscx, p, len);
}
static inline void static inline void
hscx_write_fifo(struct BCState *bcs, u8 *p, int len) hscx_write_fifo(struct BCState *bcs, u8 *p, int len)
{ {
......
...@@ -50,25 +50,8 @@ WriteHSCXCMDR(struct BCState *bcs, u8 data) ...@@ -50,25 +50,8 @@ WriteHSCXCMDR(struct BCState *bcs, u8 data)
static void static void
hscx_empty_fifo(struct BCState *bcs, int count) hscx_empty_fifo(struct BCState *bcs, int count)
{ {
u8 *p; recv_empty_fifo_b(bcs, count);
struct IsdnCardState *cs = bcs->cs;
p = recv_empty_fifo_b(bcs, count);
if (!p) {
WriteHSCXCMDR(bcs, 0x80); WriteHSCXCMDR(bcs, 0x80);
return;
}
hscx_read_fifo(bcs, p, count);
WriteHSCXCMDR(bcs, 0x80);
if (cs->debug & L1_DEB_HSCX_FIFO) {
char *t = bcs->blog;
t += sprintf(t, "hscx_empty_fifo %c cnt %d",
bcs->hw.hscx.hscx ? 'B' : 'A', count);
QuickHex(t, p, count);
debugl1(cs, bcs->blog);
}
} }
static void static void
......
...@@ -503,29 +503,8 @@ bch_l2l1(struct PStack *st, int pr, void *arg) ...@@ -503,29 +503,8 @@ bch_l2l1(struct PStack *st, int pr, void *arg)
static void static void
ipacx_bc_empty_fifo(struct BCState *bcs, int count) ipacx_bc_empty_fifo(struct BCState *bcs, int count)
{ {
u8 *p, hscx; recv_empty_fifo_b(bcs, count);
struct IsdnCardState *cs = bcs->cs;
int cnt;
hscx = bcs->hw.hscx.hscx;
p = recv_empty_fifo_b(bcs, count);
if (!p) {
ipacx_bc_write_reg(bcs, IPACX_CMDRB, 0x80); // RMC ipacx_bc_write_reg(bcs, IPACX_CMDRB, 0x80); // RMC
return;
}
cnt = count;
while (cnt--) *p++ = ipacx_bc_read_reg(bcs, IPACX_RFIFOB);
ipacx_bc_write_reg(bcs, IPACX_CMDRB, 0x80); // RMC
p -= count;
if (cs->debug &L1_DEB_HSCX_FIFO) {
char *t = bcs->blog;
t += sprintf(t, "ipacx_empty_fifo() B-%d cnt %d", hscx, count);
QuickHex(t, p, count);
debugl1(cs, bcs->blog);
}
} }
//---------------------------------------------------------- //----------------------------------------------------------
......
...@@ -431,5 +431,16 @@ recv_empty_fifo_b(struct BCState *bcs, int count) ...@@ -431,5 +431,16 @@ recv_empty_fifo_b(struct BCState *bcs, int count)
} }
p = bcs->rcvbuf + bcs->rcvidx; p = bcs->rcvbuf + bcs->rcvidx;
bcs->rcvidx += count; bcs->rcvidx += count;
cs->bc_hw_ops->read_fifo(cs, bcs->hw.hscx.hscx, p, count);
if (cs->debug & L1_DEB_HSCX_FIFO) {
char *t = bcs->blog;
t += sprintf(t, "%s %c cnt %d", __FUNCTION__,
bcs->hw.hscx.hscx ? 'B' : 'A', count);
QuickHex(t, p, count);
debugl1(cs, bcs->blog);
}
return p; return p;
} }
...@@ -32,15 +32,6 @@ jade_write_reg(struct IsdnCardState *cs, int jade, u8 addr, u8 val) ...@@ -32,15 +32,6 @@ jade_write_reg(struct IsdnCardState *cs, int jade, u8 addr, u8 val)
cs->bc_hw_ops->write_reg(cs, jade, addr, val); cs->bc_hw_ops->write_reg(cs, jade, addr, val);
} }
static inline void
jade_read_fifo(struct BCState *bcs, u8 *p, int len)
{
struct IsdnCardState *cs = bcs->cs;
u8 hscx = bcs->hw.hscx.hscx;
cs->bc_hw_ops->read_fifo(cs, hscx, p, len);
}
static inline void static inline void
jade_write_fifo(struct BCState *bcs, u8 *p, int len) jade_write_fifo(struct BCState *bcs, u8 *p, int len)
{ {
......
...@@ -9,7 +9,6 @@ ...@@ -9,7 +9,6 @@
* of the GNU General Public License, incorporated herein by reference. * of the GNU General Public License, incorporated herein by reference.
* *
*/ */
static spinlock_t jade_irq_lock = SPIN_LOCK_UNLOCKED;
static inline void static inline void
waitforCEC(struct IsdnCardState *cs, int jade, int reg) waitforCEC(struct IsdnCardState *cs, int jade, int reg)
...@@ -26,20 +25,17 @@ waitforCEC(struct IsdnCardState *cs, int jade, int reg) ...@@ -26,20 +25,17 @@ waitforCEC(struct IsdnCardState *cs, int jade, int reg)
static inline void static inline void
waitforXFW(struct IsdnCardState *cs, int jade) waitforXFW(struct BCState *bcs)
{ {
/* Does not work on older jade versions, don't care */
} }
static inline void static inline void
WriteJADECMDR(struct IsdnCardState *cs, int jade, int reg, u8 data) WriteJADECMDR(struct BCState *bcs, int reg, u8 data)
{ {
unsigned long flags; int jade = bcs->hw.hscx.hscx;
spin_lock_irqsave(&jade_irq_lock, flags); waitforCEC(bcs->cs, jade, reg);
waitforCEC(cs, jade, reg); jade_write_reg(bcs->cs, jade, reg, data);
jade_write_reg(cs, jade, reg, data);
spin_unlock_irqrestore(&jade_irq_lock, flags);
} }
...@@ -47,43 +43,24 @@ WriteJADECMDR(struct IsdnCardState *cs, int jade, int reg, u8 data) ...@@ -47,43 +43,24 @@ WriteJADECMDR(struct IsdnCardState *cs, int jade, int reg, u8 data)
static void static void
jade_empty_fifo(struct BCState *bcs, int count) jade_empty_fifo(struct BCState *bcs, int count)
{ {
u8 *p; recv_empty_fifo_b(bcs, count);
struct IsdnCardState *cs = bcs->cs; WriteJADECMDR(bcs, jade_HDLC_RCMD, jadeRCMD_RMC);
p = recv_empty_fifo_b(bcs, count);
if (!p) {
WriteJADECMDR(cs, bcs->hw.hscx.hscx, jade_HDLC_RCMD, jadeRCMD_RMC);
return;
}
jade_read_fifo(bcs, p, count);
WriteJADECMDR(cs, bcs->hw.hscx.hscx, jade_HDLC_RCMD, jadeRCMD_RMC);
if (cs->debug & L1_DEB_HSCX_FIFO) {
char *t = bcs->blog;
t += sprintf(t, "jade_empty_fifo %c cnt %d",
bcs->hw.hscx.hscx ? 'B' : 'A', count);
QuickHex(t, p, count);
debugl1(cs, bcs->blog);
}
} }
static void static void
jade_fill_fifo(struct BCState *bcs) jade_fill_fifo(struct BCState *bcs)
{ {
struct IsdnCardState *cs = bcs->cs;
int more, count; int more, count;
int fifo_size = 32; int fifo_size = 32;
int hscx = bcs->hw.hscx.hscx;
unsigned char *p; unsigned char *p;
p = xmit_fill_fifo_b(bcs, fifo_size, &count, &more); p = xmit_fill_fifo_b(bcs, fifo_size, &count, &more);
if (!p) if (!p)
return; return;
waitforXFW(cs, hscx); waitforXFW(bcs);
jade_write_fifo(bcs, p, count); jade_write_fifo(bcs, p, count);
WriteJADECMDR(cs, hscx, jade_HDLC_XCMD, WriteJADECMDR(bcs, jade_HDLC_XCMD,
more ? jadeXCMD_XF : (jadeXCMD_XF|jadeXCMD_XME)); more ? jadeXCMD_XF : (jadeXCMD_XF|jadeXCMD_XME));
} }
...@@ -113,7 +90,7 @@ jade_interrupt(struct IsdnCardState *cs, u8 val, u8 jade) ...@@ -113,7 +90,7 @@ jade_interrupt(struct IsdnCardState *cs, u8 val, u8 jade)
if (!(r & 0x20)) if (!(r & 0x20))
if (cs->debug & L1_DEB_WARN) if (cs->debug & L1_DEB_WARN)
debugl1(cs, "JADE %c CRC error", 'A'+jade); debugl1(cs, "JADE %c CRC error", 'A'+jade);
WriteJADECMDR(cs, jade, jade_HDLC_RCMD, jadeRCMD_RMC); WriteJADECMDR(bcs, jade_HDLC_RCMD, jadeRCMD_RMC);
} else { } else {
count = jade_read_reg(cs, i_jade, jade_HDLC_RBCL) & 0x1F; count = jade_read_reg(cs, i_jade, jade_HDLC_RBCL) & 0x1F;
if (count == 0) if (count == 0)
...@@ -155,7 +132,7 @@ jade_interrupt(struct IsdnCardState *cs, u8 val, u8 jade) ...@@ -155,7 +132,7 @@ jade_interrupt(struct IsdnCardState *cs, u8 val, u8 jade)
static void static void
reset_xmit(struct BCState *bcs) reset_xmit(struct BCState *bcs)
{ {
WriteJADECMDR(bcs->cs, bcs->hw.hscx.hscx, jade_HDLC_XCMD, jadeXCMD_XRES); WriteJADECMDR(bcs, jade_HDLC_XCMD, jadeXCMD_XRES);
} }
void void
......
...@@ -81,6 +81,16 @@ w6692_bc_write_reg(struct IsdnCardState *cs, int bchan, u8 offset, u8 value) ...@@ -81,6 +81,16 @@ w6692_bc_write_reg(struct IsdnCardState *cs, int bchan, u8 offset, u8 value)
outb(value, cs->hw.w6692.iobase + (bchan ? 0x40 : 0) + offset); outb(value, cs->hw.w6692.iobase + (bchan ? 0x40 : 0) + offset);
} }
static void
w6692_bc_read_fifo(struct IsdnCardState *cs, int bchan, u8 *data, int len)
{
insb(cs->hw.w6692.iobase + W_B_RFIFO + (bchan ? 0x40:0), data, len);
}
static struct bc_hw_ops w6692_bc_hw_ops = {
.read_fifo = w6692_bc_read_fifo,
};
static char *W6692Ver[] __initdata = static char *W6692Ver[] __initdata =
{"W6692 V00", "W6692 V01", "W6692 V10", {"W6692 V00", "W6692 V01", "W6692 V10",
"W6692 V11"}; "W6692 V11"};
...@@ -221,24 +231,8 @@ W6692_fill_fifo(struct IsdnCardState *cs) ...@@ -221,24 +231,8 @@ W6692_fill_fifo(struct IsdnCardState *cs)
static void static void
W6692B_empty_fifo(struct BCState *bcs, int count) W6692B_empty_fifo(struct BCState *bcs, int count)
{ {
u8 *p; recv_empty_fifo_b(bcs, count);
struct IsdnCardState *cs = bcs->cs; w6692_bc_write_reg(bcs->cs, bcs->channel, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
p = recv_empty_fifo_b(bcs, count);
if (!p) {
w6692_bc_write_reg(cs, bcs->channel, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
return;
}
READW6692BFIFO(cs, bcs->channel, p, count);
w6692_bc_write_reg(cs, bcs->channel, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
if (cs->debug & L1_DEB_HSCX_FIFO) {
char *t = bcs->blog;
t += sprintf(t, "W6692B_empty_fifo %c cnt %d",
bcs->channel + '1', count);
QuickHex(t, p, count);
debugl1(cs, bcs->blog);
}
} }
static void static void
...@@ -859,6 +853,7 @@ setup_w6692(struct IsdnCard *card) ...@@ -859,6 +853,7 @@ setup_w6692(struct IsdnCard *card)
id_list[cs->subtyp].card_name, cs->irq, id_list[cs->subtyp].card_name, cs->irq,
cs->hw.w6692.iobase); cs->hw.w6692.iobase);
cs->bc_hw_ops = &w6692_bc_hw_ops;
cs->bc_l1_ops = &w6692_bc_l1_ops; cs->bc_l1_ops = &w6692_bc_l1_ops;
cs->DC_Send_Data = &W6692_fill_fifo; cs->DC_Send_Data = &W6692_fill_fifo;
cs->cardmsg = &w6692_card_msg; cs->cardmsg = &w6692_card_msg;
......
...@@ -18,9 +18,6 @@ ...@@ -18,9 +18,6 @@
/* B-channel FIFO read/write routines */ /* B-channel FIFO read/write routines */
#define READW6692BFIFO(cs,bchan,ptr,count) \
insb(cs->hw.w6692.iobase+W_B_RFIFO+(bchan?0x40:0),ptr,count)
#define WRITEW6692BFIFO(cs,bchan,ptr,count) \ #define WRITEW6692BFIFO(cs,bchan,ptr,count) \
outsb(cs->hw.w6692.iobase+W_B_XFIFO+(bchan?0x40:0),ptr,count) outsb(cs->hw.w6692.iobase+W_B_XFIFO+(bchan?0x40:0),ptr,count)
......
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