Commit 5b5929cb authored by Jani Nikula's avatar Jani Nikula Committed by Daniel Vetter

drm/i915/chv: remove pre-production hardware workarounds

Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
[danvet: Appease gcc and remove the unused variable.]
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent d39398f5
...@@ -5061,7 +5061,6 @@ static int cherryview_rps_max_freq(struct drm_i915_private *dev_priv) ...@@ -5061,7 +5061,6 @@ static int cherryview_rps_max_freq(struct drm_i915_private *dev_priv)
struct drm_device *dev = dev_priv->dev; struct drm_device *dev = dev_priv->dev;
u32 val, rp0; u32 val, rp0;
if (dev->pdev->revision >= 0x20) {
val = vlv_punit_read(dev_priv, FB_GFX_FMAX_AT_VMAX_FUSE); val = vlv_punit_read(dev_priv, FB_GFX_FMAX_AT_VMAX_FUSE);
switch (INTEL_INFO(dev)->eu_total) { switch (INTEL_INFO(dev)->eu_total) {
...@@ -5080,13 +5079,9 @@ static int cherryview_rps_max_freq(struct drm_i915_private *dev_priv) ...@@ -5080,13 +5079,9 @@ static int cherryview_rps_max_freq(struct drm_i915_private *dev_priv)
rp0 = (val >> FB_GFX_FMAX_AT_VMAX_2SS8EU_FUSE_SHIFT); rp0 = (val >> FB_GFX_FMAX_AT_VMAX_2SS8EU_FUSE_SHIFT);
break; break;
} }
rp0 = (rp0 & FB_GFX_FREQ_FUSE_MASK); rp0 = (rp0 & FB_GFX_FREQ_FUSE_MASK);
} else {
/* For pre-production hardware */
val = vlv_punit_read(dev_priv, PUNIT_GPU_STATUS_REG);
rp0 = (val >> PUNIT_GPU_STATUS_MAX_FREQ_SHIFT) &
PUNIT_GPU_STATUS_MAX_FREQ_MASK;
}
return rp0; return rp0;
} }
...@@ -5102,18 +5097,11 @@ static int cherryview_rps_rpe_freq(struct drm_i915_private *dev_priv) ...@@ -5102,18 +5097,11 @@ static int cherryview_rps_rpe_freq(struct drm_i915_private *dev_priv)
static int cherryview_rps_guar_freq(struct drm_i915_private *dev_priv) static int cherryview_rps_guar_freq(struct drm_i915_private *dev_priv)
{ {
struct drm_device *dev = dev_priv->dev;
u32 val, rp1; u32 val, rp1;
if (dev->pdev->revision >= 0x20) {
val = vlv_punit_read(dev_priv, FB_GFX_FMAX_AT_VMAX_FUSE); val = vlv_punit_read(dev_priv, FB_GFX_FMAX_AT_VMAX_FUSE);
rp1 = (val & FB_GFX_FREQ_FUSE_MASK); rp1 = (val & FB_GFX_FREQ_FUSE_MASK);
} else {
/* For pre-production hardware */
val = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
rp1 = ((val >> PUNIT_GPU_STATUS_MAX_FREQ_SHIFT) &
PUNIT_GPU_STATUS_MAX_FREQ_MASK);
}
return rp1; return rp1;
} }
......
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