drm/amd/display: fix ASSERT() caused by missing registers.

Signed-off-by: Ken Chalmers <ken.chalmers@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

@@ -771,6 +771,7 @@ static void power_on_plane(
 	struct dce_hwseq *hws,
 	int plane_id)
 {
+	if (REG(DC_IP_REQUEST_CNTL)) {
 		REG_SET(DC_IP_REQUEST_CNTL, 0,
 				IP_REQUEST_EN, 1);
 		dpp_pg_control(hws, plane_id, true);
@@ -779,6 +780,7 @@ static void power_on_plane(
 				IP_REQUEST_EN, 0);
 		dm_logger_write(hws->ctx->logger, LOG_DEBUG,
 				"Un-gated front end for pipe %d\n", plane_id);
+	}
 }
 
 static void undo_DEGVIDCN10_253_wa(struct dc *dc)
@@ -1130,6 +1132,7 @@ static void plane_atomic_power_down(struct dc *dc, int fe_idx)
 	struct dce_hwseq *hws = dc->hwseq;
 	struct transform *xfm = dc->res_pool->transforms[fe_idx];
 
+	if (REG(DC_IP_REQUEST_CNTL)) {
 		REG_SET(DC_IP_REQUEST_CNTL, 0,
 				IP_REQUEST_EN, 1);
 		dpp_pg_control(hws, fe_idx, false);
@@ -1142,6 +1145,7 @@ static void plane_atomic_power_down(struct dc *dc, int fe_idx)
 
 		if (dc->debug.sanity_checks)
 			verify_allow_pstate_change_high(dc->hwseq);
+	}
 }