Commit 600ac36b authored by Dan Murphy's avatar Dan Murphy Committed by David S. Miller

net: phy: DP83822: Fix WoL in config init to be disabled

The WoL feature should be disabled when config_init is called and the
feature should turned on or off  when set_wol is called.

In addition updated the calls to modify the registers to use the set_bit
and clear_bit function calls.

Fixes: 3b427751a9d0 ("net: phy: DP83822 initial driver submission")
Signed-off-by: default avatarDan Murphy <dmurphy@ti.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 8f34e53b
...@@ -137,19 +137,18 @@ static int dp83822_set_wol(struct phy_device *phydev, ...@@ -137,19 +137,18 @@ static int dp83822_set_wol(struct phy_device *phydev,
value &= ~DP83822_WOL_SECURE_ON; value &= ~DP83822_WOL_SECURE_ON;
} }
value |= (DP83822_WOL_EN | DP83822_WOL_INDICATION_SEL | /* Clear any pending WoL interrupt */
DP83822_WOL_CLR_INDICATION); phy_read(phydev, MII_DP83822_MISR2);
phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG,
value); value |= DP83822_WOL_EN | DP83822_WOL_INDICATION_SEL |
DP83822_WOL_CLR_INDICATION;
return phy_write_mmd(phydev, DP83822_DEVADDR,
MII_DP83822_WOL_CFG, value);
} else { } else {
value = phy_read_mmd(phydev, DP83822_DEVADDR, return phy_clear_bits_mmd(phydev, DP83822_DEVADDR,
MII_DP83822_WOL_CFG); MII_DP83822_WOL_CFG, DP83822_WOL_EN);
value &= ~DP83822_WOL_EN;
phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG,
value);
} }
return 0;
} }
static void dp83822_get_wol(struct phy_device *phydev, static void dp83822_get_wol(struct phy_device *phydev,
...@@ -258,12 +257,11 @@ static int dp83822_config_intr(struct phy_device *phydev) ...@@ -258,12 +257,11 @@ static int dp83822_config_intr(struct phy_device *phydev)
static int dp83822_config_init(struct phy_device *phydev) static int dp83822_config_init(struct phy_device *phydev)
{ {
int value; int value = DP83822_WOL_EN | DP83822_WOL_MAGIC_EN |
DP83822_WOL_SECURE_ON;
value = DP83822_WOL_MAGIC_EN | DP83822_WOL_SECURE_ON | DP83822_WOL_EN;
return phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG, return phy_clear_bits_mmd(phydev, DP83822_DEVADDR,
value); MII_DP83822_WOL_CFG, value);
} }
static int dp83822_phy_reset(struct phy_device *phydev) static int dp83822_phy_reset(struct phy_device *phydev)
......
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