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Commit 6a302358 authored by Linus Torvalds's avatar Linus Torvalds
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Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6.23 

* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6.23:
  sh: Fix fs.h removal from mm.h regressions.
  sh: fix get_wchan() for SH kernels without framepointers
  sh: arch/sh/boot - fix shell usage
  rtc: rtc-sh: Correct sh_rtc_set_time() for some SH-3 parts.
  sh: remove support for sh7300 and solution engine 7300
  sh: Add sh to the CC_OPTIMIZE_FOR_SIZE dependencies.
  sh: Kill off virt_to_bus()/bus_to_virt().
  sh: sh-sci - fix SH7708 support
  sh: Restrict DSP support to specific CPUs.
  sh: Silence sq compile warning on sh4 nommu.
  sh: Kill the rest of the SE73180 cruft.
  sh: remove support for sh73180 and solution engine 73180
  sh: remove old broken pint code
  sh: Reclaim beginning of P3 space for vmalloc area.
  sh: Fix Dreamcast DMA issues.
  sh: Add kmap_coherent()/kunmap_coherent() interface for SH-4.
parents 8e268f33 e06c4e57
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arch/sh/Kconfig
View file @ 6a302358
...@@ -90,6 +90,9 @@ config ARCH_HAS_ILOG2_U64 ...@@ -90,6 +90,9 @@ config ARCH_HAS_ILOG2_U64
bool bool
default n default n
config ARCH_NO_VIRT_TO_BUS
def_bool y
source "init/Kconfig" source "init/Kconfig"
menu "System type" menu "System type"
...@@ -134,8 +137,8 @@ config SH_FPU_EMU ...@@ -134,8 +137,8 @@ config SH_FPU_EMU
config SH_DSP config SH_DSP
bool "DSP support" bool "DSP support"
default y if SH4AL_DSP || !CPU_SH4 depends on CPU_HAS_DSP
default n default y
help help
Selecting this option will enable support for SH processors that Selecting this option will enable support for SH processors that
have DSP units (ie, SH2-DSP, SH3-DSP, and SH4AL-DSP). have DSP units (ie, SH2-DSP, SH3-DSP, and SH4AL-DSP).
...@@ -172,9 +175,6 @@ config SPECULATIVE_EXECUTION ...@@ -172,9 +175,6 @@ config SPECULATIVE_EXECUTION
config CPU_HAS_INTEVT config CPU_HAS_INTEVT
bool bool
config CPU_HAS_PINT_IRQ
bool
config CPU_HAS_MASKREG_IRQ config CPU_HAS_MASKREG_IRQ
bool bool
...@@ -202,6 +202,9 @@ config CPU_HAS_SR_RB ...@@ -202,6 +202,9 @@ config CPU_HAS_SR_RB
config CPU_HAS_PTEA config CPU_HAS_PTEA
bool bool
config CPU_HAS_DSP
bool
endmenu endmenu
menu "Board support" menu "Board support"
...@@ -261,14 +264,6 @@ config SH_7780_SOLUTION_ENGINE ...@@ -261,14 +264,6 @@ config SH_7780_SOLUTION_ENGINE
Select 7780 SolutionEngine if configuring for a Renesas SH7780 Select 7780 SolutionEngine if configuring for a Renesas SH7780
evaluation board. evaluation board.
config SH_7300_SOLUTION_ENGINE
bool "SolutionEngine7300"
select SOLUTION_ENGINE
depends on CPU_SUBTYPE_SH7300
help
Select 7300 SolutionEngine if configuring for a Hitachi
SH7300(SH-Mobile V) evaluation board.
config SH_7343_SOLUTION_ENGINE config SH_7343_SOLUTION_ENGINE
bool "SolutionEngine7343" bool "SolutionEngine7343"
select SOLUTION_ENGINE select SOLUTION_ENGINE
...@@ -277,14 +272,6 @@ config SH_7343_SOLUTION_ENGINE ...@@ -277,14 +272,6 @@ config SH_7343_SOLUTION_ENGINE
Select 7343 SolutionEngine if configuring for a Hitachi Select 7343 SolutionEngine if configuring for a Hitachi
SH7343 (SH-Mobile 3AS) evaluation board. SH7343 (SH-Mobile 3AS) evaluation board.
config SH_73180_SOLUTION_ENGINE
bool "SolutionEngine73180"
select SOLUTION_ENGINE
depends on CPU_SUBTYPE_SH73180
help
Select 73180 SolutionEngine if configuring for a Hitachi
SH73180(SH-Mobile 3) evaluation board.
config SH_7751_SYSTEMH config SH_7751_SYSTEMH
bool "SystemH7751R" bool "SystemH7751R"
depends on CPU_SUBTYPE_SH7751R depends on CPU_SUBTYPE_SH7751R
...@@ -448,10 +435,10 @@ config SH_TIMER_IRQ ...@@ -448,10 +435,10 @@ config SH_TIMER_IRQ
config SH_PCLK_FREQ config SH_PCLK_FREQ
int "Peripheral clock frequency (in Hz)" int "Peripheral clock frequency (in Hz)"
default "27000000" if CPU_SUBTYPE_SH73180 || CPU_SUBTYPE_SH7343 default "27000000" if CPU_SUBTYPE_SH7343
default "31250000" if CPU_SUBTYPE_SH7619 default "31250000" if CPU_SUBTYPE_SH7619
default "32000000" if CPU_SUBTYPE_SH7722 default "32000000" if CPU_SUBTYPE_SH7722
default "33333333" if CPU_SUBTYPE_SH7300 || CPU_SUBTYPE_SH7770 || \ default "33333333" if CPU_SUBTYPE_SH7770 || \
CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \ CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \
CPU_SUBTYPE_SH7206 CPU_SUBTYPE_SH7206
default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
......
arch/sh/Makefile
View file @ 6a302358
...@@ -91,9 +91,7 @@ machdir-$(CONFIG_SH_SOLUTION_ENGINE) += se/770x ...@@ -91,9 +91,7 @@ machdir-$(CONFIG_SH_SOLUTION_ENGINE) += se/770x
machdir-$(CONFIG_SH_7722_SOLUTION_ENGINE) += se/7722 machdir-$(CONFIG_SH_7722_SOLUTION_ENGINE) += se/7722
machdir-$(CONFIG_SH_7751_SOLUTION_ENGINE) += se/7751 machdir-$(CONFIG_SH_7751_SOLUTION_ENGINE) += se/7751
machdir-$(CONFIG_SH_7780_SOLUTION_ENGINE) += se/7780 machdir-$(CONFIG_SH_7780_SOLUTION_ENGINE) += se/7780
machdir-$(CONFIG_SH_7300_SOLUTION_ENGINE) += se/7300
machdir-$(CONFIG_SH_7343_SOLUTION_ENGINE) += se/7343 machdir-$(CONFIG_SH_7343_SOLUTION_ENGINE) += se/7343
machdir-$(CONFIG_SH_73180_SOLUTION_ENGINE) += se/73180
machdir-$(CONFIG_SH_HP6XX) += hp6xx machdir-$(CONFIG_SH_HP6XX) += hp6xx
machdir-$(CONFIG_SH_DREAMCAST) += dreamcast machdir-$(CONFIG_SH_DREAMCAST) += dreamcast
machdir-$(CONFIG_SH_MPC1211) += mpc1211 machdir-$(CONFIG_SH_MPC1211) += mpc1211
......
arch/sh/boards/se/7300/Makefile deleted 100644 → 0
View file @ 8e268f33
#
# Makefile for the 7300 SolutionEngine specific parts of the kernel
#
obj-y := setup.o io.o irq.o
arch/sh/boards/se/7300/io.c deleted 100644 → 0
View file @ 8e268f33
/*
* arch/sh/boards/se/7300/io.c
*
* Copyright (C) 2003 YOSHII Takashi <yoshii-takashi@hitachi-ul.co.jp>
* Based on arch/sh/kernel/io_shmse.c
*
* I/O routine for SH-Mobile3 73180 SolutionEngine.
*
*/
#include <linux/kernel.h>
#include <asm/io.h>
#include <asm/se7300.h>
#define badio(fn, a) panic("bad i/o operation %s for %08lx.", #fn, a)
struct iop {
unsigned long start, end;
unsigned long base;
struct iop *(*check) (struct iop * p, unsigned long port);
unsigned char (*inb) (struct iop * p, unsigned long port);
unsigned short (*inw) (struct iop * p, unsigned long port);
void (*outb) (struct iop * p, unsigned char value, unsigned long port);
void (*outw) (struct iop * p, unsigned short value, unsigned long port);
};
struct iop *
simple_check(struct iop *p, unsigned long port)
{
if ((p->start <= port) && (port <= p->end))
return p;
else
badio(check, port);
}
struct iop *
ide_check(struct iop *p, unsigned long port)
{
if (((0x1f0 <= port) && (port <= 0x1f7)) || (port == 0x3f7))
return p;
return NULL;
}
unsigned char
simple_inb(struct iop *p, unsigned long port)
{
return *(unsigned char *) (p->base + port);
}
unsigned short
simple_inw(struct iop *p, unsigned long port)
{
return *(unsigned short *) (p->base + port);
}
void
simple_outb(struct iop *p, unsigned char value, unsigned long port)
{
*(unsigned char *) (p->base + port) = value;
}
void
simple_outw(struct iop *p, unsigned short value, unsigned long port)
{
*(unsigned short *) (p->base + port) = value;
}
unsigned char
pcc_inb(struct iop *p, unsigned long port)
{
unsigned long addr = p->base + port + 0x40000;
unsigned long v;
if (port & 1)
addr += 0x00400000;
v = *(volatile unsigned char *) addr;
return v;
}
void
pcc_outb(struct iop *p, unsigned char value, unsigned long port)
{
unsigned long addr = p->base + port + 0x40000;
if (port & 1)
addr += 0x00400000;
*(volatile unsigned char *) addr = value;
}
unsigned char
bad_inb(struct iop *p, unsigned long port)
{
badio(inb, port);
}
void
bad_outb(struct iop *p, unsigned char value, unsigned long port)
{
badio(inw, port);
}
#ifdef CONFIG_SMC91X
/* MSTLANEX01 LAN at 0xb400:0000 */
static struct iop laniop = {
.start = 0x300,
.end = 0x30f,
.base = 0xb4000000,
.check = simple_check,
.inb = simple_inb,
.inw = simple_inw,
.outb = simple_outb,
.outw = simple_outw,
};
#endif
/* NE2000 pc card NIC */
static struct iop neiop = {
.start = 0x280,
.end = 0x29f,
.base = 0xb0600000 + 0x80, /* soft 0x280 -> hard 0x300 */
.check = simple_check,
.inb = pcc_inb,
.inw = simple_inw,
.outb = pcc_outb,
.outw = simple_outw,
};
#ifdef CONFIG_IDE
/* CF in CF slot */
static struct iop cfiop = {
.base = 0xb0600000,
.check = ide_check,
.inb = pcc_inb,
.inw = simple_inw,
.outb = pcc_outb,
.outw = simple_outw,
};
#endif
static __inline__ struct iop *
port2iop(unsigned long port)
{
if (0) ;
#if defined(CONFIG_SMC91X)
else if (laniop.check(&laniop, port))
return &laniop;
#endif
#if defined(CONFIG_NE2000)
else if (neiop.check(&neiop, port))
return &neiop;
#endif
#if defined(CONFIG_IDE)
else if (cfiop.check(&cfiop, port))
return &cfiop;
#endif
else
return &neiop; /* fallback */
}
static inline void
delay(void)
{
ctrl_inw(0xac000000);
ctrl_inw(0xac000000);
}
unsigned char
sh7300se_inb(unsigned long port)
{
struct iop *p = port2iop(port);
return (p->inb) (p, port);
}
unsigned char
sh7300se_inb_p(unsigned long port)
{
unsigned char v = sh7300se_inb(port);
delay();
return v;
}
unsigned short
sh7300se_inw(unsigned long port)
{
struct iop *p = port2iop(port);
return (p->inw) (p, port);
}
unsigned int
sh7300se_inl(unsigned long port)
{
badio(inl, port);
}
void
sh7300se_outb(unsigned char value, unsigned long port)
{
struct iop *p = port2iop(port);
(p->outb) (p, value, port);
}
void
sh7300se_outb_p(unsigned char value, unsigned long port)
{
sh7300se_outb(value, port);
delay();
}
void
sh7300se_outw(unsigned short value, unsigned long port)
{
struct iop *p = port2iop(port);
(p->outw) (p, value, port);
}
void
sh7300se_outl(unsigned int value, unsigned long port)
{
badio(outl, port);
}
void
sh7300se_insb(unsigned long port, void *addr, unsigned long count)
{
unsigned char *a = addr;
struct iop *p = port2iop(port);
while (count--)
*a++ = (p->inb) (p, port);
}
void
sh7300se_insw(unsigned long port, void *addr, unsigned long count)
{
unsigned short *a = addr;
struct iop *p = port2iop(port);
while (count--)
*a++ = (p->inw) (p, port);
}
void
sh7300se_insl(unsigned long port, void *addr, unsigned long count)
{
badio(insl, port);
}
void
sh7300se_outsb(unsigned long port, const void *addr, unsigned long count)
{
unsigned char *a = (unsigned char *) addr;
struct iop *p = port2iop(port);
while (count--)
(p->outb) (p, *a++, port);
}
void
sh7300se_outsw(unsigned long port, const void *addr, unsigned long count)
{
unsigned short *a = (unsigned short *) addr;
struct iop *p = port2iop(port);
while (count--)
(p->outw) (p, *a++, port);
}
void
sh7300se_outsl(unsigned long port, const void *addr, unsigned long count)
{
badio(outsw, port);
}
arch/sh/boards/se/7300/irq.c deleted 100644 → 0
View file @ 8e268f33
/*
* linux/arch/sh/boards/se/7300/irq.c
*
* Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
*
* SH-Mobile SolutionEngine 7300 Support.
*
*/
#include <linux/init.h>
#include <linux/irq.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/se7300.h>
static struct ipr_data se7300_ipr_map[] = {
/* PC_IRQ[0-3] -> IRQ0 (32) */
{ IRQ0_IRQ, IRQ0_IPR_ADDR, IRQ0_IPR_POS, 0x0f - IRQ0_IRQ },
/* A_IRQ[0-3] -> IRQ1 (33) */
{ IRQ1_IRQ, IRQ1_IPR_ADDR, IRQ1_IPR_POS, 0x0f - IRQ1_IRQ },
{ SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY },
{ DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY },
{ DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY },
{ VIO_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY },
};
/*
* Initialize IRQ setting
*/
void __init
init_7300se_IRQ(void)
{
ctrl_outw(0x0028, PA_EPLD_MODESET); /* mode set IRQ0,1 active low. */
ctrl_outw(0xa000, INTC_ICR1); /* IRQ mode; IRQ0,1 enable. */
ctrl_outw(0x0000, PORT_PFCR); /* use F for IRQ[3:0] and SIU. */
make_ipr_irq(se7300_ipr_map, ARRAY_SIZE(se7300_ipr_map));
ctrl_outw(0x2000, PA_MRSHPC + 0x0c); /* mrshpc irq enable */
}
arch/sh/boards/se/7300/setup.c deleted 100644 → 0
View file @ 8e268f33
/*
* linux/arch/sh/boards/se/7300/setup.c
*
* Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
*
* SH-Mobile SolutionEngine 7300 Support.
*
*/
#include <linux/init.h>
#include <linux/platform_device.h>
#include <asm/machvec.h>
#include <asm/se7300.h>
void init_7300se_IRQ(void);
static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
static struct resource heartbeat_resources[] = {
[0] = {
.start = PA_LED,
.end = PA_LED + ARRAY_SIZE(heartbeat_bit_pos) - 1,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device heartbeat_device = {
.name = "heartbeat",
.id = -1,
.dev = {
.platform_data = heartbeat_bit_pos,
},
.num_resources = ARRAY_SIZE(heartbeat_resources),
.resource = heartbeat_resources,
};
static struct platform_device *se7300_devices[] __initdata = {
&heartbeat_device,
};
static int __init se7300_devices_setup(void)
{
return platform_add_devices(se7300_devices, ARRAY_SIZE(se7300_devices));
}
__initcall(se7300_devices_setup);
/*
* The Machine Vector
*/
static struct sh_machine_vector mv_7300se __initmv = {
.mv_name = "SolutionEngine 7300",
.mv_nr_irqs = 109,
.mv_inb = sh7300se_inb,
.mv_inw = sh7300se_inw,
.mv_inl = sh7300se_inl,
.mv_outb = sh7300se_outb,
.mv_outw = sh7300se_outw,
.mv_outl = sh7300se_outl,
.mv_inb_p = sh7300se_inb_p,
.mv_inw_p = sh7300se_inw,
.mv_inl_p = sh7300se_inl,
.mv_outb_p = sh7300se_outb_p,
.mv_outw_p = sh7300se_outw,
.mv_outl_p = sh7300se_outl,
.mv_insb = sh7300se_insb,
.mv_insw = sh7300se_insw,
.mv_insl = sh7300se_insl,
.mv_outsb = sh7300se_outsb,
.mv_outsw = sh7300se_outsw,
.mv_outsl = sh7300se_outsl,
.mv_init_irq = init_7300se_IRQ,
};
arch/sh/boards/se/73180/Makefile deleted 100644 → 0
View file @ 8e268f33
#
# Makefile for the 73180 SolutionEngine specific parts of the kernel
#
obj-y := setup.o io.o irq.o
arch/sh/boards/se/73180/io.c deleted 100644 → 0
View file @ 8e268f33
/*
* arch/sh/boards/se/73180/io.c
*
* Copyright (C) 2003 YOSHII Takashi <yoshii-takashi@hitachi-ul.co.jp>
* Based on arch/sh/boards/se/7300/io.c
*
* I/O routine for SH-Mobile3 73180 SolutionEngine.
*
*/
#include <linux/kernel.h>
#include <asm/mach/se73180.h>
#include <asm/io.h>
#define badio(fn, a) panic("bad i/o operation %s for %08lx.", #fn, a)
struct iop {
unsigned long start, end;
unsigned long base;
struct iop *(*check) (struct iop * p, unsigned long port);
unsigned char (*inb) (struct iop * p, unsigned long port);
unsigned short (*inw) (struct iop * p, unsigned long port);
void (*outb) (struct iop * p, unsigned char value, unsigned long port);
void (*outw) (struct iop * p, unsigned short value, unsigned long port);
};
struct iop *
simple_check(struct iop *p, unsigned long port)
{
if ((p->start <= port) && (port <= p->end))
return p;
else
badio(check, port);
}
struct iop *
ide_check(struct iop *p, unsigned long port)
{
if (((0x1f0 <= port) && (port <= 0x1f7)) || (port == 0x3f7))
return p;
return NULL;
}
unsigned char
simple_inb(struct iop *p, unsigned long port)
{
return *(unsigned char *) (p->base + port);
}
unsigned short
simple_inw(struct iop *p, unsigned long port)
{
return *(unsigned short *) (p->base + port);
}
void
simple_outb(struct iop *p, unsigned char value, unsigned long port)
{
*(unsigned char *) (p->base + port) = value;
}
void
simple_outw(struct iop *p, unsigned short value, unsigned long port)
{
*(unsigned short *) (p->base + port) = value;
}
unsigned char
pcc_inb(struct iop *p, unsigned long port)
{
unsigned long addr = p->base + port + 0x40000;
unsigned long v;
if (port & 1)
addr += 0x00400000;
v = *(volatile unsigned char *) addr;
return v;
}
void
pcc_outb(struct iop *p, unsigned char value, unsigned long port)
{
unsigned long addr = p->base + port + 0x40000;
if (port & 1)
addr += 0x00400000;
*(volatile unsigned char *) addr = value;
}
unsigned char
bad_inb(struct iop *p, unsigned long port)
{
badio(inb, port);
}
void
bad_outb(struct iop *p, unsigned char value, unsigned long port)
{
badio(inw, port);
}
#ifdef CONFIG_SMC91X
/* MSTLANEX01 LAN at 0xb400:0000 */
static struct iop laniop = {
.start = 0x300,
.end = 0x30f,
.base = 0xb4000000,
.check = simple_check,
.inb = simple_inb,
.inw = simple_inw,
.outb = simple_outb,
.outw = simple_outw,
};
#endif
/* NE2000 pc card NIC */
static struct iop neiop = {
.start = 0x280,
.end = 0x29f,
.base = 0xb0600000 + 0x80, /* soft 0x280 -> hard 0x300 */
.check = simple_check,
.inb = pcc_inb,
.inw = simple_inw,
.outb = pcc_outb,
.outw = simple_outw,
};
#ifdef CONFIG_IDE
/* CF in CF slot */
static struct iop cfiop = {
.base = 0xb0600000,
.check = ide_check,
.inb = pcc_inb,
.inw = simple_inw,
.outb = pcc_outb,
.outw = simple_outw,
};
#endif
static __inline__ struct iop *
port2iop(unsigned long port)
{
if (0) ;
#if defined(CONFIG_SMC91X)
else if (laniop.check(&laniop, port))
return &laniop;
#endif
#if defined(CONFIG_NE2000)
else if (neiop.check(&neiop, port))
return &neiop;
#endif
#if defined(CONFIG_IDE)
else if (cfiop.check(&cfiop, port))
return &cfiop;
#endif
else
return &neiop; /* fallback */
}
static inline void
delay(void)
{
ctrl_inw(0xac000000);
ctrl_inw(0xac000000);
}
unsigned char
sh73180se_inb(unsigned long port)
{
struct iop *p = port2iop(port);
return (p->inb) (p, port);
}
unsigned char
sh73180se_inb_p(unsigned long port)
{
unsigned char v = sh73180se_inb(port);
delay();
return v;
}
unsigned short
sh73180se_inw(unsigned long port)
{
struct iop *p = port2iop(port);
return (p->inw) (p, port);
}
unsigned int
sh73180se_inl(unsigned long port)
{
badio(inl, port);
}
void
sh73180se_outb(unsigned char value, unsigned long port)
{
struct iop *p = port2iop(port);
(p->outb) (p, value, port);
}
void
sh73180se_outb_p(unsigned char value, unsigned long port)
{
sh73180se_outb(value, port);
delay();
}
void
sh73180se_outw(unsigned short value, unsigned long port)
{
struct iop *p = port2iop(port);
(p->outw) (p, value, port);
}
void
sh73180se_outl(unsigned int value, unsigned long port)
{
badio(outl, port);
}
void
sh73180se_insb(unsigned long port, void *addr, unsigned long count)
{
unsigned char *a = addr;
struct iop *p = port2iop(port);
while (count--)
*a++ = (p->inb) (p, port);
}
void
sh73180se_insw(unsigned long port, void *addr, unsigned long count)
{
unsigned short *a = addr;
struct iop *p = port2iop(port);
while (count--)
*a++ = (p->inw) (p, port);
}
void
sh73180se_insl(unsigned long port, void *addr, unsigned long count)
{
badio(insl, port);
}
void
sh73180se_outsb(unsigned long port, const void *addr, unsigned long count)
{
unsigned char *a = (unsigned char *) addr;
struct iop *p = port2iop(port);
while (count--)
(p->outb) (p, *a++, port);
}
void
sh73180se_outsw(unsigned long port, const void *addr, unsigned long count)
{
unsigned short *a = (unsigned short *) addr;
struct iop *p = port2iop(port);
while (count--)
(p->outw) (p, *a++, port);
}
void
sh73180se_outsl(unsigned long port, const void *addr, unsigned long count)
{
badio(outsw, port);
}
arch/sh/boards/se/73180/irq.c deleted 100644 → 0
View file @ 8e268f33
/*
* arch/sh/boards/se/73180/irq.c
*
* Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
* Based on arch/sh/boards/se/7300/irq.c
*
* Modified for SH-Mobile SolutionEngine 73180 Support
* by YOSHII Takashi <yoshii-takashi@hitachi-ul.co.jp>
*
*/
#include <linux/init.h>
#include <linux/irq.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/mach/se73180.h>
static int
irq2intreq(int irq)
{
if (irq == 10)
return 5;
return 7 - (irq - 32);
}
static void
disable_intreq_irq(unsigned int irq)
{
ctrl_outb(1 << (7 - irq2intreq(irq)), INTMSK0);
}
static void
enable_intreq_irq(unsigned int irq)
{
ctrl_outb(1 << (7 - irq2intreq(irq)), INTMSKCLR0);
}
static void
mask_and_ack_intreq_irq(unsigned int irq)
{
disable_intreq_irq(irq);
}
static unsigned int
startup_intreq_irq(unsigned int irq)
{
enable_intreq_irq(irq);
return 0;
}
static void
shutdown_intreq_irq(unsigned int irq)
{
disable_intreq_irq(irq);
}
static void
end_intreq_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
enable_intreq_irq(irq);
}
static struct hw_interrupt_type intreq_irq_type = {
.typename = "intreq",
.startup = startup_intreq_irq,
.shutdown = shutdown_intreq_irq,
.enable = enable_intreq_irq,
.disable = disable_intreq_irq,
.ack = mask_and_ack_intreq_irq,
.end = end_intreq_irq
};
void
make_intreq_irq(unsigned int irq)
{
disable_irq_nosync(irq);
irq_desc[irq].chip = &intreq_irq_type;
disable_intreq_irq(irq);
}
int
shmse_irq_demux(int irq)
{
if (irq == IRQ5_IRQ)
return 10;
return irq;
}
static struct ipr_data se73180_siof0_ipr_map[] = {
{ SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY },
};
static struct ipr_data se73180_vpu_ipr_map[] = {
{ VPU_IRQ, VPU_IPR_ADDR, VPU_IPR_POS, 8 },
};
static struct ipr_data se73180_other_ipr_map[] = {
{ DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY },
{ DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY },
{ DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY },
{ IIC0_ALI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY },
{ IIC0_TACKI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY },
{ IIC0_WAITI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY },
{ IIC0_DTEI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY },
{ SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY },
{ SIU_IRQ, SIU_IPR_ADDR, SIU_IPR_POS, SIU_PRIORITY },
/* VIO interrupt */
{ CEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY },
{ BEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY },
{ VEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY },
{ LCDC_IRQ, LCDC_IPR_ADDR, LCDC_IPR_POS, LCDC_PRIORITY },
};
/*
* Initialize IRQ setting
*/
void __init
init_73180se_IRQ(void)
{
make_ipr_irq(se73180_siof0_ipr_map, ARRAY_SIZE(se73180_siof0_ipr_map));
ctrl_outw(0x2000, 0xb03fffec); /* mrshpc irq enable */
ctrl_outw(0x2000, 0xb07fffec); /* mrshpc irq enable */
ctrl_outl(3 << ((7 - 5) * 4), INTC_INTPRI0); /* irq5 pri=3 */
ctrl_outw(2 << ((7 - 5) * 2), INTC_ICR1); /* low-level irq */
make_intreq_irq(10);
make_ipr_irq(se73180_vpu_ipr_map, ARRAY_SIZE(se73180_vpu_ipr_map));
ctrl_outb(0x0f, INTC_IMCR5); /* enable SCIF IRQ */
make_ipr_irq(se73180_other_ipr_map, ARRAY_SIZE(se73180_other_ipr_map));
ctrl_outw(0x2000, PA_MRSHPC + 0x0c); /* mrshpc irq enable */
}
arch/sh/boards/se/73180/setup.c deleted 100644 → 0
View file @ 8e268f33
/*
* arch/sh/boards/se/73180/setup.c
*
* Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
* Based on arch/sh/setup_shmse.c
*
* Modified for 73180 SolutionEngine
* by YOSHII Takashi <yoshii-takashi@hitachi-ul.co.jp>
*
*/
#include <linux/init.h>
#include <linux/platform_device.h>
#include <asm/machvec.h>
#include <asm/se73180.h>
#include <asm/irq.h>
void init_73180se_IRQ(void);
static struct resource heartbeat_resources[] = {
[0] = {
.start = PA_LED,
.end = PA_LED + 8 - 1,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device heartbeat_device = {
.name = "heartbeat",
.id = -1,
.num_resources = ARRAY_SIZE(heartbeat_resources),
.resource = heartbeat_resources,
};
static struct platform_device *se73180_devices[] __initdata = {
&heartbeat_device,
};
static int __init se73180_devices_setup(void)
{
return platform_add_devices(se73180_devices,
ARRAY_SIZE(se73180_devices));
}
__initcall(se73180_devices_setup);
/*
* The Machine Vector
*/
static struct sh_machine_vector mv_73180se __initmv = {
.mv_name = "SolutionEngine 73180",
.mv_nr_irqs = 108,
.mv_inb = sh73180se_inb,
.mv_inw = sh73180se_inw,
.mv_inl = sh73180se_inl,
.mv_outb = sh73180se_outb,
.mv_outw = sh73180se_outw,
.mv_outl = sh73180se_outl,
.mv_inb_p = sh73180se_inb_p,
.mv_inw_p = sh73180se_inw,
.mv_inl_p = sh73180se_inl,
.mv_outb_p = sh73180se_outb_p,
.mv_outw_p = sh73180se_outw,
.mv_outl_p = sh73180se_outl,
.mv_insb = sh73180se_insb,
.mv_insw = sh73180se_insw,
.mv_insl = sh73180se_insl,
.mv_outsb = sh73180se_outsb,
.mv_outsw = sh73180se_outsw,
.mv_outsl = sh73180se_outsl,
.mv_init_irq = init_73180se_IRQ,
.mv_irq_demux = shmse_irq_demux,
};
arch/sh/boot/Makefile
View file @ 6a302358
...@@ -32,9 +32,10 @@ $(obj)/zImage: $(obj)/compressed/vmlinux FORCE ...@@ -32,9 +32,10 @@ $(obj)/zImage: $(obj)/compressed/vmlinux FORCE
$(obj)/compressed/vmlinux: FORCE $(obj)/compressed/vmlinux: FORCE
$(Q)$(MAKE) $(build)=$(obj)/compressed $@ $(Q)$(MAKE) $(build)=$(obj)/compressed $@
KERNEL_LOAD := $(shell printf "0x%8x" $$[$(CONFIG_PAGE_OFFSET) + \ KERNEL_LOAD := $(shell /bin/bash -c 'printf "0x%8x" \
$$[$(CONFIG_PAGE_OFFSET) + \
$(CONFIG_MEMORY_START) + \ $(CONFIG_MEMORY_START) + \
$(CONFIG_ZERO_PAGE_OFFSET)+0x1000]) $(CONFIG_ZERO_PAGE_OFFSET)+0x1000]')
quiet_cmd_uimage = UIMAGE $@ quiet_cmd_uimage = UIMAGE $@
cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A sh -O linux -T kernel \ cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A sh -O linux -T kernel \
......
arch/sh/boot/compressed/Makefile
View file @ 6a302358
...@@ -16,9 +16,10 @@ endif ...@@ -16,9 +16,10 @@ endif
# #
# IMAGE_OFFSET is the load offset of the compression loader # IMAGE_OFFSET is the load offset of the compression loader
# #
IMAGE_OFFSET := $(shell printf "0x%08x" $$[$(CONFIG_PAGE_OFFSET) + \ IMAGE_OFFSET := $(shell /bin/bash -c 'printf "0x%08x" \
$$[$(CONFIG_PAGE_OFFSET) + \
$(CONFIG_MEMORY_START) + \ $(CONFIG_MEMORY_START) + \
$(CONFIG_BOOT_LINK_OFFSET)]) $(CONFIG_BOOT_LINK_OFFSET)]')
LIBGCC := $(shell $(CC) $(CFLAGS) -print-libgcc-file-name) LIBGCC := $(shell $(CC) $(CFLAGS) -print-libgcc-file-name)
......
arch/sh/configs/se7300_defconfig deleted 100644 → 0
View file @ 8e268f33
This diff is collapsed.
arch/sh/configs/se73180_defconfig deleted 100644 → 0
View file @ 8e268f33
This diff is collapsed.
arch/sh/drivers/dma/dma-api.c
View file @ 6a302358
...@@ -31,8 +31,8 @@ struct dma_info *get_dma_info(unsigned int chan) ...@@ -31,8 +31,8 @@ struct dma_info *get_dma_info(unsigned int chan)
* the channel is. * the channel is.
*/ */
list_for_each_entry(info, &registered_dmac_list, list) { list_for_each_entry(info, &registered_dmac_list, list) {
if ((chan < info->first_channel_nr) || if ((chan < info->first_vchannel_nr) ||
(chan >= info->first_channel_nr + info->nr_channels)) (chan >= info->first_vchannel_nr + info->nr_channels))
continue; continue;
return info; return info;
...@@ -82,7 +82,7 @@ struct dma_channel *get_dma_channel(unsigned int chan) ...@@ -82,7 +82,7 @@ struct dma_channel *get_dma_channel(unsigned int chan)
for (i = 0; i < info->nr_channels; i++) { for (i = 0; i < info->nr_channels; i++) {
channel = &info->channels[i]; channel = &info->channels[i];
if (channel->chan == chan) if (channel->vchan == chan)
return channel; return channel;
} }
...@@ -369,6 +369,7 @@ int register_dmac(struct dma_info *info) ...@@ -369,6 +369,7 @@ int register_dmac(struct dma_info *info)
} }
total_channels = get_nr_channels(); total_channels = get_nr_channels();
info->first_vchannel_nr = total_channels;
for (i = 0; i < info->nr_channels; i++) { for (i = 0; i < info->nr_channels; i++) {
struct dma_channel *chan = &info->channels[i]; struct dma_channel *chan = &info->channels[i];
......
arch/sh/kernel/cpu/irq/Makefile
View file @ 6a302358
...@@ -4,7 +4,6 @@ ...@@ -4,7 +4,6 @@
obj-y += imask.o obj-y += imask.o
obj-$(CONFIG_CPU_HAS_IPR_IRQ) += ipr.o obj-$(CONFIG_CPU_HAS_IPR_IRQ) += ipr.o
obj-$(CONFIG_CPU_HAS_PINT_IRQ) += pint.o
obj-$(CONFIG_CPU_HAS_MASKREG_IRQ) += maskreg.o obj-$(CONFIG_CPU_HAS_MASKREG_IRQ) += maskreg.o
obj-$(CONFIG_CPU_HAS_INTC_IRQ) += intc.o obj-$(CONFIG_CPU_HAS_INTC_IRQ) += intc.o
obj-$(CONFIG_CPU_HAS_INTC2_IRQ) += intc2.o obj-$(CONFIG_CPU_HAS_INTC2_IRQ) += intc2.o
arch/sh/kernel/cpu/irq/ipr.c
View file @ 6a302358
...@@ -8,7 +8,7 @@ ...@@ -8,7 +8,7 @@
* *
* Supported system: * Supported system:
* On-chip supporting modules (TMU, RTC, etc.). * On-chip supporting modules (TMU, RTC, etc.).
* On-chip supporting modules for SH7709/SH7709A/SH7729/SH7300. * On-chip supporting modules for SH7709/SH7709A/SH7729.
* Hitachi SolutionEngine external I/O: * Hitachi SolutionEngine external I/O:
* MS7709SE01, MS7709ASE01, and MS7750SE01 * MS7709SE01, MS7709ASE01, and MS7750SE01
* *
......
arch/sh/kernel/cpu/irq/pint.c deleted 100644 → 0
View file @ 8e268f33
/*
* arch/sh/kernel/cpu/irq/pint.c - Interrupt handling for PINT-based IRQs.
*
* Copyright (C) 1999 Niibe Yutaka & Takeshi Yaegashi
* Copyright (C) 2000 Kazumoto Kojima
* Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/module.h>
#include <asm/system.h>
#include <asm/io.h>
#include <asm/machvec.h>
#if defined(CONFIG_CPU_SUBTYPE_SH7705)
#define INTC_INTER 0xA4000014UL
#define INTC_IPRD 0xA4000018UL
#define INTC_ICR2 0xA4000012UL
/* PFC */
#define PORT_PACR 0xA4000100UL
#define PORT_PBCR 0xA4000102UL
#define PORT_PCCR 0xA4000104UL
#define PORT_PDCR 0xA4000106UL
#define PORT_PECR 0xA4000108UL
#define PORT_PFCR 0xA400010AUL
#define PORT_PGCR 0xA400010CUL
#define PORT_PHCR 0xA400010EUL
#define PORT_PJCR 0xA4000110UL
#define PORT_PKCR 0xA4000112UL
#define PORT_PLCR 0xA4000114UL
#define PORT_PMCR 0xA4000118UL
#define PORT_PNCR 0xA400011AUL
#define PORT_PECR2 0xA4050148UL
#define PORT_PFCR2 0xA405014AUL
#define PORT_PNCR2 0xA405015AUL
/* I/O port */
#define PORT_PADR 0xA4000120UL
#define PORT_PBDR 0xA4000122UL
#define PORT_PCDR 0xA4000124UL
#define PORT_PDDR 0xA4000126UL
#define PORT_PEDR 0xA4000128UL
#define PORT_PFDR 0xA400012AUL
#define PORT_PGDR 0xA400012CUL
#define PORT_PHDR 0xA400012EUL
#define PORT_PJDR 0xA4000130UL
#define PORT_PKDR 0xA4000132UL
#define PORT_PLDR 0xA4000134UL
#define PORT_PMDR 0xA4000138UL
#define PORT_PNDR 0xA400013AUL
#define PINT0_IRQ 40
#define PINT8_IRQ 41
#define PINT_IRQ_BASE 86
#define PINT0_IPR_ADDR INTC_IPRD
#define PINT0_IPR_POS 3
#define PINT0_PRIORITY 2
#define PINT8_IPR_ADDR INTC_IPRD
#define PINT8_IPR_POS 2
#define PINT8_PRIORITY 2
#endif /* CONFIG_CPU_SUBTYPE_SH7705 */
static unsigned char pint_map[256];
static unsigned long portcr_mask;
static void enable_pint_irq(unsigned int irq);
static void disable_pint_irq(unsigned int irq);
/* shutdown is same as "disable" */
#define shutdown_pint_irq disable_pint_irq
static void mask_and_ack_pint(unsigned int);
static void end_pint_irq(unsigned int irq);
static unsigned int startup_pint_irq(unsigned int irq)
{
enable_pint_irq(irq);
return 0; /* never anything pending */
}
static struct hw_interrupt_type pint_irq_type = {
.typename = "PINT-IRQ",
.startup = startup_pint_irq,
.shutdown = shutdown_pint_irq,
.enable = enable_pint_irq,
.disable = disable_pint_irq,
.ack = mask_and_ack_pint,
.end = end_pint_irq
};
static void disable_pint_irq(unsigned int irq)
{
unsigned long val;
val = ctrl_inw(INTC_INTER);
val &= ~(1 << (irq - PINT_IRQ_BASE));
ctrl_outw(val, INTC_INTER); /* disable PINTn */
portcr_mask &= ~(3 << (irq - PINT_IRQ_BASE)*2);
}
static void enable_pint_irq(unsigned int irq)
{
unsigned long val;
val = ctrl_inw(INTC_INTER);
val |= 1 << (irq - PINT_IRQ_BASE);
ctrl_outw(val, INTC_INTER); /* enable PINTn */
portcr_mask |= 3 << (irq - PINT_IRQ_BASE)*2;
}
static void mask_and_ack_pint(unsigned int irq)
{
disable_pint_irq(irq);
}
static void end_pint_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
enable_pint_irq(irq);
}
void make_pint_irq(unsigned int irq)
{
disable_irq_nosync(irq);
irq_desc[irq].chip = &pint_irq_type;
disable_pint_irq(irq);
}
static struct ipr_data pint_ipr_map[] = {
{ PINT0_IRQ, PINT0_IPR_ADDR, PINT0_IPR_POS, PINT0_PRIORITY },
{ PINT8_IRQ, PINT8_IPR_ADDR, PINT8_IPR_POS, PINT8_PRIORITY },
};
void __init init_IRQ_pint(void)
{
int i;
make_ipr_irq(pint_ipr_map, ARRAY_SIZE(pint_ipr_map));
enable_irq(PINT0_IRQ);
enable_irq(PINT8_IRQ);
for(i = 0; i < 16; i++)
make_pint_irq(PINT_IRQ_BASE + i);
for(i = 0; i < 256; i++) {
if (i & 1)
pint_map[i] = 0;
else if (i & 2)
pint_map[i] = 1;
else if (i & 4)
pint_map[i] = 2;
else if (i & 8)
pint_map[i] = 3;
else if (i & 0x10)
pint_map[i] = 4;
else if (i & 0x20)
pint_map[i] = 5;
else if (i & 0x40)
pint_map[i] = 6;
else if (i & 0x80)
pint_map[i] = 7;
}
}
int ipr_irq_demux(int irq)
{
unsigned long creg, dreg, d, sav;
if (irq == PINT0_IRQ) {
#if defined(CONFIG_CPU_SUBTYPE_SH7705) || defined(CONFIG_CPU_SUBTYPE_SH7707)
creg = PORT_PACR;
dreg = PORT_PADR;
#else
creg = PORT_PCCR;
dreg = PORT_PCDR;
#endif
sav = ctrl_inw(creg);
ctrl_outw(sav | portcr_mask, creg);
d = (~ctrl_inb(dreg) ^ ctrl_inw(INTC_ICR2)) &
ctrl_inw(INTC_INTER) & 0xff;
ctrl_outw(sav, creg);
if (d == 0)
return irq;
return PINT_IRQ_BASE + pint_map[d];
} else if (irq == PINT8_IRQ) {
#if defined(CONFIG_CPU_SUBTYPE_SH7705) || defined(CONFIG_CPU_SUBTYPE_SH7707)
creg = PORT_PBCR;
dreg = PORT_PBDR;
#else
creg = PORT_PFCR;
dreg = PORT_PFDR;
#endif
sav = ctrl_inw(creg);
ctrl_outw(sav | (portcr_mask >> 16), creg);
d = (~ctrl_inb(dreg) ^ (ctrl_inw(INTC_ICR2) >> 8)) &
(ctrl_inw(INTC_INTER) >> 8) & 0xff;
ctrl_outw(sav, creg);
if (d == 0)
return irq;
return PINT_IRQ_BASE + 8 + pint_map[d];
}
return irq;
}
arch/sh/kernel/cpu/sh3/Makefile
View file @ 6a302358
...@@ -10,16 +10,14 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7706) += setup-sh7709.o ...@@ -10,16 +10,14 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7706) += setup-sh7709.o
obj-$(CONFIG_CPU_SUBTYPE_SH7707) += setup-sh7709.o obj-$(CONFIG_CPU_SUBTYPE_SH7707) += setup-sh7709.o
obj-$(CONFIG_CPU_SUBTYPE_SH7708) += setup-sh7708.o obj-$(CONFIG_CPU_SUBTYPE_SH7708) += setup-sh7708.o
obj-$(CONFIG_CPU_SUBTYPE_SH7709) += setup-sh7709.o obj-$(CONFIG_CPU_SUBTYPE_SH7709) += setup-sh7709.o
obj-$(CONFIG_CPU_SUBTYPE_SH7300) += setup-sh7300.o
obj-$(CONFIG_CPU_SUBTYPE_SH7710) += setup-sh7710.o obj-$(CONFIG_CPU_SUBTYPE_SH7710) += setup-sh7710.o
obj-$(CONFIG_CPU_SUBTYPE_SH7712) += setup-sh7710.o obj-$(CONFIG_CPU_SUBTYPE_SH7712) += setup-sh7710.o
# Primary on-chip clocks (common) # Primary on-chip clocks (common)
clock-$(CONFIG_CPU_SH3) := clock-sh3.o clock-$(CONFIG_CPU_SH3) := clock-sh3.o
clock-$(CONFIG_CPU_SUBTYPE_SH7300) := clock-sh7300.o
clock-$(CONFIG_CPU_SUBTYPE_SH7705) := clock-sh7705.o clock-$(CONFIG_CPU_SUBTYPE_SH7705) := clock-sh7705.o
clock-$(CONFIG_CPU_SUBTYPE_SH7706) := clock-sh7706.o clock-$(CONFIG_CPU_SUBTYPE_SH7706) := clock-sh7706.o
clock-$(CONFIG_CPU_SUBTYPE_SH7709) := clock-sh7709.o clock-$(CONFIG_CPU_SUBTYPE_SH7709) := clock-sh7709.o
clock-$(CONFIG_CPU_SUBTYPE_SH7710) := clock-sh7300.o clock-$(CONFIG_CPU_SUBTYPE_SH7710) := clock-sh7710.o
obj-y += $(clock-y) obj-y += $(clock-y)
arch/sh/kernel/cpu/sh3/clock-sh7300.c → arch/sh/kernel/cpu/sh3/clock-sh7710.c
View file @ 6a302358
/* /*
* arch/sh/kernel/cpu/sh3/clock-sh7300.c * arch/sh/kernel/cpu/sh3/clock-sh7710.c
* *
* SH7300 support for the clock framework * SH7710 support for the clock framework
* *
* Copyright (C) 2005 Paul Mundt * Copyright (C) 2005 Paul Mundt
* *
...@@ -29,7 +29,7 @@ static void master_clk_init(struct clk *clk) ...@@ -29,7 +29,7 @@ static void master_clk_init(struct clk *clk)
clk->rate *= md_table[ctrl_inw(FRQCR) & 0x0007]; clk->rate *= md_table[ctrl_inw(FRQCR) & 0x0007];
} }
static struct clk_ops sh7300_master_clk_ops = { static struct clk_ops sh7710_master_clk_ops = {
.init = master_clk_init, .init = master_clk_init,
}; };
...@@ -39,7 +39,7 @@ static void module_clk_recalc(struct clk *clk) ...@@ -39,7 +39,7 @@ static void module_clk_recalc(struct clk *clk)
clk->rate = clk->parent->rate / md_table[idx]; clk->rate = clk->parent->rate / md_table[idx];
} }
static struct clk_ops sh7300_module_clk_ops = { static struct clk_ops sh7710_module_clk_ops = {
.recalc = module_clk_recalc, .recalc = module_clk_recalc,
}; };
...@@ -49,7 +49,7 @@ static void bus_clk_recalc(struct clk *clk) ...@@ -49,7 +49,7 @@ static void bus_clk_recalc(struct clk *clk)
clk->rate = clk->parent->rate / md_table[idx]; clk->rate = clk->parent->rate / md_table[idx];
} }
static struct clk_ops sh7300_bus_clk_ops = { static struct clk_ops sh7710_bus_clk_ops = {
.recalc = bus_clk_recalc, .recalc = bus_clk_recalc,
}; };
...@@ -59,20 +59,20 @@ static void cpu_clk_recalc(struct clk *clk) ...@@ -59,20 +59,20 @@ static void cpu_clk_recalc(struct clk *clk)
clk->rate = clk->parent->rate / md_table[idx]; clk->rate = clk->parent->rate / md_table[idx];
} }
static struct clk_ops sh7300_cpu_clk_ops = { static struct clk_ops sh7710_cpu_clk_ops = {
.recalc = cpu_clk_recalc, .recalc = cpu_clk_recalc,
}; };
static struct clk_ops *sh7300_clk_ops[] = { static struct clk_ops *sh7710_clk_ops[] = {
&sh7300_master_clk_ops, &sh7710_master_clk_ops,
&sh7300_module_clk_ops, &sh7710_module_clk_ops,
&sh7300_bus_clk_ops, &sh7710_bus_clk_ops,
&sh7300_cpu_clk_ops, &sh7710_cpu_clk_ops,
}; };
void __init arch_init_clk_ops(struct clk_ops **ops, int idx) void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
{ {
if (idx < ARRAY_SIZE(sh7300_clk_ops)) if (idx < ARRAY_SIZE(sh7710_clk_ops))
*ops = sh7300_clk_ops[idx]; *ops = sh7710_clk_ops[idx];
} }
arch/sh/kernel/cpu/sh3/setup-sh7300.c deleted 100644 → 0
View file @ 8e268f33
/*
* SH7300 Setup
*
* Copyright (C) 2006 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/platform_device.h>
#include <linux/init.h>
#include <linux/serial.h>
#include <asm/sci.h>
static struct plat_sci_port sci_platform_data[] = {
{
.mapbase = 0xa4430000,
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCI,
.irqs = { 80, 80, 80, 80 },
}, {
.flags = 0,
}
};
static struct platform_device sci_device = {
.name = "sh-sci",
.id = -1,
.dev = {
.platform_data = sci_platform_data,
},
};
static struct platform_device *sh7300_devices[] __initdata = {
&sci_device,
};
static int __init sh7300_devices_setup(void)
{
return platform_add_devices(sh7300_devices,
ARRAY_SIZE(sh7300_devices));
}
__initcall(sh7300_devices_setup);
arch/sh/kernel/cpu/sh4/probe.c
View file @ 6a302358
...@@ -90,12 +90,6 @@ int __init detect_cpu_and_cache_system(void) ...@@ -90,12 +90,6 @@ int __init detect_cpu_and_cache_system(void)
current_cpu_data.type = CPU_SH7751; current_cpu_data.type = CPU_SH7751;
current_cpu_data.flags |= CPU_HAS_FPU; current_cpu_data.flags |= CPU_HAS_FPU;
break; break;
case 0x2000:
current_cpu_data.type = CPU_SH73180;
current_cpu_data.icache.ways = 4;
current_cpu_data.dcache.ways = 4;
current_cpu_data.flags |= CPU_HAS_LLSC;
break;
case 0x2001: case 0x2001:
case 0x2004: case 0x2004:
current_cpu_data.type = CPU_SH7770; current_cpu_data.type = CPU_SH7770;
......
arch/sh/kernel/cpu/sh4/sq.c
View file @ 6a302358
...@@ -208,7 +208,6 @@ EXPORT_SYMBOL(sq_remap); ...@@ -208,7 +208,6 @@ EXPORT_SYMBOL(sq_remap);
void sq_unmap(unsigned long vaddr) void sq_unmap(unsigned long vaddr)
{ {
struct sq_mapping **p, *map; struct sq_mapping **p, *map;
struct vm_struct *vma;
int page; int page;
for (p = &sq_mapping_list; (map = *p); p = &map->next) for (p = &sq_mapping_list; (map = *p); p = &map->next)
...@@ -225,12 +224,19 @@ void sq_unmap(unsigned long vaddr) ...@@ -225,12 +224,19 @@ void sq_unmap(unsigned long vaddr)
bitmap_release_region(sq_bitmap, page, get_order(map->size)); bitmap_release_region(sq_bitmap, page, get_order(map->size));
#ifdef CONFIG_MMU #ifdef CONFIG_MMU
{
/*
* Tear down the VMA in the MMU case.
*/
struct vm_struct *vma;
vma = remove_vm_area((void *)(map->sq_addr & PAGE_MASK)); vma = remove_vm_area((void *)(map->sq_addr & PAGE_MASK));
if (!vma) { if (!vma) {
printk(KERN_ERR "%s: bad address 0x%08lx\n", printk(KERN_ERR "%s: bad address 0x%08lx\n",
__FUNCTION__, map->sq_addr); __FUNCTION__, map->sq_addr);
return; return;
} }
}
#endif #endif
sq_mapping_list_del(map); sq_mapping_list_del(map);
......
arch/sh/kernel/cpu/sh4a/Makefile
View file @ 6a302358
...@@ -6,13 +6,11 @@ ...@@ -6,13 +6,11 @@
obj-$(CONFIG_CPU_SUBTYPE_SH7770) += setup-sh7770.o obj-$(CONFIG_CPU_SUBTYPE_SH7770) += setup-sh7770.o
obj-$(CONFIG_CPU_SUBTYPE_SH7780) += setup-sh7780.o obj-$(CONFIG_CPU_SUBTYPE_SH7780) += setup-sh7780.o
obj-$(CONFIG_CPU_SUBTYPE_SH7785) += setup-sh7785.o obj-$(CONFIG_CPU_SUBTYPE_SH7785) += setup-sh7785.o
obj-$(CONFIG_CPU_SUBTYPE_SH73180) += setup-sh73180.o
obj-$(CONFIG_CPU_SUBTYPE_SH7343) += setup-sh7343.o obj-$(CONFIG_CPU_SUBTYPE_SH7343) += setup-sh7343.o
obj-$(CONFIG_CPU_SUBTYPE_SH7722) += setup-sh7722.o obj-$(CONFIG_CPU_SUBTYPE_SH7722) += setup-sh7722.o
obj-$(CONFIG_CPU_SUBTYPE_SHX3) += setup-shx3.o obj-$(CONFIG_CPU_SUBTYPE_SHX3) += setup-shx3.o
# Primary on-chip clocks (common) # Primary on-chip clocks (common)
clock-$(CONFIG_CPU_SUBTYPE_SH73180) := clock-sh73180.o
clock-$(CONFIG_CPU_SUBTYPE_SH7770) := clock-sh7770.o clock-$(CONFIG_CPU_SUBTYPE_SH7770) := clock-sh7770.o
clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o
clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o
......
arch/sh/kernel/cpu/sh4a/clock-sh73180.c deleted 100644 → 0
View file @ 8e268f33
/*
* arch/sh/kernel/cpu/sh4a/clock-sh73180.c
*
* SH73180 support for the clock framework
*
* Copyright (C) 2005 Paul Mundt
*
* FRQCR parsing hacked out of arch/sh/kernel/time.c
*
* Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
* Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
* Copyright (C) 2002, 2003, 2004 Paul Mundt
* Copyright (C) 2002 M. R. Brown <mrbrown@linux-sh.org>
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <asm/clock.h>
#include <asm/freq.h>
#include <asm/io.h>
/*
* SH73180 uses a common set of divisors, so this is quite simple..
*/
static int divisors[] = { 1, 2, 3, 4, 6, 8, 12, 16 };
static void master_clk_init(struct clk *clk)
{
clk->rate *= divisors[ctrl_inl(FRQCR) & 0x0007];
}
static struct clk_ops sh73180_master_clk_ops = {
.init = master_clk_init,
};
static void module_clk_recalc(struct clk *clk)
{
int idx = (ctrl_inl(FRQCR) & 0x0007);
clk->rate = clk->parent->rate / divisors[idx];
}
static struct clk_ops sh73180_module_clk_ops = {
.recalc = module_clk_recalc,
};
static void bus_clk_recalc(struct clk *clk)
{
int idx = (ctrl_inl(FRQCR) >> 12) & 0x0007;
clk->rate = clk->parent->rate / divisors[idx];
}
static struct clk_ops sh73180_bus_clk_ops = {
.recalc = bus_clk_recalc,
};
static void cpu_clk_recalc(struct clk *clk)
{
int idx = (ctrl_inl(FRQCR) >> 20) & 0x0007;
clk->rate = clk->parent->rate / divisors[idx];
}
static struct clk_ops sh73180_cpu_clk_ops = {
.recalc = cpu_clk_recalc,
};
static struct clk_ops *sh73180_clk_ops[] = {
&sh73180_master_clk_ops,
&sh73180_module_clk_ops,
&sh73180_bus_clk_ops,
&sh73180_cpu_clk_ops,
};
void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
{
if (idx < ARRAY_SIZE(sh73180_clk_ops))
*ops = sh73180_clk_ops[idx];
}
arch/sh/kernel/cpu/sh4a/setup-sh73180.c deleted 100644 → 0
View file @ 8e268f33
/*
* SH73180 Setup
*
* Copyright (C) 2006 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/platform_device.h>
#include <linux/init.h>
#include <linux/serial.h>
#include <asm/sci.h>
static struct plat_sci_port sci_platform_data[] = {
{
.mapbase = 0xffe80000,
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 80, 81, 83, 82 },
}, {
.flags = 0,
}
};
static struct platform_device sci_device = {
.name = "sh-sci",
.id = -1,
.dev = {
.platform_data = sci_platform_data,
},
};
static struct platform_device *sh73180_devices[] __initdata = {
&sci_device,
};
static int __init sh73180_devices_setup(void)
{
return platform_add_devices(sh73180_devices,
ARRAY_SIZE(sh73180_devices));
}
__initcall(sh73180_devices_setup);
arch/sh/kernel/init_task.c
View file @ 6a302358
...@@ -3,7 +3,7 @@ ...@@ -3,7 +3,7 @@
#include <linux/sched.h> #include <linux/sched.h>
#include <linux/init_task.h> #include <linux/init_task.h>
#include <linux/mqueue.h> #include <linux/mqueue.h>
#include <linux/fs.h>
#include <asm/uaccess.h> #include <asm/uaccess.h>
#include <asm/pgtable.h> #include <asm/pgtable.h>
......
arch/sh/kernel/process.c
View file @ 6a302358
...@@ -18,6 +18,7 @@ ...@@ -18,6 +18,7 @@
#include <linux/kdebug.h> #include <linux/kdebug.h>
#include <linux/tick.h> #include <linux/tick.h>
#include <linux/reboot.h> #include <linux/reboot.h>
#include <linux/fs.h>
#include <asm/uaccess.h> #include <asm/uaccess.h>
#include <asm/mmu_context.h> #include <asm/mmu_context.h>
#include <asm/pgalloc.h> #include <asm/pgalloc.h>
...@@ -474,7 +475,6 @@ asmlinkage int sys_execve(char __user *ufilename, char __user * __user *uargv, ...@@ -474,7 +475,6 @@ asmlinkage int sys_execve(char __user *ufilename, char __user * __user *uargv,
unsigned long get_wchan(struct task_struct *p) unsigned long get_wchan(struct task_struct *p)
{ {
unsigned long schedule_frame;
unsigned long pc; unsigned long pc;
if (!p || p == current || p->state == TASK_RUNNING) if (!p || p == current || p->state == TASK_RUNNING)
...@@ -484,10 +484,13 @@ unsigned long get_wchan(struct task_struct *p) ...@@ -484,10 +484,13 @@ unsigned long get_wchan(struct task_struct *p)
* The same comment as on the Alpha applies here, too ... * The same comment as on the Alpha applies here, too ...
*/ */
pc = thread_saved_pc(p); pc = thread_saved_pc(p);
#ifdef CONFIG_FRAME_POINTER
if (in_sched_functions(pc)) { if (in_sched_functions(pc)) {
schedule_frame = (unsigned long)p->thread.sp; unsigned long schedule_frame = (unsigned long)p->thread.sp;
return ((unsigned long *)schedule_frame)[21]; return ((unsigned long *)schedule_frame)[21];
} }
#endif
return pc; return pc;
} }
......
arch/sh/kernel/setup.c
View file @ 6a302358
...@@ -276,7 +276,6 @@ void __init setup_arch(char **cmdline_p) ...@@ -276,7 +276,6 @@ void __init setup_arch(char **cmdline_p)
static const char *cpu_name[] = { static const char *cpu_name[] = {
[CPU_SH7206] = "SH7206", [CPU_SH7619] = "SH7619", [CPU_SH7206] = "SH7206", [CPU_SH7619] = "SH7619",
[CPU_SH7300] = "SH7300",
[CPU_SH7705] = "SH7705", [CPU_SH7706] = "SH7706", [CPU_SH7705] = "SH7705", [CPU_SH7706] = "SH7706",
[CPU_SH7707] = "SH7707", [CPU_SH7708] = "SH7708", [CPU_SH7707] = "SH7707", [CPU_SH7708] = "SH7708",
[CPU_SH7709] = "SH7709", [CPU_SH7710] = "SH7710", [CPU_SH7709] = "SH7709", [CPU_SH7710] = "SH7710",
...@@ -284,7 +283,7 @@ static const char *cpu_name[] = { ...@@ -284,7 +283,7 @@ static const char *cpu_name[] = {
[CPU_SH7729] = "SH7729", [CPU_SH7750] = "SH7750", [CPU_SH7729] = "SH7729", [CPU_SH7750] = "SH7750",
[CPU_SH7750S] = "SH7750S", [CPU_SH7750R] = "SH7750R", [CPU_SH7750S] = "SH7750S", [CPU_SH7750R] = "SH7750R",
[CPU_SH7751] = "SH7751", [CPU_SH7751R] = "SH7751R", [CPU_SH7751] = "SH7751", [CPU_SH7751R] = "SH7751R",
[CPU_SH7760] = "SH7760", [CPU_SH73180] = "SH73180", [CPU_SH7760] = "SH7760",
[CPU_ST40RA] = "ST40RA", [CPU_ST40GX1] = "ST40GX1", [CPU_ST40RA] = "ST40RA", [CPU_ST40GX1] = "ST40GX1",
[CPU_SH4_202] = "SH4-202", [CPU_SH4_501] = "SH4-501", [CPU_SH4_202] = "SH4-202", [CPU_SH4_501] = "SH4-501",
[CPU_SH7770] = "SH7770", [CPU_SH7780] = "SH7780", [CPU_SH7770] = "SH7770", [CPU_SH7780] = "SH7780",
......
arch/sh/kernel/sys_sh.c
View file @ 6a302358
...@@ -21,6 +21,7 @@ ...@@ -21,6 +21,7 @@
#include <linux/file.h> #include <linux/file.h>
#include <linux/utsname.h> #include <linux/utsname.h>
#include <linux/module.h> #include <linux/module.h>
#include <linux/fs.h>
#include <asm/cacheflush.h> #include <asm/cacheflush.h>
#include <asm/uaccess.h> #include <asm/uaccess.h>
#include <asm/ipc.h> #include <asm/ipc.h>
......
arch/sh/kernel/timers/timer-tmu.c
View file @ 6a302358
...@@ -173,8 +173,7 @@ static int tmu_timer_init(void) ...@@ -173,8 +173,7 @@ static int tmu_timer_init(void)
tmu_timer_stop(); tmu_timer_stop();
#if !defined(CONFIG_CPU_SUBTYPE_SH7300) && \ #if !defined(CONFIG_CPU_SUBTYPE_SH7760) && \
!defined(CONFIG_CPU_SUBTYPE_SH7760) && \
!defined(CONFIG_CPU_SUBTYPE_SH7785) && \ !defined(CONFIG_CPU_SUBTYPE_SH7785) && \
!defined(CONFIG_CPU_SUBTYPE_SHX3) !defined(CONFIG_CPU_SUBTYPE_SHX3)
ctrl_outb(TMU_TOCR_INIT, TMU_TOCR); ctrl_outb(TMU_TOCR_INIT, TMU_TOCR);
......
arch/sh/kernel/vsyscall/vsyscall.c
View file @ 6a302358
...@@ -18,6 +18,7 @@ ...@@ -18,6 +18,7 @@
#include <linux/module.h> #include <linux/module.h>
#include <linux/elf.h> #include <linux/elf.h>
#include <linux/sched.h> #include <linux/sched.h>
#include <linux/err.h>
/* /*
* Should the kernel map a VDSO page into processes and pass its * Should the kernel map a VDSO page into processes and pass its
......
arch/sh/mm/Kconfig
View file @ 6a302358
...@@ -27,6 +27,7 @@ config CPU_SH4A ...@@ -27,6 +27,7 @@ config CPU_SH4A
config CPU_SH4AL_DSP config CPU_SH4AL_DSP
bool bool
select CPU_SH4A select CPU_SH4A
select CPU_HAS_DSP
config CPU_SUBTYPE_ST40 config CPU_SUBTYPE_ST40
bool bool
...@@ -62,15 +63,10 @@ config CPU_SUBTYPE_SH7206 ...@@ -62,15 +63,10 @@ config CPU_SUBTYPE_SH7206
# SH-3 Processor Support # SH-3 Processor Support
config CPU_SUBTYPE_SH7300
bool "Support SH7300 processor"
select CPU_SH3
config CPU_SUBTYPE_SH7705 config CPU_SUBTYPE_SH7705
bool "Support SH7705 processor" bool "Support SH7705 processor"
select CPU_SH3 select CPU_SH3
select CPU_HAS_IPR_IRQ select CPU_HAS_IPR_IRQ
select CPU_HAS_PINT_IRQ
config CPU_SUBTYPE_SH7706 config CPU_SUBTYPE_SH7706
bool "Support SH7706 processor" bool "Support SH7706 processor"
...@@ -82,7 +78,6 @@ config CPU_SUBTYPE_SH7706 ...@@ -82,7 +78,6 @@ config CPU_SUBTYPE_SH7706
config CPU_SUBTYPE_SH7707 config CPU_SUBTYPE_SH7707
bool "Support SH7707 processor" bool "Support SH7707 processor"
select CPU_SH3 select CPU_SH3
select CPU_HAS_PINT_IRQ
help help
Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU. Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU.
...@@ -97,7 +92,6 @@ config CPU_SUBTYPE_SH7709 ...@@ -97,7 +92,6 @@ config CPU_SUBTYPE_SH7709
bool "Support SH7709 processor" bool "Support SH7709 processor"
select CPU_SH3 select CPU_SH3
select CPU_HAS_IPR_IRQ select CPU_HAS_IPR_IRQ
select CPU_HAS_PINT_IRQ
help help
Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU. Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU.
...@@ -105,6 +99,7 @@ config CPU_SUBTYPE_SH7710 ...@@ -105,6 +99,7 @@ config CPU_SUBTYPE_SH7710
bool "Support SH7710 processor" bool "Support SH7710 processor"
select CPU_SH3 select CPU_SH3
select CPU_HAS_IPR_IRQ select CPU_HAS_IPR_IRQ
select CPU_HAS_DSP
help help
Select SH7710 if you have a SH3-DSP SH7710 CPU. Select SH7710 if you have a SH3-DSP SH7710 CPU.
...@@ -112,6 +107,7 @@ config CPU_SUBTYPE_SH7712 ...@@ -112,6 +107,7 @@ config CPU_SUBTYPE_SH7712
bool "Support SH7712 processor" bool "Support SH7712 processor"
select CPU_SH3 select CPU_SH3
select CPU_HAS_IPR_IRQ select CPU_HAS_IPR_IRQ
select CPU_HAS_DSP
help help
Select SH7712 if you have a SH3-DSP SH7712 CPU. Select SH7712 if you have a SH3-DSP SH7712 CPU.
...@@ -205,10 +201,6 @@ config CPU_SUBTYPE_SHX3 ...@@ -205,10 +201,6 @@ config CPU_SUBTYPE_SHX3
# SH4AL-DSP Processor Support # SH4AL-DSP Processor Support
config CPU_SUBTYPE_SH73180
bool "Support SH73180 processor"
select CPU_SH4AL_DSP
config CPU_SUBTYPE_SH7343 config CPU_SUBTYPE_SH7343
bool "Support SH7343 processor" bool "Support SH7343 processor"
select CPU_SH4AL_DSP select CPU_SH4AL_DSP
......
arch/sh/mm/cache-sh4.c
View file @ 6a302358
...@@ -77,16 +77,8 @@ static void __init emit_cache_params(void) ...@@ -77,16 +77,8 @@ static void __init emit_cache_params(void)
/* /*
* SH-4 has virtually indexed and physically tagged cache. * SH-4 has virtually indexed and physically tagged cache.
*/ */
/* Worst case assumed to be 64k cache, direct-mapped i.e. 4 synonym bits. */
#define MAX_P3_MUTEXES 16
struct mutex p3map_mutex[MAX_P3_MUTEXES];
void __init p3_cache_init(void) void __init p3_cache_init(void)
{ {
int i;
compute_alias(&current_cpu_data.icache); compute_alias(&current_cpu_data.icache);
compute_alias(&current_cpu_data.dcache); compute_alias(&current_cpu_data.dcache);
...@@ -106,12 +98,6 @@ void __init p3_cache_init(void) ...@@ -106,12 +98,6 @@ void __init p3_cache_init(void)
} }
emit_cache_params(); emit_cache_params();
if (ioremap_page_range(P3SEG, P3SEG + (PAGE_SIZE * 4), 0, PAGE_KERNEL))
panic("%s failed.", __FUNCTION__);
for (i = 0; i < current_cpu_data.dcache.n_aliases; i++)
mutex_init(&p3map_mutex[i]);
} }
/* /*
......
arch/sh/mm/pg-sh4.c
View file @ 6a302358
...@@ -2,19 +2,45 @@ ...@@ -2,19 +2,45 @@
* arch/sh/mm/pg-sh4.c * arch/sh/mm/pg-sh4.c
* *
* Copyright (C) 1999, 2000, 2002 Niibe Yutaka * Copyright (C) 1999, 2000, 2002 Niibe Yutaka
* Copyright (C) 2002 - 2005 Paul Mundt * Copyright (C) 2002 - 2007 Paul Mundt
* *
* Released under the terms of the GNU GPL v2.0. * Released under the terms of the GNU GPL v2.0.
*/ */
#include <linux/mm.h> #include <linux/mm.h>
#include <linux/mutex.h> #include <linux/mutex.h>
#include <linux/fs.h>
#include <asm/mmu_context.h> #include <asm/mmu_context.h>
#include <asm/cacheflush.h> #include <asm/cacheflush.h>
extern struct mutex p3map_mutex[];
#define CACHE_ALIAS (current_cpu_data.dcache.alias_mask) #define CACHE_ALIAS (current_cpu_data.dcache.alias_mask)
static inline void *kmap_coherent(struct page *page, unsigned long addr)
{
enum fixed_addresses idx;
unsigned long vaddr, flags;
pte_t pte;
inc_preempt_count();
idx = (addr & current_cpu_data.dcache.alias_mask) >> PAGE_SHIFT;
vaddr = __fix_to_virt(FIX_CMAP_END - idx);
pte = mk_pte(page, PAGE_KERNEL);
local_irq_save(flags);
flush_tlb_one(get_asid(), vaddr);
local_irq_restore(flags);
update_mmu_cache(NULL, vaddr, pte);
return (void *)vaddr;
}
static inline void kunmap_coherent(struct page *page)
{
dec_preempt_count();
preempt_check_resched();
}
/* /*
* clear_user_page * clear_user_page
* @to: P1 address * @to: P1 address
...@@ -27,25 +53,9 @@ void clear_user_page(void *to, unsigned long address, struct page *page) ...@@ -27,25 +53,9 @@ void clear_user_page(void *to, unsigned long address, struct page *page)
if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0) if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0)
clear_page(to); clear_page(to);
else { else {
unsigned long phys_addr = PHYSADDR(to); void *vto = kmap_coherent(page, address);
unsigned long p3_addr = P3SEG + (address & CACHE_ALIAS); __clear_user_page(vto, to);
pgd_t *pgd = pgd_offset_k(p3_addr); kunmap_coherent(vto);
pud_t *pud = pud_offset(pgd, p3_addr);
pmd_t *pmd = pmd_offset(pud, p3_addr);
pte_t *pte = pte_offset_kernel(pmd, p3_addr);
pte_t entry;
unsigned long flags;
entry = pfn_pte(phys_addr >> PAGE_SHIFT, PAGE_KERNEL);
mutex_lock(&p3map_mutex[(address & CACHE_ALIAS)>>12]);
set_pte(pte, entry);
local_irq_save(flags);
flush_tlb_one(get_asid(), p3_addr);
local_irq_restore(flags);
update_mmu_cache(NULL, p3_addr, entry);
__clear_user_page((void *)p3_addr, to);
pte_clear(&init_mm, p3_addr, pte);
mutex_unlock(&p3map_mutex[(address & CACHE_ALIAS)>>12]);
} }
} }
...@@ -63,25 +73,9 @@ void copy_user_page(void *to, void *from, unsigned long address, ...@@ -63,25 +73,9 @@ void copy_user_page(void *to, void *from, unsigned long address,
if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0) if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0)
copy_page(to, from); copy_page(to, from);
else { else {
unsigned long phys_addr = PHYSADDR(to); void *vfrom = kmap_coherent(page, address);
unsigned long p3_addr = P3SEG + (address & CACHE_ALIAS); __copy_user_page(vfrom, from, to);
pgd_t *pgd = pgd_offset_k(p3_addr); kunmap_coherent(vfrom);
pud_t *pud = pud_offset(pgd, p3_addr);
pmd_t *pmd = pmd_offset(pud, p3_addr);
pte_t *pte = pte_offset_kernel(pmd, p3_addr);
pte_t entry;
unsigned long flags;
entry = pfn_pte(phys_addr >> PAGE_SHIFT, PAGE_KERNEL);
mutex_lock(&p3map_mutex[(address & CACHE_ALIAS)>>12]);
set_pte(pte, entry);
local_irq_save(flags);
flush_tlb_one(get_asid(), p3_addr);
local_irq_restore(flags);
update_mmu_cache(NULL, p3_addr, entry);
__copy_user_page((void *)p3_addr, from, to);
pte_clear(&init_mm, p3_addr, pte);
mutex_unlock(&p3map_mutex[(address & CACHE_ALIAS)>>12]);
} }
} }
......
arch/sh/tools/mach-types
View file @ 6a302358
...@@ -8,12 +8,10 @@ ...@@ -8,12 +8,10 @@
SE SH_SOLUTION_ENGINE SE SH_SOLUTION_ENGINE
7751SE SH_7751_SOLUTION_ENGINE 7751SE SH_7751_SOLUTION_ENGINE
7722SE SH_7722_SOLUTION_ENGINE 7722SE SH_7722_SOLUTION_ENGINE
7300SE SH_7300_SOLUTION_ENGINE
7343SE SH_7343_SOLUTION_ENGINE 7343SE SH_7343_SOLUTION_ENGINE
7206SE SH_7206_SOLUTION_ENGINE 7206SE SH_7206_SOLUTION_ENGINE
7619SE SH_7619_SOLUTION_ENGINE 7619SE SH_7619_SOLUTION_ENGINE
7780SE SH_7780_SOLUTION_ENGINE 7780SE SH_7780_SOLUTION_ENGINE
73180SE SH_73180_SOLUTION_ENGINE
7751SYSTEMH SH_7751_SYSTEMH 7751SYSTEMH SH_7751_SYSTEMH
HP6XX SH_HP6XX HP6XX SH_HP6XX
HD64461 HD64461 HD64461 HD64461
......
drivers/rtc/rtc-sh.c
View file @ 6a302358
...@@ -365,6 +365,7 @@ static int sh_rtc_set_time(struct device *dev, struct rtc_time *tm) ...@@ -365,6 +365,7 @@ static int sh_rtc_set_time(struct device *dev, struct rtc_time *tm)
/* Reset pre-scaler & stop RTC */ /* Reset pre-scaler & stop RTC */
tmp = readb(rtc->regbase + RCR2); tmp = readb(rtc->regbase + RCR2);
tmp |= RCR2_RESET; tmp |= RCR2_RESET;
tmp &= ~RCR2_START;
writeb(tmp, rtc->regbase + RCR2); writeb(tmp, rtc->regbase + RCR2);
writeb(BIN2BCD(tm->tm_sec), rtc->regbase + RSECCNT); writeb(BIN2BCD(tm->tm_sec), rtc->regbase + RSECCNT);
......
drivers/serial/sh-sci.c
View file @ 6a302358
...@@ -12,6 +12,7 @@ ...@@ -12,6 +12,7 @@
* Modified to support multiple serial ports. Stuart Menefy (May 2000). * Modified to support multiple serial ports. Stuart Menefy (May 2000).
* Modified to support SecureEdge. David McCullough (2002) * Modified to support SecureEdge. David McCullough (2002)
* Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003). * Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003).
* Removed SH7300 support (Jul 2007).
* *
* This file is subject to the terms and conditions of the GNU General Public * This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive * License. See the file "COPYING" in the main directory of this archive
...@@ -289,13 +290,7 @@ static void sci_init_pins_irda(struct uart_port *port, unsigned int cflag) ...@@ -289,13 +290,7 @@ static void sci_init_pins_irda(struct uart_port *port, unsigned int cflag)
#endif #endif
#if defined(SCIF_ONLY) || defined(SCI_AND_SCIF) #if defined(SCIF_ONLY) || defined(SCI_AND_SCIF)
#if defined(CONFIG_CPU_SUBTYPE_SH7300) #if defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
/* SH7300 doesn't use RTS/CTS */
static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
{
sci_out(port, SCFCR, 0);
}
#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
static void sci_init_pins_scif(struct uart_port* port, unsigned int cflag) static void sci_init_pins_scif(struct uart_port* port, unsigned int cflag)
{ {
unsigned int fcr_val = 0; unsigned int fcr_val = 0;
......
drivers/serial/sh-sci.h
View file @ 6a302358
...@@ -9,6 +9,7 @@ ...@@ -9,6 +9,7 @@
* Modified to support multiple serial ports. Stuart Menefy (May 2000). * Modified to support multiple serial ports. Stuart Menefy (May 2000).
* Modified to support SH7300(SH-Mobile) SCIF. Takashi Kusuda (Jun 2003). * Modified to support SH7300(SH-Mobile) SCIF. Takashi Kusuda (Jun 2003).
* Modified to support H8/300 Series Yoshinori Sato (Feb 2004). * Modified to support H8/300 Series Yoshinori Sato (Feb 2004).
* Removed SH7300 support (Jul 2007).
*/ */
#include <linux/serial_core.h> #include <linux/serial_core.h>
#include <asm/io.h> #include <asm/io.h>
...@@ -23,13 +24,10 @@ ...@@ -23,13 +24,10 @@
#endif #endif
#endif #endif
#if defined(CONFIG_CPU_SUBTYPE_SH7708) #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
# define SCSPTR 0xffffff7c /* 8 bit */ defined(CONFIG_CPU_SUBTYPE_SH7707) || \
# define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ defined(CONFIG_CPU_SUBTYPE_SH7708) || \
# define SCI_ONLY defined(CONFIG_CPU_SUBTYPE_SH7709)
#elif defined(CONFIG_CPU_SUBTYPE_SH7707) || \
defined(CONFIG_CPU_SUBTYPE_SH7709) || \
defined(CONFIG_CPU_SUBTYPE_SH7706)
# define SCPCR 0xA4000116 /* 16 bit SCI and SCIF */ # define SCPCR 0xA4000116 /* 16 bit SCI and SCIF */
# define SCPDR 0xA4000136 /* 8 bit SCI and SCIF */ # define SCPDR 0xA4000136 /* 8 bit SCI and SCIF */
# define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ # define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */
...@@ -73,11 +71,6 @@ ...@@ -73,11 +71,6 @@
# define SCIF_ORER 0x0001 /* overrun error bit */ # define SCIF_ORER 0x0001 /* overrun error bit */
# define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
# define SCIF_ONLY # define SCIF_ONLY
#elif defined(CONFIG_CPU_SUBTYPE_SH7300)
# define SCPCR 0xA4050116 /* 16 bit SCIF */
# define SCPDR 0xA4050136 /* 16 bit SCIF */
# define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */
# define SCIF_ONLY
#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) #elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
# define SCSPTR0 0xA4400000 /* 16 bit SCIF */ # define SCSPTR0 0xA4400000 /* 16 bit SCIF */
# define SCI_NPORTS 2 # define SCI_NPORTS 2
...@@ -86,12 +79,6 @@ ...@@ -86,12 +79,6 @@
# define PBCR 0xa4050102 # define PBCR 0xa4050102
# define SCSCR_INIT(port) 0x3B # define SCSCR_INIT(port) 0x3B
# define SCIF_ONLY # define SCIF_ONLY
#elif defined(CONFIG_CPU_SUBTYPE_SH73180)
# define SCPDR 0xA4050138 /* 16 bit SCIF */
# define SCSPTR2 SCPDR
# define SCIF_ORER 0x0001 /* overrun error bit */
# define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1 */
# define SCIF_ONLY
#elif defined(CONFIG_CPU_SUBTYPE_SH7343) #elif defined(CONFIG_CPU_SUBTYPE_SH7343)
# define SCSPTR0 0xffe00010 /* 16 bit SCIF */ # define SCSPTR0 0xffe00010 /* 16 bit SCIF */
# define SCSPTR1 0xffe10010 /* 16 bit SCIF */ # define SCSPTR1 0xffe10010 /* 16 bit SCIF */
...@@ -230,7 +217,7 @@ ...@@ -230,7 +217,7 @@
#define SCIF_RDF 0x0002 /* 7705 SCIF, 7707 SCIF, 7709 SCIF, 7750 SCIF */ #define SCIF_RDF 0x0002 /* 7705 SCIF, 7707 SCIF, 7709 SCIF, 7750 SCIF */
#define SCIF_DR 0x0001 /* 7705 SCIF, 7707 SCIF, 7709 SCIF, 7750 SCIF */ #define SCIF_DR 0x0001 /* 7705 SCIF, 7707 SCIF, 7709 SCIF, 7750 SCIF */
#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705) #if defined(CONFIG_CPU_SUBTYPE_SH7705)
#define SCIF_ORER 0x0200 #define SCIF_ORER 0x0200
#define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK | SCIF_ORER) #define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK | SCIF_ORER)
#define SCIF_RFDC_MASK 0x007f #define SCIF_RFDC_MASK 0x007f
...@@ -259,7 +246,7 @@ ...@@ -259,7 +246,7 @@
# define SCxSR_ERRORS(port) SCIF_ERRORS # define SCxSR_ERRORS(port) SCIF_ERRORS
# define SCxSR_RDxF(port) SCIF_RDF # define SCxSR_RDxF(port) SCIF_RDF
# define SCxSR_TDxE(port) SCIF_TDFE # define SCxSR_TDxE(port) SCIF_TDFE
#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705) #if defined(CONFIG_CPU_SUBTYPE_SH7705)
# define SCxSR_ORER(port) SCIF_ORER # define SCxSR_ORER(port) SCIF_ORER
#else #else
# define SCxSR_ORER(port) 0x0000 # define SCxSR_ORER(port) 0x0000
...@@ -267,13 +254,13 @@ ...@@ -267,13 +254,13 @@
# define SCxSR_FER(port) SCIF_FER # define SCxSR_FER(port) SCIF_FER
# define SCxSR_PER(port) SCIF_PER # define SCxSR_PER(port) SCIF_PER
# define SCxSR_BRK(port) SCIF_BRK # define SCxSR_BRK(port) SCIF_BRK
#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705) #if defined(CONFIG_CPU_SUBTYPE_SH7705)
# define SCxSR_RDxF_CLEAR(port) (sci_in(port,SCxSR)&0xfffc) # define SCxSR_RDxF_CLEAR(port) (sci_in(port,SCxSR)&0xfffc)
# define SCxSR_ERROR_CLEAR(port) (sci_in(port,SCxSR)&0xfd73) # define SCxSR_ERROR_CLEAR(port) (sci_in(port,SCxSR)&0xfd73)
# define SCxSR_TDxE_CLEAR(port) (sci_in(port,SCxSR)&0xffdf) # define SCxSR_TDxE_CLEAR(port) (sci_in(port,SCxSR)&0xffdf)
# define SCxSR_BREAK_CLEAR(port) (sci_in(port,SCxSR)&0xffe3) # define SCxSR_BREAK_CLEAR(port) (sci_in(port,SCxSR)&0xffe3)
#else #else
/* SH7705 can also use this, clearing is same between 7705 and 7709 and 7300 */ /* SH7705 can also use this, clearing is same between 7705 and 7709 */
# define SCxSR_RDxF_CLEAR(port) 0x00fc # define SCxSR_RDxF_CLEAR(port) 0x00fc
# define SCxSR_ERROR_CLEAR(port) 0x0073 # define SCxSR_ERROR_CLEAR(port) 0x0073
# define SCxSR_TDxE_CLEAR(port) 0x00df # define SCxSR_TDxE_CLEAR(port) 0x00df
...@@ -375,8 +362,7 @@ ...@@ -375,8 +362,7 @@
CPU_SCIx_FNS(name, sh4_sci_offset, sh4_sci_size, sh4_scif_offset, sh4_scif_size) CPU_SCIx_FNS(name, sh4_sci_offset, sh4_sci_size, sh4_scif_offset, sh4_scif_size)
#define SCIF_FNS(name, sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size) \ #define SCIF_FNS(name, sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size) \
CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size) CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size)
#elif defined(CONFIG_CPU_SUBTYPE_SH7300) || \ #elif defined(CONFIG_CPU_SUBTYPE_SH7705)
defined(CONFIG_CPU_SUBTYPE_SH7705)
#define SCIF_FNS(name, scif_offset, scif_size) \ #define SCIF_FNS(name, scif_offset, scif_size) \
CPU_SCIF_FNS(name, scif_offset, scif_size) CPU_SCIF_FNS(name, scif_offset, scif_size)
#else #else
...@@ -402,8 +388,7 @@ ...@@ -402,8 +388,7 @@
CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size) CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size)
#endif #endif
#if defined(CONFIG_CPU_SUBTYPE_SH7300) || \ #if defined(CONFIG_CPU_SUBTYPE_SH7705)
defined(CONFIG_CPU_SUBTYPE_SH7705)
SCIF_FNS(SCSMR, 0x00, 16) SCIF_FNS(SCSMR, 0x00, 16)
SCIF_FNS(SCBRR, 0x04, 8) SCIF_FNS(SCBRR, 0x04, 8)
...@@ -485,16 +470,10 @@ static const struct __attribute__((packed)) { ...@@ -485,16 +470,10 @@ static const struct __attribute__((packed)) {
}; };
#endif #endif
#if defined(CONFIG_CPU_SUBTYPE_SH7708) #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
static inline int sci_rxd_in(struct uart_port *port) defined(CONFIG_CPU_SUBTYPE_SH7707) || \
{ defined(CONFIG_CPU_SUBTYPE_SH7708) || \
if (port->mapbase == 0xfffffe80) defined(CONFIG_CPU_SUBTYPE_SH7709)
return ctrl_inb(SCSPTR)&0x01 ? 1 : 0; /* SCI */
return 1;
}
#elif defined(CONFIG_CPU_SUBTYPE_SH7707) || \
defined(CONFIG_CPU_SUBTYPE_SH7709) || \
defined(CONFIG_CPU_SUBTYPE_SH7706)
static inline int sci_rxd_in(struct uart_port *port) static inline int sci_rxd_in(struct uart_port *port)
{ {
if (port->mapbase == 0xfffffe80) if (port->mapbase == 0xfffffe80)
...@@ -562,18 +541,6 @@ static inline int sci_rxd_in(struct uart_port *port) ...@@ -562,18 +541,6 @@ static inline int sci_rxd_in(struct uart_port *port)
return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
return 1; return 1;
} }
#elif defined(CONFIG_CPU_SUBTYPE_SH7300)
static inline int sci_rxd_in(struct uart_port *port)
{
if (port->mapbase == 0xa4430000)
return ctrl_inb(SCPDR)&0x01 ? 1 : 0; /* SCIF0 */
return 1;
}
#elif defined(CONFIG_CPU_SUBTYPE_SH73180)
static inline int sci_rxd_in(struct uart_port *port)
{
return ctrl_inb(SCPDR)&0x01 ? 1 : 0; /* SCIF0 */
}
#elif defined(CONFIG_CPU_SUBTYPE_SH7343) #elif defined(CONFIG_CPU_SUBTYPE_SH7343)
static inline int sci_rxd_in(struct uart_port *port) static inline int sci_rxd_in(struct uart_port *port)
{ {
...@@ -721,8 +688,7 @@ static inline int sci_rxd_in(struct uart_port *port) ...@@ -721,8 +688,7 @@ static inline int sci_rxd_in(struct uart_port *port)
* -- Mitch Davis - 15 Jul 2000 * -- Mitch Davis - 15 Jul 2000
*/ */
#if defined(CONFIG_CPU_SUBTYPE_SH7300) || \ #if defined(CONFIG_CPU_SUBTYPE_SH7780) || \
defined(CONFIG_CPU_SUBTYPE_SH7780) || \
defined(CONFIG_CPU_SUBTYPE_SH7785) defined(CONFIG_CPU_SUBTYPE_SH7785)
#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1) #define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1)
#elif defined(CONFIG_CPU_SUBTYPE_SH7705) #elif defined(CONFIG_CPU_SUBTYPE_SH7705)
......
include/asm-sh/bugs.h
View file @ 6a302358
...@@ -29,7 +29,7 @@ static void __init check_bugs(void) ...@@ -29,7 +29,7 @@ static void __init check_bugs(void)
*p++ = '2'; *p++ = '2';
*p++ = 'a'; *p++ = 'a';
break; break;
case CPU_SH7705 ... CPU_SH7300: case CPU_SH7705 ... CPU_SH7729:
*p++ = '3'; *p++ = '3';
break; break;
case CPU_SH7750 ... CPU_SH4_501: case CPU_SH7750 ... CPU_SH4_501:
...@@ -39,7 +39,7 @@ static void __init check_bugs(void) ...@@ -39,7 +39,7 @@ static void __init check_bugs(void)
*p++ = '4'; *p++ = '4';
*p++ = 'a'; *p++ = 'a';
break; break;
case CPU_SH73180 ... CPU_SH7722: case CPU_SH7343 ... CPU_SH7722:
*p++ = '4'; *p++ = '4';
*p++ = 'a'; *p++ = 'a';
*p++ = 'l'; *p++ = 'l';
......
include/asm-sh/cpu-sh3/freq.h
View file @ 6a302358
...@@ -10,11 +10,7 @@ ...@@ -10,11 +10,7 @@
#ifndef __ASM_CPU_SH3_FREQ_H #ifndef __ASM_CPU_SH3_FREQ_H
#define __ASM_CPU_SH3_FREQ_H #define __ASM_CPU_SH3_FREQ_H
#if defined(CONFIG_CPU_SUBTYPE_SH7300)
#define FRQCR 0xa415ff80
#else
#define FRQCR 0xffffff80 #define FRQCR 0xffffff80
#endif
#define MIN_DIVISOR_NR 0 #define MIN_DIVISOR_NR 0
#define MAX_DIVISOR_NR 4 #define MAX_DIVISOR_NR 4
......
include/asm-sh/cpu-sh3/mmu_context.h
View file @ 6a302358
...@@ -30,7 +30,6 @@ ...@@ -30,7 +30,6 @@
#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \ #if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
defined(CONFIG_CPU_SUBTYPE_SH7709) || \ defined(CONFIG_CPU_SUBTYPE_SH7709) || \
defined(CONFIG_CPU_SUBTYPE_SH7706) || \ defined(CONFIG_CPU_SUBTYPE_SH7706) || \
defined(CONFIG_CPU_SUBTYPE_SH7300) || \
defined(CONFIG_CPU_SUBTYPE_SH7705) || \ defined(CONFIG_CPU_SUBTYPE_SH7705) || \
defined(CONFIG_CPU_SUBTYPE_SH7712) || \ defined(CONFIG_CPU_SUBTYPE_SH7712) || \
defined(CONFIG_CPU_SUBTYPE_SH7710) defined(CONFIG_CPU_SUBTYPE_SH7710)
......
include/asm-sh/cpu-sh3/timer.h
View file @ 6a302358
...@@ -19,7 +19,6 @@ ...@@ -19,7 +19,6 @@
* SH7729R * SH7729R
* SH7710 * SH7710
* SH7720 * SH7720
* SH7300
* SH7710 * SH7710
* --------------------------------------------------------------------------- * ---------------------------------------------------------------------------
*/ */
...@@ -28,7 +27,7 @@ ...@@ -28,7 +27,7 @@
#define TMU_TOCR 0xfffffe90 /* Byte access */ #define TMU_TOCR 0xfffffe90 /* Byte access */
#endif #endif
#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710) #if defined(CONFIG_CPU_SUBTYPE_SH7710)
#define TMU_012_TSTR 0xa412fe92 /* Byte access */ #define TMU_012_TSTR 0xa412fe92 /* Byte access */
#define TMU0_TCOR 0xa412fe94 /* Long access */ #define TMU0_TCOR 0xa412fe94 /* Long access */
......
include/asm-sh/cpu-sh4/freq.h
View file @ 6a302358
...@@ -10,7 +10,7 @@ ...@@ -10,7 +10,7 @@
#ifndef __ASM_CPU_SH4_FREQ_H #ifndef __ASM_CPU_SH4_FREQ_H
#define __ASM_CPU_SH4_FREQ_H #define __ASM_CPU_SH4_FREQ_H
#if defined(CONFIG_CPU_SUBTYPE_SH73180) || defined(CONFIG_CPU_SUBTYPE_SH7722) #if defined(CONFIG_CPU_SUBTYPE_SH7722)
#define FRQCR 0xa4150000 #define FRQCR 0xa4150000
#define VCLKCR 0xa4150004 #define VCLKCR 0xa4150004
#define SCLKACR 0xa4150008 #define SCLKACR 0xa4150008
......
include/asm-sh/dma-mapping.h
View file @ 6a302358
...@@ -69,11 +69,11 @@ static inline dma_addr_t dma_map_single(struct device *dev, ...@@ -69,11 +69,11 @@ static inline dma_addr_t dma_map_single(struct device *dev,
{ {
#if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT) #if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT)
if (dev->bus == &pci_bus_type) if (dev->bus == &pci_bus_type)
return virt_to_bus(ptr); return virt_to_phys(ptr);
#endif #endif
dma_cache_sync(dev, ptr, size, dir); dma_cache_sync(dev, ptr, size, dir);
return virt_to_bus(ptr); return virt_to_phys(ptr);
} }
#define dma_unmap_single(dev, addr, size, dir) do { } while (0) #define dma_unmap_single(dev, addr, size, dir) do { } while (0)
...@@ -116,7 +116,7 @@ static inline void dma_sync_single(struct device *dev, dma_addr_t dma_handle, ...@@ -116,7 +116,7 @@ static inline void dma_sync_single(struct device *dev, dma_addr_t dma_handle,
if (dev->bus == &pci_bus_type) if (dev->bus == &pci_bus_type)
return; return;
#endif #endif
dma_cache_sync(dev, bus_to_virt(dma_handle), size, dir); dma_cache_sync(dev, phys_to_virt(dma_handle), size, dir);
} }
static inline void dma_sync_single_range(struct device *dev, static inline void dma_sync_single_range(struct device *dev,
...@@ -128,7 +128,7 @@ static inline void dma_sync_single_range(struct device *dev, ...@@ -128,7 +128,7 @@ static inline void dma_sync_single_range(struct device *dev,
if (dev->bus == &pci_bus_type) if (dev->bus == &pci_bus_type)
return; return;
#endif #endif
dma_cache_sync(dev, bus_to_virt(dma_handle) + offset, size, dir); dma_cache_sync(dev, phys_to_virt(dma_handle) + offset, size, dir);
} }
static inline void dma_sync_sg(struct device *dev, struct scatterlist *sg, static inline void dma_sync_sg(struct device *dev, struct scatterlist *sg,
......
include/asm-sh/dma.h
View file @ 6a302358
...@@ -111,6 +111,7 @@ struct dma_info { ...@@ -111,6 +111,7 @@ struct dma_info {
struct list_head list; struct list_head list;
int first_channel_nr; int first_channel_nr;
int first_vchannel_nr;
}; };
struct dma_chan_caps { struct dma_chan_caps {
......
include/asm-sh/fixmap.h
View file @ 6a302358
...@@ -46,6 +46,9 @@ ...@@ -46,6 +46,9 @@
* fix-mapped? * fix-mapped?
*/ */
enum fixed_addresses { enum fixed_addresses {
#define FIX_N_COLOURS 16
FIX_CMAP_BEGIN,
FIX_CMAP_END = FIX_CMAP_BEGIN + FIX_N_COLOURS,
#ifdef CONFIG_HIGHMEM #ifdef CONFIG_HIGHMEM
FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */ FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */
FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1, FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1,
...@@ -53,7 +56,7 @@ enum fixed_addresses { ...@@ -53,7 +56,7 @@ enum fixed_addresses {
__end_of_fixed_addresses __end_of_fixed_addresses
}; };
extern void __set_fixmap (enum fixed_addresses idx, extern void __set_fixmap(enum fixed_addresses idx,
unsigned long phys, pgprot_t flags); unsigned long phys, pgprot_t flags);
#define set_fixmap(idx, phys) \ #define set_fixmap(idx, phys) \
...@@ -106,5 +109,4 @@ static inline unsigned long virt_to_fix(const unsigned long vaddr) ...@@ -106,5 +109,4 @@ static inline unsigned long virt_to_fix(const unsigned long vaddr)
BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START); BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START);
return __virt_to_fix(vaddr); return __virt_to_fix(vaddr);
} }
#endif #endif
include/asm-sh/floppy.h
View file @ 6a302358
...@@ -181,7 +181,7 @@ static void _fd_chose_dma_mode(char *addr, unsigned long size) ...@@ -181,7 +181,7 @@ static void _fd_chose_dma_mode(char *addr, unsigned long size)
{ {
if(can_use_virtual_dma == 2) { if(can_use_virtual_dma == 2) {
if((unsigned int) addr >= (unsigned int) high_memory || if((unsigned int) addr >= (unsigned int) high_memory ||
virt_to_bus(addr) >= 0x10000000) virt_to_phys(addr) >= 0x10000000)
use_virtual_dma = 1; use_virtual_dma = 1;
else else
use_virtual_dma = 0; use_virtual_dma = 0;
...@@ -219,7 +219,7 @@ static int hard_dma_setup(char *addr, unsigned long size, int mode, int io) ...@@ -219,7 +219,7 @@ static int hard_dma_setup(char *addr, unsigned long size, int mode, int io)
doing_pdma = 0; doing_pdma = 0;
clear_dma_ff(FLOPPY_DMA); clear_dma_ff(FLOPPY_DMA);
set_dma_mode(FLOPPY_DMA,mode); set_dma_mode(FLOPPY_DMA,mode);
set_dma_addr(FLOPPY_DMA,virt_to_bus(addr)); set_dma_addr(FLOPPY_DMA,virt_to_phys(addr));
set_dma_count(FLOPPY_DMA,size); set_dma_count(FLOPPY_DMA,size);
enable_dma(FLOPPY_DMA); enable_dma(FLOPPY_DMA);
return 0; return 0;
......
include/asm-sh/io.h
View file @ 6a302358
...@@ -241,10 +241,6 @@ static inline void *phys_to_virt(unsigned long address) ...@@ -241,10 +241,6 @@ static inline void *phys_to_virt(unsigned long address)
#define virt_to_phys(address) ((unsigned long)(address)) #define virt_to_phys(address) ((unsigned long)(address))
#endif #endif
#define virt_to_bus virt_to_phys
#define bus_to_virt phys_to_virt
#define page_to_bus page_to_phys
/* /*
* readX/writeX() are used to access memory mapped devices. On some * readX/writeX() are used to access memory mapped devices. On some
* architectures the memory mapped IO stuff needs to be accessed * architectures the memory mapped IO stuff needs to be accessed
......
include/asm-sh/pgtable.h
View file @ 6a302358
...@@ -55,11 +55,7 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; ...@@ -55,11 +55,7 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
#define PTE_PHYS_MASK (0x20000000 - PAGE_SIZE) #define PTE_PHYS_MASK (0x20000000 - PAGE_SIZE)
/* #define VMALLOC_START (P3SEG)
* First 1MB map is used by fixed purpose.
* Currently only 4-entry (16kB) is used (see arch/sh/mm/cache.c)
*/
#define VMALLOC_START (P3SEG+0x00100000)
#define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE) #define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE)
/* /*
......
include/asm-sh/processor.h
View file @ 6a302358
...@@ -45,7 +45,7 @@ enum cpu_type { ...@@ -45,7 +45,7 @@ enum cpu_type {
CPU_SH7705, CPU_SH7706, CPU_SH7707, CPU_SH7705, CPU_SH7706, CPU_SH7707,
CPU_SH7708, CPU_SH7708S, CPU_SH7708R, CPU_SH7708, CPU_SH7708S, CPU_SH7708R,
CPU_SH7709, CPU_SH7709A, CPU_SH7710, CPU_SH7712, CPU_SH7709, CPU_SH7709A, CPU_SH7710, CPU_SH7712,
CPU_SH7729, CPU_SH7300, CPU_SH7729,
/* SH-4 types */ /* SH-4 types */
CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R, CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R,
...@@ -55,7 +55,7 @@ enum cpu_type { ...@@ -55,7 +55,7 @@ enum cpu_type {
CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, CPU_SHX3, CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, CPU_SHX3,
/* SH4AL-DSP types */ /* SH4AL-DSP types */
CPU_SH73180, CPU_SH7343, CPU_SH7722, CPU_SH7343, CPU_SH7722,
/* Unknown subtype */ /* Unknown subtype */
CPU_SH_NONE CPU_SH_NONE
......
include/asm-sh/se7300.h deleted 100644 → 0
View file @ 8e268f33
#ifndef __ASM_SH_HITACHI_SE7300_H
#define __ASM_SH_HITACHI_SE7300_H
/*
* linux/include/asm-sh/se/se7300.h
*
* Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
*
* SH-Mobile SolutionEngine 7300 support
*/
/* Box specific addresses. */
/* Area 0 */
#define PA_ROM 0x00000000 /* EPROM */
#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte(Actually 2MB) */
#define PA_FROM 0x00400000 /* Flash ROM */
#define PA_FROM_SIZE 0x00400000 /* Flash size 4M byte */
#define PA_SRAM 0x00800000 /* SRAM */
#define PA_FROM_SIZE 0x00400000 /* SRAM size 4M byte */
/* Area 1 */
#define PA_EXT1 0x04000000
#define PA_EXT1_SIZE 0x04000000
/* Area 2 */
#define PA_EXT2 0x08000000
#define PA_EXT2_SIZE 0x04000000
/* Area 3 */
#define PA_SDRAM 0x0c000000
#define PA_SDRAM_SIZE 0x04000000
/* Area 4 */
#define PA_PCIC 0x10000000 /* MR-SHPC-01 PCMCIA */
#define PA_MRSHPC 0xb03fffe0 /* MR-SHPC-01 PCMCIA controller */
#define PA_MRSHPC_MW1 0xb0400000 /* MR-SHPC-01 memory window base */
#define PA_MRSHPC_MW2 0xb0500000 /* MR-SHPC-01 attribute window base */
#define PA_MRSHPC_IO 0xb0600000 /* MR-SHPC-01 I/O window base */
#define MRSHPC_OPTION (PA_MRSHPC + 6)
#define MRSHPC_CSR (PA_MRSHPC + 8)
#define MRSHPC_ISR (PA_MRSHPC + 10)
#define MRSHPC_ICR (PA_MRSHPC + 12)
#define MRSHPC_CPWCR (PA_MRSHPC + 14)
#define MRSHPC_MW0CR1 (PA_MRSHPC + 16)
#define MRSHPC_MW1CR1 (PA_MRSHPC + 18)
#define MRSHPC_IOWCR1 (PA_MRSHPC + 20)
#define MRSHPC_MW0CR2 (PA_MRSHPC + 22)
#define MRSHPC_MW1CR2 (PA_MRSHPC + 24)
#define MRSHPC_IOWCR2 (PA_MRSHPC + 26)
#define MRSHPC_CDCR (PA_MRSHPC + 28)
#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30)
#define PA_LED 0xb0800000 /* LED */
#define PA_DIPSW 0xb0900000 /* Dip switch 31 */
#define PA_EPLD_MODESET 0xb0a00000 /* FPGA Mode set register */
#define PA_EPLD_ST1 0xb0a80000 /* FPGA Interrupt status register1 */
#define PA_EPLD_ST2 0xb0ac0000 /* FPGA Interrupt status register2 */
/* Area 5 */
#define PA_EXT5 0x14000000
#define PA_EXT5_SIZE 0x04000000
/* Area 6 */
#define PA_LCD1 0xb8000000
#define PA_LCD2 0xb8800000
#define __IO_PREFIX sh7300se
#include <asm/io_generic.h>
#endif /* __ASM_SH_HITACHI_SE7300_H */
include/asm-sh/se73180.h deleted 100644 → 0
View file @ 8e268f33
#ifndef __ASM_SH_SE73180_H
#define __ASM_SH_SE73180_H
/*
* Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
*
* SH-Mobile SolutionEngine 73180 support
*/
/* Box specific addresses. */
/* Area 0 */
#define PA_ROM 0x00000000 /* EPROM */
#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte(Actually 2MB) */
#define PA_FROM 0x00400000 /* Flash ROM */
#define PA_FROM_SIZE 0x00400000 /* Flash size 4M byte */
#define PA_SRAM 0x00800000 /* SRAM */
#define PA_FROM_SIZE 0x00400000 /* SRAM size 4M byte */
/* Area 1 */
#define PA_EXT1 0x04000000
#define PA_EXT1_SIZE 0x04000000
/* Area 2 */
#define PA_EXT2 0x08000000
#define PA_EXT2_SIZE 0x04000000
/* Area 3 */
#define PA_SDRAM 0x0c000000
#define PA_SDRAM_SIZE 0x04000000
/* Area 4 */
#define PA_PCIC 0x10000000 /* MR-SHPC-01 PCMCIA */
#define PA_MRSHPC 0xb03fffe0 /* MR-SHPC-01 PCMCIA controller */
#define PA_MRSHPC_MW1 0xb0400000 /* MR-SHPC-01 memory window base */
#define PA_MRSHPC_MW2 0xb0500000 /* MR-SHPC-01 attribute window base */
#define PA_MRSHPC_IO 0xb0600000 /* MR-SHPC-01 I/O window base */
#define MRSHPC_OPTION (PA_MRSHPC + 6)
#define MRSHPC_CSR (PA_MRSHPC + 8)
#define MRSHPC_ISR (PA_MRSHPC + 10)
#define MRSHPC_ICR (PA_MRSHPC + 12)
#define MRSHPC_CPWCR (PA_MRSHPC + 14)
#define MRSHPC_MW0CR1 (PA_MRSHPC + 16)
#define MRSHPC_MW1CR1 (PA_MRSHPC + 18)
#define MRSHPC_IOWCR1 (PA_MRSHPC + 20)
#define MRSHPC_MW0CR2 (PA_MRSHPC + 22)
#define MRSHPC_MW1CR2 (PA_MRSHPC + 24)
#define MRSHPC_IOWCR2 (PA_MRSHPC + 26)
#define MRSHPC_CDCR (PA_MRSHPC + 28)
#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30)
#define PA_LED 0xb0C00000 /* LED */
#define LED_SHIFT 0
#define PA_DIPSW 0xb0900000 /* Dip switch 31 */
#define PA_EPLD_MODESET 0xb0a00000 /* FPGA Mode set register */
#define PA_EPLD_ST1 0xb0a80000 /* FPGA Interrupt status register1 */
#define PA_EPLD_ST2 0xb0ac0000 /* FPGA Interrupt status register2 */
/* Area 5 */
#define PA_EXT5 0x14000000
#define PA_EXT5_SIZE 0x04000000
/* Area 6 */
#define PA_LCD1 0xb8000000
#define PA_LCD2 0xb8800000
#define __IO_PREFIX sh73180se
#include <asm/io_generic.h>
/* arch/sh/boards/se/73180/irq.c */
int shmse_irq_demux(int irq);
#endif /* __ASM_SH_SE73180_H */
include/asm-sh/ubc.h
View file @ 6a302358
...@@ -15,8 +15,7 @@ ...@@ -15,8 +15,7 @@
#include <asm/cpu/ubc.h> #include <asm/cpu/ubc.h>
/* User Break Controller */ /* User Break Controller */
#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \ #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
defined(CONFIG_CPU_SUBTYPE_SH7300)
#define UBC_TYPE_SH7729 (current_cpu_data.type == CPU_SH7729) #define UBC_TYPE_SH7729 (current_cpu_data.type == CPU_SH7729)
#else #else
#define UBC_TYPE_SH7729 0 #define UBC_TYPE_SH7729 0
......
init/Kconfig
View file @ 6a302358
...@@ -340,7 +340,7 @@ endif ...@@ -340,7 +340,7 @@ endif
config CC_OPTIMIZE_FOR_SIZE config CC_OPTIMIZE_FOR_SIZE
bool "Optimize for size (Look out for broken compilers!)" bool "Optimize for size (Look out for broken compilers!)"
default y default y
depends on ARM || H8300 || EXPERIMENTAL depends on ARM || H8300 || SUPERH || EXPERIMENTAL
help help
Enabling this option will pass "-Os" instead of "-O2" to gcc Enabling this option will pass "-Os" instead of "-O2" to gcc
resulting in a smaller kernel. resulting in a smaller kernel.
......
sound/sh/aica.h
View file @ 6a302358
...@@ -52,7 +52,7 @@ ...@@ -52,7 +52,7 @@
#define AICA_CHANNEL1_OFFSET 0x21000 #define AICA_CHANNEL1_OFFSET 0x21000
#define CHANNEL_OFFSET 0x10000 #define CHANNEL_OFFSET 0x10000
#define AICA_DMA_CHANNEL 0 #define AICA_DMA_CHANNEL 5
#define AICA_DMA_MODE 5 #define AICA_DMA_MODE 5
#define SND_AICA_DRIVER "AICA" #define SND_AICA_DRIVER "AICA"
......
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