Commit 6a32fd4d authored by David S. Miller's avatar David S. Miller

[SPARC64]: Remove PGLIST_NENTS PCI IOMMU mapping limitation on SUN4V.

Use a batching queue system for IOMMU mapping setup,
with a page sized batch.
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 04d74758
This diff is collapsed.
...@@ -6,7 +6,7 @@ ...@@ -6,7 +6,7 @@
#ifndef _PCI_SUN4V_H #ifndef _PCI_SUN4V_H
#define _PCI_SUN4V_H #define _PCI_SUN4V_H
extern unsigned long pci_sun4v_iommu_map(unsigned long devhandle, extern long pci_sun4v_iommu_map(unsigned long devhandle,
unsigned long tsbid, unsigned long tsbid,
unsigned long num_ttes, unsigned long num_ttes,
unsigned long io_attributes, unsigned long io_attributes,
......
...@@ -11,14 +11,19 @@ ...@@ -11,14 +11,19 @@
* %o3: io_attributes * %o3: io_attributes
* %o4: io_page_list phys address * %o4: io_page_list phys address
* *
* returns %o0: num ttes mapped * returns %o0: -status if status was non-zero, else
* %o0: num pages mapped
*/ */
.globl pci_sun4v_iommu_map .globl pci_sun4v_iommu_map
pci_sun4v_iommu_map: pci_sun4v_iommu_map:
mov %o5, %g1
mov HV_FAST_PCI_IOMMU_MAP, %o5 mov HV_FAST_PCI_IOMMU_MAP, %o5
ta HV_FAST_TRAP ta HV_FAST_TRAP
retl brnz,pn %o0, 1f
sub %g0, %o0, %o0
mov %o1, %o0 mov %o1, %o0
1: retl
nop
/* %o0: devhandle /* %o0: devhandle
* %o1: tsbid * %o1: tsbid
......
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