Commit 6a4123e5 authored by David Brownell's avatar David Brownell Committed by David Woodhouse

mtd: nand: davinci_nand, 4-bit ECC for smallpage

Minimal support for the 4-bit ECC engine found on DM355, DM365,
DA830/OMAP-L137, and similar recent DaVinci-family chips.

This is limited to small-page flash for now; there are some page
layout issues for large page chips.  Note that most boards using
this engine (like the DM355 EVM) include 2GiB large page chips.

Sanity tested on DM355 EVM after swapping the socketed NAND for
a small-page one.
Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: default avatarArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: default avatarDavid Woodhouse <David.Woodhouse@intel.com>
parent 533a0149
...@@ -68,10 +68,14 @@ struct davinci_nand_pdata { /* platform_data */ ...@@ -68,10 +68,14 @@ struct davinci_nand_pdata { /* platform_data */
/* none == NAND_ECC_NONE (strongly *not* advised!!) /* none == NAND_ECC_NONE (strongly *not* advised!!)
* soft == NAND_ECC_SOFT * soft == NAND_ECC_SOFT
* 1-bit == NAND_ECC_HW * else == NAND_ECC_HW, according to ecc_bits
* 4-bit == NAND_ECC_HW_SYNDROME (not on all chips) *
* All DaVinci-family chips support 1-bit hardware ECC.
* Newer ones also support 4-bit ECC, but are awkward
* using it with large page chips.
*/ */
nand_ecc_modes_t ecc_mode; nand_ecc_modes_t ecc_mode;
u8 ecc_bits;
/* e.g. NAND_BUSWIDTH_16 or NAND_USE_FLASH_BBT */ /* e.g. NAND_BUSWIDTH_16 or NAND_USE_FLASH_BBT */
unsigned options; unsigned options;
......
This diff is collapsed.
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment