Commit 6f32ea7e authored by Daniel Vetter's avatar Daniel Vetter

drm/i915/psr: Order DP aux transactions correctly

On bdw/hsw we have a separate psr dp aux registers to set up, but on
bdw it's shared with the main dp aux thing. Which means any subsequent
dp aux transaction will trample over it, and hence must be done
beforehand.

Also this means we can't do any dp aux transactions while PSR is
active, or at least we must restore the old state.

Probably need a psr disable/enable pair around dp aux transactions in
general.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Sonika Jindal <sonika.jindal@intel.com>
Cc: Durgadoss R <durgadoss.r@intel.com>
Cc: "Pandiyan, Dhinakaran" <dhinakaran.pandiyan@intel.com>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Tested-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463590036-17824-5-git-send-email-daniel.vetter@ffwll.ch
parent 1c80c25f
...@@ -197,6 +197,13 @@ static void hsw_psr_enable_sink(struct intel_dp *intel_dp) ...@@ -197,6 +197,13 @@ static void hsw_psr_enable_sink(struct intel_dp *intel_dp)
DP_SINK_DEVICE_AUX_FRAME_SYNC_CONF, DP_SINK_DEVICE_AUX_FRAME_SYNC_CONF,
DP_AUX_FRAME_SYNC_ENABLE); DP_AUX_FRAME_SYNC_ENABLE);
if (dev_priv->psr.link_standby)
drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG,
DP_PSR_ENABLE | DP_PSR_MAIN_LINK_ACTIVE);
else
drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG,
DP_PSR_ENABLE);
aux_ctl_reg = psr_aux_ctl_reg(dev_priv, port); aux_ctl_reg = psr_aux_ctl_reg(dev_priv, port);
/* Setup AUX registers */ /* Setup AUX registers */
...@@ -224,13 +231,6 @@ static void hsw_psr_enable_sink(struct intel_dp *intel_dp) ...@@ -224,13 +231,6 @@ static void hsw_psr_enable_sink(struct intel_dp *intel_dp)
(precharge << DP_AUX_CH_CTL_PRECHARGE_2US_SHIFT) | (precharge << DP_AUX_CH_CTL_PRECHARGE_2US_SHIFT) |
(aux_clock_divider << DP_AUX_CH_CTL_BIT_CLOCK_2X_SHIFT)); (aux_clock_divider << DP_AUX_CH_CTL_BIT_CLOCK_2X_SHIFT));
} }
if (dev_priv->psr.link_standby)
drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG,
DP_PSR_ENABLE | DP_PSR_MAIN_LINK_ACTIVE);
else
drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG,
DP_PSR_ENABLE);
} }
static void vlv_psr_enable_source(struct intel_dp *intel_dp) static void vlv_psr_enable_source(struct intel_dp *intel_dp)
......
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