Commit 7008ee12 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'riscv/for-v5.5-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V fixes from Paul Walmsley:
 "Three fixes for RISC-V:

   - Don't free and reuse memory containing the code that CPUs parked at
     boot reside in.

   - Fix rv64 build problems for ubsan and some modules by adding
     logical and arithmetic shift helpers for 128-bit values. These are
     from libgcc and are similar to what's present for ARM64.

   - Fix vDSO builds to clean up their own temporary files"

* tag 'riscv/for-v5.5-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  riscv: Less inefficient gcc tishift helpers (and export their symbols)
  riscv: delete temporary files
  riscv: make sure the cores stay looping in .Lsecondary_park
parents 11a82729 fc585d4a
...@@ -5,4 +5,8 @@ ...@@ -5,4 +5,8 @@
#include <linux/ftrace.h> #include <linux/ftrace.h>
#include <asm-generic/asm-prototypes.h> #include <asm-generic/asm-prototypes.h>
long long __lshrti3(long long a, int b);
long long __ashrti3(long long a, int b);
long long __ashlti3(long long a, int b);
#endif /* _ASM_RISCV_PROTOTYPES_H */ #endif /* _ASM_RISCV_PROTOTYPES_H */
...@@ -80,7 +80,9 @@ _start_kernel: ...@@ -80,7 +80,9 @@ _start_kernel:
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
li t0, CONFIG_NR_CPUS li t0, CONFIG_NR_CPUS
bgeu a0, t0, .Lsecondary_park blt a0, t0, .Lgood_cores
tail .Lsecondary_park
.Lgood_cores:
#endif #endif
/* Pick one hart to run the main boot sequence */ /* Pick one hart to run the main boot sequence */
...@@ -209,11 +211,6 @@ relocate: ...@@ -209,11 +211,6 @@ relocate:
tail smp_callin tail smp_callin
#endif #endif
.align 2
.Lsecondary_park:
/* We lack SMP support or have too many harts, so park this hart */
wfi
j .Lsecondary_park
END(_start) END(_start)
#ifdef CONFIG_RISCV_M_MODE #ifdef CONFIG_RISCV_M_MODE
...@@ -295,6 +292,13 @@ ENTRY(reset_regs) ...@@ -295,6 +292,13 @@ ENTRY(reset_regs)
END(reset_regs) END(reset_regs)
#endif /* CONFIG_RISCV_M_MODE */ #endif /* CONFIG_RISCV_M_MODE */
.section ".text", "ax",@progbits
.align 2
.Lsecondary_park:
/* We lack SMP support or have too many harts, so park this hart */
wfi
j .Lsecondary_park
__PAGE_ALIGNED_BSS __PAGE_ALIGNED_BSS
/* Empty zero page */ /* Empty zero page */
.balign PAGE_SIZE .balign PAGE_SIZE
...@@ -58,7 +58,8 @@ quiet_cmd_vdsold = VDSOLD $@ ...@@ -58,7 +58,8 @@ quiet_cmd_vdsold = VDSOLD $@
cmd_vdsold = $(CC) $(KBUILD_CFLAGS) $(call cc-option, -no-pie) -nostdlib -nostartfiles $(SYSCFLAGS_$(@F)) \ cmd_vdsold = $(CC) $(KBUILD_CFLAGS) $(call cc-option, -no-pie) -nostdlib -nostartfiles $(SYSCFLAGS_$(@F)) \
-Wl,-T,$(filter-out FORCE,$^) -o $@.tmp && \ -Wl,-T,$(filter-out FORCE,$^) -o $@.tmp && \
$(CROSS_COMPILE)objcopy \ $(CROSS_COMPILE)objcopy \
$(patsubst %, -G __vdso_%, $(vdso-syms)) $@.tmp $@ $(patsubst %, -G __vdso_%, $(vdso-syms)) $@.tmp $@ && \
rm $@.tmp
# install commands for the unstripped file # install commands for the unstripped file
quiet_cmd_vdso_install = INSTALL $@ quiet_cmd_vdso_install = INSTALL $@
......
...@@ -4,34 +4,73 @@ ...@@ -4,34 +4,73 @@
*/ */
#include <linux/linkage.h> #include <linux/linkage.h>
#include <asm-generic/export.h>
ENTRY(__lshrti3) SYM_FUNC_START(__lshrti3)
beqz a2, .L1 beqz a2, .L1
li a5,64 li a5,64
sub a5,a5,a2 sub a5,a5,a2
addi sp,sp,-16
sext.w a4,a5 sext.w a4,a5
blez a5, .L2 blez a5, .L2
sext.w a2,a2 sext.w a2,a2
sll a4,a1,a4
srl a0,a0,a2 srl a0,a0,a2
srl a1,a1,a2 sll a4,a1,a4
srl a2,a1,a2
or a0,a0,a4 or a0,a0,a4
sd a1,8(sp) mv a1,a2
sd a0,0(sp)
ld a0,0(sp)
ld a1,8(sp)
addi sp,sp,16
ret
.L1: .L1:
ret ret
.L2: .L2:
negw a4,a4 negw a0,a4
srl a1,a1,a4 li a2,0
sd a1,0(sp) srl a0,a1,a0
sd zero,8(sp) mv a1,a2
ld a0,0(sp) ret
ld a1,8(sp) SYM_FUNC_END(__lshrti3)
addi sp,sp,16 EXPORT_SYMBOL(__lshrti3)
SYM_FUNC_START(__ashrti3)
beqz a2, .L3
li a5,64
sub a5,a5,a2
sext.w a4,a5
blez a5, .L4
sext.w a2,a2
srl a0,a0,a2
sll a4,a1,a4
sra a2,a1,a2
or a0,a0,a4
mv a1,a2
.L3:
ret
.L4:
negw a0,a4
srai a2,a1,0x3f
sra a0,a1,a0
mv a1,a2
ret
SYM_FUNC_END(__ashrti3)
EXPORT_SYMBOL(__ashrti3)
SYM_FUNC_START(__ashlti3)
beqz a2, .L5
li a5,64
sub a5,a5,a2
sext.w a4,a5
blez a5, .L6
sext.w a2,a2
sll a1,a1,a2
srl a4,a0,a4
sll a2,a0,a2
or a1,a1,a4
mv a0,a2
.L5:
ret
.L6:
negw a1,a4
li a2,0
sll a1,a0,a1
mv a0,a2
ret ret
ENDPROC(__lshrti3) SYM_FUNC_END(__ashlti3)
EXPORT_SYMBOL(__ashlti3)
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