Merge tiger.hpl.hp.com:/data1/bk/vanilla/linux-2.5

into tiger.hpl.hp.com:/data1/bk/lia64/to-linus-2.5

arch/ia64/Kconfig

@@ -214,15 +214,6 @@ config FORCE_MAX_ZONEORDER
 	int
 	default "18"
 
-config IA64_PAL_IDLE
-	bool "Use PAL_HALT_LIGHT in idle loop"
-	help
-	  Say Y here to enable use of PAL_HALT_LIGHT in the cpu_idle loop.
-	  This allows the CPU to enter a low power state when idle.  You
-	  can enable CONFIG_IA64_PALINFO and check /proc/pal/cpu0/power_info
-	  to see the power consumption and latency for this state.  If you're
-	  unsure your firmware supports it, answer N.
-
 config SMP
 	bool "Symmetric multi-processing support"
 	help
@@ -344,47 +335,6 @@ config ACPI
 	bool
 	depends on !IA64_HP_SIM
 	default y
-	help
-	  ACPI/OSPM support for Linux is currently under development. As such,
-	  this support is preliminary and EXPERIMENTAL.  Configuring ACPI
-	  support enables kernel interfaces that allow higher level software
-	  (OSPM) to manipulate ACPI defined hardware and software interfaces,
-	  including the evaluation of ACPI control methods.  If unsure, choose
-	  N here.  Note, this option will enlarge your kernel by about 120K.
-
-	  This support requires an ACPI compliant platform (hardware/firmware).
-	  If both ACPI and Advanced Power Management (APM) support are
-	  configured, whichever is loaded first shall be used.
-
-	  This code DOES NOT currently provide a complete OSPM implementation
-	  -- it has not yet reached APM's level of functionality.  When fully
-	  implemented, Linux ACPI/OSPM will provide a more robust functional
-	  replacement for legacy configuration and power management
-	  interfaces, including the Plug-and-Play BIOS specification (PnP
-	  BIOS), the Multi-Processor Specification (MPS), and the Advanced
-	  Power Management specification (APM).
-
-	  Linux support for ACPI/OSPM is based on Intel Corporation's ACPI
-	  Component Architecture (ACPI CA). The latest ACPI CA source code,
-	  documentation, debug builds, and implementation status information
-	  can be downloaded from:
-	  <http://developer.intel.com/technology/iapc/acpi/downloads.htm>.
-
-	  The ACPI Sourceforge project may also be of interest:
-	  <http://sf.net/projects/acpi/>
-
-config ACPI_INTERPRETER
-	bool
-	depends on !IA64_HP_SIM
-	default y
-
-config ACPI_KERNEL_CONFIG
-	bool
-	depends on !IA64_HP_SIM
-	default y
-	help
-	  If you say `Y' here, Linux's ACPI support will use the
-	  hardware-level system descriptions found on IA-64 systems.
 
 if !IA64_HP_SIM
 

arch/ia64/kernel/gate.S

@@ -234,7 +234,7 @@ back_from_setup_rbs:
 	br.call.sptk.many rp=b6			// call the signal handler
 .ret0:	adds base0=(BSP_OFF+SIGCONTEXT_OFF),sp
 	;;
-	ld8 r15=[base0],(CFM_OFF-BSP_OFF)	// fetch sc_ar_bsp and advance to CFM_OFF
+	ld8 r15=[base0]				// fetch sc_ar_bsp
 	mov r14=ar.bsp
 	;;
 	cmp.ne p1,p0=r14,r15			// do we need to restore the rbs?

arch/ia64/kernel/machvec.c

@@ -50,8 +50,27 @@ machvec_noop (void)
 EXPORT_SYMBOL(machvec_noop);
 
 void
-machvec_memory_fence (void)
+machvec_setup (char **arg)
+{
+}
+EXPORT_SYMBOL(machvec_setup);
+
+void
+machvec_timer_interrupt (int irq, void *dev_id, struct pt_regs *regs)
+{
+}
+EXPORT_SYMBOL(machvec_timer_interrupt);
+
+void
+machvec_dma_sync_single (struct device *hwdev, dma_addr_t dma_handle, size_t size, int dir)
+{
+	mb();
+}
+EXPORT_SYMBOL(machvec_dma_sync_single);
+
+void
+machvec_dma_sync_sg (struct device *hwdev, struct scatterlist *sg, int n, int dir)
 {
 	mb();
 }
-EXPORT_SYMBOL(machvec_memory_fence);
+EXPORT_SYMBOL(machvec_dma_sync_sg);

arch/ia64/kernel/process.c

@@ -159,16 +159,25 @@ do_notify_resume_user (sigset_t *oldset, struct sigscratch *scr, long in_syscall
 		ia64_do_signal(oldset, scr, in_syscall);
 }
 
+static int pal_halt = 1;
+static int __init nohalt_setup(char * str)
+{
+	pal_halt = 0;
+	return 1;
+}
+__setup("nohalt", nohalt_setup);
+
 /*
  * We use this if we don't have any better idle routine..
  */
 void
 default_idle (void)
 {
-#ifdef CONFIG_IA64_PAL_IDLE
-	if (!need_resched())
+	unsigned long pmu_active = ia64_getreg(_IA64_REG_PSR) &
+				   (IA64_PSR_PP | IA64_PSR_UP);
+	while (!need_resched())
+		if (pal_halt && !pmu_active)
 			safe_halt();
-#endif
 }
 
 void __attribute__((noreturn))

arch/ia64/kernel/setup.c

@@ -229,6 +229,38 @@ find_initrd (void)
 #endif
 }
 
+static void __init
+io_port_init (void)
+{
+	extern unsigned long ia64_iobase;
+	unsigned long phys_iobase;
+
+	/*
+	 *  Set `iobase' to the appropriate address in region 6 (uncached access range).
+	 *
+	 *  The EFI memory map is the "preferred" location to get the I/O port space base,
+	 *  rather the relying on AR.KR0. This should become more clear in future SAL
+	 *  specs. We'll fall back to getting it out of AR.KR0 if no appropriate entry is
+	 *  found in the memory map.
+	 */
+	phys_iobase = efi_get_iobase();
+	if (phys_iobase)
+		/* set AR.KR0 since this is all we use it for anyway */
+		ia64_set_kr(IA64_KR_IO_BASE, phys_iobase);
+	else {
+		phys_iobase = ia64_get_kr(IA64_KR_IO_BASE);
+		printk(KERN_INFO "No I/O port range found in EFI memory map, falling back "
+		       "to AR.KR0\n");
+		printk(KERN_INFO "I/O port base = 0x%lx\n", phys_iobase);
+	}
+	ia64_iobase = (unsigned long) ioremap(phys_iobase, 0);
+
+	/* setup legacy IO port space */
+	io_space[0].mmio_base = ia64_iobase;
+	io_space[0].sparse = 1;
+	num_io_spaces = 1;
+}
+
 #ifdef CONFIG_SERIAL_8250_CONSOLE
 static void __init
 setup_serial_legacy (void)
@@ -251,9 +283,6 @@ setup_serial_legacy (void)
 void __init
 setup_arch (char **cmdline_p)
 {
-	extern unsigned long ia64_iobase;
-	unsigned long phys_iobase;
-
 	unw_init();
 
 	ia64_patch_vtop((u64) __start___vtop_patchlist, (u64) __end___vtop_patchlist);
@@ -262,6 +291,11 @@ setup_arch (char **cmdline_p)
 	strlcpy(saved_command_line, *cmdline_p, sizeof(saved_command_line));
 
 	efi_init();
+	io_port_init();
+
+#ifdef CONFIG_IA64_GENERIC
+	machvec_init(acpi_get_sysname());
+#endif
 
 #ifdef CONFIG_ACPI_BOOT
 	/* Initialize the ACPI boot-time table parser */
@@ -280,35 +314,6 @@ setup_arch (char **cmdline_p)
 	/* process SAL system table: */
 	ia64_sal_init(efi.sal_systab);
 
-#ifdef CONFIG_IA64_GENERIC
-	machvec_init(acpi_get_sysname());
-#endif
-
-	/*
-	 *  Set `iobase' to the appropriate address in region 6 (uncached access range).
-	 *
-	 *  The EFI memory map is the "preferred" location to get the I/O port space base,
-	 *  rather the relying on AR.KR0. This should become more clear in future SAL
-	 *  specs. We'll fall back to getting it out of AR.KR0 if no appropriate entry is
-	 *  found in the memory map.
-	 */
-	phys_iobase = efi_get_iobase();
-	if (phys_iobase)
-		/* set AR.KR0 since this is all we use it for anyway */
-		ia64_set_kr(IA64_KR_IO_BASE, phys_iobase);
-	else {
-		phys_iobase = ia64_get_kr(IA64_KR_IO_BASE);
-		printk(KERN_INFO "No I/O port range found in EFI memory map, falling back "
-		       "to AR.KR0\n");
-		printk(KERN_INFO "I/O port base = 0x%lx\n", phys_iobase);
-	}
-	ia64_iobase = (unsigned long) ioremap(phys_iobase, 0);
-
-	/* setup legacy IO port space */
-	io_space[0].mmio_base = ia64_iobase;
-	io_space[0].sparse = 1;
-	num_io_spaces = 1;
-
 #ifdef CONFIG_SMP
 	cpu_physical_id(0) = hard_smp_processor_id();
 #endif

arch/ia64/kernel/vmlinux.lds.S

@@ -12,6 +12,11 @@ OUTPUT_FORMAT("elf64-ia64-little")
 OUTPUT_ARCH(ia64)
 ENTRY(phys_start)
 jiffies = jiffies_64;
+PHDRS {
+  code   PT_LOAD;
+  percpu PT_LOAD;
+  data   PT_LOAD;
+}
 SECTIONS
 {
   /* Sections to be discarded */
@@ -26,6 +31,7 @@ SECTIONS
   v = PAGE_OFFSET;	/* this symbol is here to make debugging easier... */
   phys_start = _start - LOAD_OFFSET;
 
+  code : { } :code
   . = KERNEL_START;
 
   _text = .;
@@ -173,6 +179,7 @@ SECTIONS
         { *(.data.cacheline_aligned) }
 
   /* Per-cpu data: */
+  percpu : { } :percpu
   . = ALIGN(PERCPU_PAGE_SIZE);
   __phys_per_cpu_start = .;
   .data.percpu PERCPU_ADDR : AT(__phys_per_cpu_start - LOAD_OFFSET)
@@ -183,6 +190,7 @@ SECTIONS
 	}
   . = __phys_per_cpu_start + PERCPU_PAGE_SIZE;	/* ensure percpu data fits into percpu page size */
 
+  data : { } :data
   .data : AT(ADDR(.data) - LOAD_OFFSET)
 	{ *(.data) *(.data1) *(.gnu.linkonce.d*) CONSTRUCTORS }
 
@@ -205,6 +213,7 @@ SECTIONS
 
   _end = .;
 
+  code : { } :code
   /* Stabs debugging sections.  */
   .stab 0 : { *(.stab) }
   .stabstr 0 : { *(.stabstr) }

arch/ia64/sn/kernel/sn2/sn_proc_fs.c

@@ -73,8 +73,13 @@ register_sn_serial_numbers(void) {
 	}
 }
 
-// Disable forced interrupts, but leave the code in, just in case.
-int sn_force_interrupt_flag = 0;
+/*
+ * Enable forced interrupt by default.
+ * When set, the sn interrupt handler writes the force interrupt register on
+ * the bridge chip.  The hardware will then send an interrupt message if the
+ * interrupt line is active.  This mimics a level sensitive interrupt.
+ */
+int sn_force_interrupt_flag = 1;
 
 static int
 sn_force_interrupt_read_proc(char *page, char **start, off_t off,

include/asm-ia64/machvec.h

@@ -4,7 +4,7 @@
  * Copyright (C) 1999 Silicon Graphics, Inc.
  * Copyright (C) Srinivasa Thirumalachar <sprasad@engr.sgi.com>
  * Copyright (C) Vijay Chander <vijay@engr.sgi.com>
- * Copyright (C) 1999-2001, 2003 Hewlett-Packard Co.
+ * Copyright (C) 1999-2001, 2003-2004 Hewlett-Packard Co.
  *	David Mosberger-Tang <davidm@hpl.hp.com>
  */
 #ifndef _ASM_IA64_MACHVEC_H
@@ -21,12 +21,8 @@ struct irq_desc;
 struct page;
 
 typedef void ia64_mv_setup_t (char **);
-typedef void ia64_mv_cpu_init_t(void);
+typedef void ia64_mv_cpu_init_t (void);
 typedef void ia64_mv_irq_init_t (void);
-typedef void ia64_mv_mca_init_t (void);
-typedef void ia64_mv_mca_handler_t (void);
-typedef void ia64_mv_cmci_handler_t (int, void *, struct pt_regs *);
-typedef void ia64_mv_log_print_t (void);
 typedef void ia64_mv_send_ipi_t (int, int, int, int);
 typedef void ia64_mv_timer_interrupt_t (int, void *, struct pt_regs *);
 typedef void ia64_mv_global_tlb_purge_t (unsigned long, unsigned long, unsigned long);
@@ -73,7 +69,10 @@ typedef unsigned int ia64_mv_readl_relaxed_t (void *);
 typedef unsigned long ia64_mv_readq_relaxed_t (void *);
 
 extern void machvec_noop (void);
-extern void machvec_memory_fence (void);
+extern void machvec_setup (char **);
+extern void machvec_timer_interrupt (int, void *, struct pt_regs *);
+extern void machvec_dma_sync_single (struct device *, dma_addr_t, size_t, int);
+extern void machvec_dma_sync_sg (struct device *, struct scatterlist *, int, int);
 
 # if defined (CONFIG_IA64_HP_SIM)
 #  include <asm/machvec_hpsim.h>
@@ -92,10 +91,6 @@ extern void machvec_memory_fence (void);
 #  define platform_setup	ia64_mv.setup
 #  define platform_cpu_init	ia64_mv.cpu_init
 #  define platform_irq_init	ia64_mv.irq_init
-#  define platform_mca_init	ia64_mv.mca_init
-#  define platform_mca_handler	ia64_mv.mca_handler
-#  define platform_cmci_handler	ia64_mv.cmci_handler
-#  define platform_log_print	ia64_mv.log_print
 #  define platform_send_ipi	ia64_mv.send_ipi
 #  define platform_timer_interrupt	ia64_mv.timer_interrupt
 #  define platform_global_tlb_purge	ia64_mv.global_tlb_purge
@@ -140,10 +135,6 @@ struct ia64_machine_vector {
 	ia64_mv_setup_t *setup;
 	ia64_mv_cpu_init_t *cpu_init;
 	ia64_mv_irq_init_t *irq_init;
-	ia64_mv_mca_init_t *mca_init;
-	ia64_mv_mca_handler_t *mca_handler;
-	ia64_mv_cmci_handler_t *cmci_handler;
-	ia64_mv_log_print_t *log_print;
 	ia64_mv_send_ipi_t *send_ipi;
 	ia64_mv_timer_interrupt_t *timer_interrupt;
 	ia64_mv_global_tlb_purge_t *global_tlb_purge;
@@ -184,10 +175,6 @@ struct ia64_machine_vector {
 	platform_setup,				\
 	platform_cpu_init,			\
 	platform_irq_init,			\
-	platform_mca_init,			\
-	platform_mca_handler,			\
-	platform_cmci_handler,			\
-	platform_log_print,			\
 	platform_send_ipi,			\
 	platform_timer_interrupt,		\
 	platform_global_tlb_purge,		\
@@ -250,31 +237,20 @@ extern ia64_mv_dma_supported		swiotlb_dma_supported;
  * to update the machvec files for all existing platforms.
  */
 #ifndef platform_setup
-# define platform_setup		((ia64_mv_setup_t *) machvec_noop)
+# define platform_setup			machvec_setup
 #endif
 #ifndef platform_cpu_init
-# define platform_cpu_init	((ia64_mv_cpu_init_t *) machvec_noop)
+# define platform_cpu_init		machvec_noop
 #endif
 #ifndef platform_irq_init
-# define platform_irq_init	((ia64_mv_irq_init_t *) machvec_noop)
-#endif
-#ifndef platform_mca_init
-# define platform_mca_init	((ia64_mv_mca_init_t *) machvec_noop)
-#endif
-#ifndef platform_mca_handler
-# define platform_mca_handler	((ia64_mv_mca_handler_t *) machvec_noop)
-#endif
-#ifndef platform_cmci_handler
-# define platform_cmci_handler	((ia64_mv_cmci_handler_t *) machvec_noop)
-#endif
-#ifndef platform_log_print
-# define platform_log_print	((ia64_mv_log_print_t *) machvec_noop)
+# define platform_irq_init		machvec_noop
 #endif
+
 #ifndef platform_send_ipi
 # define platform_send_ipi		ia64_send_ipi	/* default to architected version */
 #endif
 #ifndef platform_timer_interrupt
-# define platform_timer_interrupt 	((ia64_mv_timer_interrupt_t *) machvec_noop)
+# define platform_timer_interrupt 	machvec_timer_interrupt
 #endif
 #ifndef platform_global_tlb_purge
 # define platform_global_tlb_purge	ia64_global_tlb_purge /* default to architected version */

include/asm-ia64/machvec_hpzx1.h

@@ -26,10 +26,10 @@ extern ia64_mv_dma_supported		sba_dma_supported;
 #define platform_dma_unmap_single	sba_unmap_single
 #define platform_dma_map_sg		sba_map_sg
 #define platform_dma_unmap_sg		sba_unmap_sg
-#define platform_dma_sync_single_for_cpu ((ia64_mv_dma_sync_single_for_cpu *) machvec_memory_fence)
-#define platform_dma_sync_sg_for_cpu	((ia64_mv_dma_sync_sg_for_cpu *) machvec_memory_fence)
-#define platform_dma_sync_single_for_device ((ia64_mv_dma_sync_single_for_device *) machvec_memory_fence)
-#define platform_dma_sync_sg_for_device	((ia64_mv_dma_sync_sg_for_device *) machvec_memory_fence)
+#define platform_dma_sync_single_for_cpu	machvec_dma_sync_single
+#define platform_dma_sync_sg_for_cpu		machvec_dma_sync_sg
+#define platform_dma_sync_single_for_device	machvec_dma_sync_single
+#define platform_dma_sync_sg_for_device		machvec_dma_sync_sg
 #define platform_dma_supported			sba_dma_supported
 
 #endif /* _ASM_IA64_MACHVEC_HPZX1_h */