v2.4.5.9 -> v2.4.6

  - misc mtd updates

Makefile

 VERSION = 2
 PATCHLEVEL = 4
 SUBLEVEL = 6
-EXTRAVERSION =-pre9
+EXTRAVERSION =
 
 KERNELRELEASE=$(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
 

drivers/char/Config.in

@@ -186,7 +186,7 @@ if [ "$CONFIG_AGP" != "n" ]; then
    bool '  AMD Irongate support' CONFIG_AGP_AMD
    bool '  Generic SiS support' CONFIG_AGP_SIS
    bool '  ALI chipset support' CONFIG_AGP_ALI
-   bool '  Severworks LE/HE support' CONFIG_AGP_SWORKS
+   bool '  Serverworks LE/HE support' CONFIG_AGP_SWORKS
 fi
 
 source drivers/char/drm/Config.in

drivers/mtd/nand/Config.in

 # drivers/mtd/nand/Config.in
 
-# $Id: Config.in,v 1.1 2001/04/20 15:27:38 dwmw2 Exp $
+# $Id: Config.in,v 1.3 2001/07/03 17:50:56 sjhill Exp $
 
 mainmenu_option next_comment
 
@@ -11,6 +11,8 @@ if [ "$CONFIG_MTD_NAND" = "y" -o "$CONFIG_MTD_NAND" = "m" ]; then
    bool '    Enable ECC correction algorithm'  CONFIG_MTD_NAND_ECC y
    bool '    Verify NAND page writes' CONFIG_MTD_NAND_VERIFY_WRITE y
 fi
-dep_tristate '  NAND Flash device on SPIA board' CONFIG_MTD_NAND_SPIA $CONFIG_MTD_NAND
+if [ "$CONFIG_ARM" = "y" -a "$CONFIG_ARCH_P720T" = "y" ]; then
+   dep_tristate '  NAND Flash device on SPIA board' CONFIG_MTD_NAND_SPIA $CONFIG_MTD_NAND
+fi
 
 endmenu

drivers/mtd/nand/spia.c

@@ -3,7 +3,7 @@
  *
  *  Copyright (C) 2000 Steven J. Hill (sjhill@cotw.com)
  *
- * $Id: spia.c,v 1.9 2001/06/02 14:47:16 dwmw2 Exp $
+ * $Id: spia.c,v 1.11 2001/07/03 17:50:56 sjhill Exp $
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -27,6 +27,22 @@
  */
 static struct mtd_info *spia_mtd = NULL;
 
+/*
+ * Values specific to the SPIA board (used with EP7212 processor)
+ */
+#define SPIA_IO_ADDR	= 0xd0000000	/* Start of EP7212 IO address space */
+#define SPIA_FIO_ADDR	= 0xf0000000	/* Address where flash is mapped */
+#define SPIA_PEDR	= 0x0080	/*
+					 * IO offset to Port E data register
+					 * where the CLE, ALE and NCE pins
+					 * are wired to.
+					 */
+#define SPIA_PEDDR	= 0x00c0	/*
+					 * IO offset to Port E data direction
+					 * register so we can control the IO
+					 * lines.
+					 */
+
 /*
  * Module stuff
  */
@@ -35,6 +51,21 @@ static struct mtd_info *spia_mtd = NULL;
   #define spia_cleanup cleanup_module
 #endif
 
+static int spia_io_base = SPIA_IO_BASE;
+static int spia_fio_base = SPIA_FIO_BASE;
+static int spia_pedr = SPIA_PEDR;
+static int spia_peddr = SPIA_PEDDR;
+
+MODULE_PARM(spia_io_base, "i");
+MODULE_PARM(spia_fio_base, "i");
+MODULE_PARM(spia_pedr, "i");
+MODULE_PARM(spia_peddr, "i");
+
+__setup("spia_io_base=",spia_io_base);
+__setup("spia_fio_base=",spia_fio_base);
+__setup("spia_pedr=",spia_pedr);
+__setup("spia_peddr=",spia_peddr);
+
 /*
  * Define partitions for flash device
  */
@@ -77,11 +108,11 @@ int __init spia_init (void)
 	 * Set GPIO Port E control register so that the pins are configured
 	 * to be outputs for controlling the NAND flash.
 	 */
-	(*(volatile unsigned char *) (IO_BASE + PEDDR)) = 0x07;
+	(*(volatile unsigned char *) (spia_io_base + spia_peddr)) = 0x07;
 
 	/* Set address of NAND IO lines */
-	this->IO_ADDR = FIO_BASE;
-	this->CTRL_ADDR = IO_BASE + PEDR;
+	this->IO_ADDR = spia_fio_base;
+	this->CTRL_ADDR = spia_io_base + spia_pedr;
 	this->CLE = 0x01;
 	this->ALE = 0x02;
 	this->NCE = 0x04;

drivers/pcmcia/yenta.c

@@ -793,6 +793,7 @@ static struct cardbus_override_struct {
 	{ PD(TI,1251A),	&ti_ops },
 	{ PD(TI,1211),	&ti_ops },
 	{ PD(TI,1251B),	&ti_ops },
+	{ PD(TI,1410),	&ti_ops },
 	{ PD(TI,1420),	&ti_ops },
 
 	{ PD(RICOH,RL5C465), &ricoh_ops },

drivers/sound/i810_audio.c

@@ -1446,7 +1446,7 @@ static int i810_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
 		if (dmabuf->enable & ADC_RUNNING) {
 			stop_adc(state);
 		}
-		return ret;
+		return put_user(ret, (int *)arg);
 
 	case SNDCTL_DSP_GETBLKSIZE:
 		if (file->f_mode & FMODE_WRITE) {

fs/ext2/ialloc.c

@@ -194,6 +194,7 @@ void ext2_free_inode (struct inode * inode)
 	 * Note: we must free any quota before locking the superblock,
 	 * as writing the quota to disk may need the lock as well.
 	 */
+	DQUOT_INIT(inode);
 	DQUOT_FREE_INODE(sb, inode);
 	DQUOT_DROP(inode);
 
@@ -417,7 +418,6 @@ struct inode * ext2_new_inode (const struct inode * dir, int mode)
 		cpu_to_le32(le32_to_cpu(es->s_free_inodes_count) - 1);
 	mark_buffer_dirty(sb->u.ext2_sb.s_sbh);
 	sb->s_dirt = 1;
-	inode->i_mode = mode;
 	inode->i_uid = current->fsuid;
 	if (test_opt (sb, GRPID))
 		inode->i_gid = dir->i_gid;
@@ -427,6 +427,7 @@ struct inode * ext2_new_inode (const struct inode * dir, int mode)
 			mode |= S_ISGID;
 	} else
 		inode->i_gid = current->fsgid;
+	inode->i_mode = mode;
 
 	inode->i_ino = j;
 	inode->i_blksize = PAGE_SIZE;	/* This is the optimal IO size (for stat), not the fs block size */

fs/namei.c

@@ -1126,10 +1126,10 @@ int open_namei(const char * pathname, int flag, int mode, struct nameidata *nd)
 		putname(nd->last.name);
 		goto exit;
 	}
+	error = -ELOOP;
 	if (count++==32) {
-		dentry = nd->dentry;
 		putname(nd->last.name);
-		goto ok;
+		goto exit;
 	}
 	dir = nd->dentry;
 	down(&dir->d_inode->i_sem);

fs/proc/base.c

@@ -341,6 +341,8 @@ static ssize_t mem_read(struct file * file, char * buf,
 	if (mm)
 		atomic_inc(&mm->mm_users);
 	task_unlock(task);
+	if (!mm)
+		return 0;
 
 	if (file->private_data != (void*)((long)current->self_exec_id) ) {
 		mmput(mm);

include/linux/pci.h

@@ -642,7 +642,6 @@ static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; }
 static inline void pci_disable_device(struct pci_dev *dev) { }
 static inline int pci_module_init(struct pci_driver *drv) { return -ENODEV; }
 static inline int pci_set_dma_mask(struct pci_dev *dev, dma_addr_t mask) { return -EIO; }
-static inline int pci_set_power_state(struct pci_dev *dev, int state) { return 0; }
 static inline int pci_assign_resource(struct pci_dev *dev, int i) { return -EBUSY;}
 static inline int pci_register_driver(struct pci_driver *drv) { return 0;}
 static inline void pci_unregister_driver(struct pci_driver *drv) { }

include/linux/pci_ids.h

@@ -519,6 +519,7 @@
 #define PCI_DEVICE_ID_TI_1220		0xac17
 #define PCI_DEVICE_ID_TI_1221		0xac19
 #define PCI_DEVICE_ID_TI_1210		0xac1a
+#define PCI_DEVICE_ID_TI_1410		0xac50
 #define PCI_DEVICE_ID_TI_1450		0xac1b
 #define PCI_DEVICE_ID_TI_1225		0xac1c
 #define PCI_DEVICE_ID_TI_1251A		0xac1d

mm/mmap.c

@@ -65,6 +65,14 @@ int vm_enough_memory(long pages)
 	free += nr_free_pages();
 	free += nr_swap_pages;
 
+	/*
+	 * This double-counts: the nrpages are both in the page-cache
+	 * and in the swapper space. At the same time, this compensates
+	 * for the swap-space over-allocation (ie "nr_swap_pages" being
+	 * too small. 
+	 */
+	free += swapper_space.nrpages;
+
 	/*
 	 * The code below doesn't account for free space in the inode
 	 * and dentry slab cache, slab cache fragmentation, inodes and