Commit 74d22408 authored by Lorenzo Pieralisi's avatar Lorenzo Pieralisi Committed by Greg Kroah-Hartman

ARM: dts: imx: cpus/cpu nodes dts updates

commit 7925e89f upstream.

This patch updates the in-kernel dts files according to the latest cpus
and cpu bindings updates for ARM.
Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: default avatarShawn Guo <shawn.guo@linaro.org>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 766f6d2a
...@@ -23,8 +23,12 @@ aliases { ...@@ -23,8 +23,12 @@ aliases {
}; };
cpus { cpus {
cpu@0 { #address-cells = <0>;
compatible = "arm,arm926ejs"; #size-cells = <0>;
cpu {
compatible = "arm,arm926ej-s";
device_type = "cpu";
}; };
}; };
......
...@@ -32,8 +32,12 @@ aliases { ...@@ -32,8 +32,12 @@ aliases {
}; };
cpus { cpus {
cpu@0 { #address-cells = <0>;
compatible = "arm,arm926ejs"; #size-cells = <0>;
cpu {
compatible = "arm,arm926ej-s";
device_type = "cpu";
}; };
}; };
......
...@@ -18,12 +18,14 @@ cpus { ...@@ -18,12 +18,14 @@ cpus {
cpu@0 { cpu@0 {
compatible = "arm,cortex-a9"; compatible = "arm,cortex-a9";
device_type = "cpu";
reg = <0>; reg = <0>;
next-level-cache = <&L2>; next-level-cache = <&L2>;
}; };
cpu@1 { cpu@1 {
compatible = "arm,cortex-a9"; compatible = "arm,cortex-a9";
device_type = "cpu";
reg = <1>; reg = <1>;
next-level-cache = <&L2>; next-level-cache = <&L2>;
}; };
......
...@@ -18,6 +18,7 @@ cpus { ...@@ -18,6 +18,7 @@ cpus {
cpu@0 { cpu@0 {
compatible = "arm,cortex-a9"; compatible = "arm,cortex-a9";
device_type = "cpu";
reg = <0>; reg = <0>;
next-level-cache = <&L2>; next-level-cache = <&L2>;
operating-points = < operating-points = <
...@@ -39,18 +40,21 @@ cpu@0 { ...@@ -39,18 +40,21 @@ cpu@0 {
cpu@1 { cpu@1 {
compatible = "arm,cortex-a9"; compatible = "arm,cortex-a9";
device_type = "cpu";
reg = <1>; reg = <1>;
next-level-cache = <&L2>; next-level-cache = <&L2>;
}; };
cpu@2 { cpu@2 {
compatible = "arm,cortex-a9"; compatible = "arm,cortex-a9";
device_type = "cpu";
reg = <2>; reg = <2>;
next-level-cache = <&L2>; next-level-cache = <&L2>;
}; };
cpu@3 { cpu@3 {
compatible = "arm,cortex-a9"; compatible = "arm,cortex-a9";
device_type = "cpu";
reg = <3>; reg = <3>;
next-level-cache = <&L2>; next-level-cache = <&L2>;
}; };
......
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