Commit 754dc536 authored by Vasanthakumar Thiagarajan's avatar Vasanthakumar Thiagarajan Committed by John W. Linville

ath9k_hw: Add capability flag for Antenna diversity and combining feature

This is enabled only for ar9285.
Signed-off-by: default avatarVasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 7a374d8e
...@@ -266,6 +266,8 @@ enum eeprom_param { ...@@ -266,6 +266,8 @@ enum eeprom_param {
EEP_INTERNAL_REGULATOR, EEP_INTERNAL_REGULATOR,
EEP_SWREG, EEP_SWREG,
EEP_PAPRD, EEP_PAPRD,
EEP_MODAL_VER,
EEP_ANT_DIV_CTL1,
}; };
enum ar5416_rates { enum ar5416_rates {
......
...@@ -213,6 +213,10 @@ static u32 ath9k_hw_4k_get_eeprom(struct ath_hw *ah, ...@@ -213,6 +213,10 @@ static u32 ath9k_hw_4k_get_eeprom(struct ath_hw *ah,
return 0; return 0;
case EEP_PWR_TABLE_OFFSET: case EEP_PWR_TABLE_OFFSET:
return AR5416_PWR_TABLE_OFFSET_DB; return AR5416_PWR_TABLE_OFFSET_DB;
case EEP_MODAL_VER:
return pModal->version;
case EEP_ANT_DIV_CTL1:
return pModal->antdiv_ctl1;
default: default:
return 0; return 0;
} }
......
...@@ -2056,6 +2056,7 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah) ...@@ -2056,6 +2056,7 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw; struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
u16 capField = 0, eeval; u16 capField = 0, eeval;
u8 ant_div_ctl1;
eeval = ah->eep_ops->get_eeprom(ah, EEP_REG_0); eeval = ah->eep_ops->get_eeprom(ah, EEP_REG_0);
regulatory->current_rd = eeval; regulatory->current_rd = eeval;
...@@ -2280,6 +2281,14 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah) ...@@ -2280,6 +2281,14 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
if (AR_SREV_9287_10_OR_LATER(ah) || AR_SREV_9271(ah)) if (AR_SREV_9287_10_OR_LATER(ah) || AR_SREV_9271(ah))
pCap->hw_caps |= ATH9K_HW_CAP_SGI_20; pCap->hw_caps |= ATH9K_HW_CAP_SGI_20;
if (AR_SREV_9285(ah))
if (ah->eep_ops->get_eeprom(ah, EEP_MODAL_VER) >= 3) {
ant_div_ctl1 =
ah->eep_ops->get_eeprom(ah, EEP_ANT_DIV_CTL1);
if ((ant_div_ctl1 & 0x1) && ((ant_div_ctl1 >> 3) & 0x1))
pCap->hw_caps |= ATH9K_HW_CAP_ANT_DIV_COMB;
}
return 0; return 0;
} }
......
...@@ -204,6 +204,7 @@ enum ath9k_hw_caps { ...@@ -204,6 +204,7 @@ enum ath9k_hw_caps {
ATH9K_HW_CAP_FASTCLOCK = BIT(20), ATH9K_HW_CAP_FASTCLOCK = BIT(20),
ATH9K_HW_CAP_SGI_20 = BIT(21), ATH9K_HW_CAP_SGI_20 = BIT(21),
ATH9K_HW_CAP_PAPRD = BIT(22), ATH9K_HW_CAP_PAPRD = BIT(22),
ATH9K_HW_CAP_ANT_DIV_COMB = BIT(23),
}; };
struct ath9k_hw_capabilities { struct ath9k_hw_capabilities {
......
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