Commit 761ec44a authored by Mike Frysinger's avatar Mike Frysinger

Blackfin: pull in asm/dpmc.h for power defines

Signed-off-by: default avatarMike Frysinger <vapier@gentoo.org>
parent 2abdf791
...@@ -9,6 +9,8 @@ ...@@ -9,6 +9,8 @@
#ifndef _BFIN_CLOCKS_H #ifndef _BFIN_CLOCKS_H
#define _BFIN_CLOCKS_H #define _BFIN_CLOCKS_H
#include <asm/dpmc.h>
#ifdef CONFIG_CCLK_DIV_1 #ifdef CONFIG_CCLK_DIV_1
# define CONFIG_CCLK_ACT_DIV CCLK_DIV1 # define CONFIG_CCLK_ACT_DIV CCLK_DIV1
# define CONFIG_CCLK_DIV 1 # define CONFIG_CCLK_DIV 1
......
...@@ -13,6 +13,7 @@ ...@@ -13,6 +13,7 @@
#include <asm/dma.h> #include <asm/dma.h>
#include <asm/clocks.h> #include <asm/clocks.h>
#include <asm/mem_init.h> #include <asm/mem_init.h>
#include <asm/dpmc.h>
#define SDGCTL_WIDTH (1 << 31) /* SDRAM external data path width */ #define SDGCTL_WIDTH (1 << 31) /* SDRAM external data path width */
#define PLL_CTL_VAL \ #define PLL_CTL_VAL \
......
...@@ -13,7 +13,7 @@ ...@@ -13,7 +13,7 @@
#include <linux/fs.h> #include <linux/fs.h>
#include <asm/blackfin.h> #include <asm/blackfin.h>
#include <asm/time.h> #include <asm/time.h>
#include <asm/dpmc.h>
/* this is the table of CCLK frequencies, in Hz */ /* this is the table of CCLK frequencies, in Hz */
/* .index is the entry in the auxillary dpm_state_table[] */ /* .index is the entry in the auxillary dpm_state_table[] */
......
...@@ -25,6 +25,7 @@ ...@@ -25,6 +25,7 @@
#include <asm/blackfin.h> #include <asm/blackfin.h>
#include <asm/gpio.h> #include <asm/gpio.h>
#include <asm/irq_handler.h> #include <asm/irq_handler.h>
#include <asm/dpmc.h>
#define SIC_SYSIRQ(irq) (irq - (IRQ_CORETMR + 1)) #define SIC_SYSIRQ(irq) (irq - (IRQ_CORETMR + 1))
......
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