Commit 7824fcb3 authored by Ondrej Jirman's avatar Ondrej Jirman Committed by Chen-Yu Tsai

ARM: dts: sunxi: h3/h5: Add r_i2c I2C controller

Allwinner H3/H5 SoCs have an I2C controller at PL GPIO bank.

Add support for it in the device tree.
Signed-off-by: default avatarOndrej Jirman <megous@megous.com>
[Icenowy: Change to use r_ccu and change pinmux node name]
Signed-off-by: default avatarIcenowy Zheng <icenowy@aosc.io>
Reviewed-by: default avatarChen-Yu Tsai <wens@csie.org>
Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
parent 4b877d4a
...@@ -822,6 +822,19 @@ ir: ir@1f02000 { ...@@ -822,6 +822,19 @@ ir: ir@1f02000 {
status = "disabled"; status = "disabled";
}; };
r_i2c: i2c@1f02400 {
compatible = "allwinner,sun6i-a31-i2c";
reg = <0x01f02400 0x400>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&r_i2c_pins>;
clocks = <&r_ccu CLK_APB0_I2C>;
resets = <&r_ccu RST_APB0_I2C>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
r_pio: pinctrl@1f02c00 { r_pio: pinctrl@1f02c00 {
compatible = "allwinner,sun8i-h3-r-pinctrl"; compatible = "allwinner,sun8i-h3-r-pinctrl";
reg = <0x01f02c00 0x400>; reg = <0x01f02c00 0x400>;
......
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