Commit 7ae18a57 authored by Mark Rutland's avatar Mark Rutland Committed by Will Deacon

ARM: perf: add type field to struct arm_pmu

Currently, the ARM perf code assumes all PMUs it will handle are
CPU PMUs, having ARM_PMU_DEVICE_CPU hardcoded when reserving or
releasing hardware. This means that currently, the ARM perf code can't
support system PMUs.

This patch adds a 'type' field to struct arm_pmu, which allows the code
to reserve & release the hardware regardless of the PMU type.
Signed-off-by: default avatarMark Rutland <mark.rutland@arm.com>
Reviewed-by: default avatarWill Deacon <will.deacon@arm.com>
Reviewed-by: default avatarJamie Iles <jamie@jamieiles.com>
Reviewed-by: default avatarAshwin Chaugule <ashwinc@codeaurora.org>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent 0f78d2d5
......@@ -60,6 +60,7 @@ static DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events);
struct arm_pmu {
enum arm_perf_pmu_ids id;
enum arm_pmu_type type;
cpumask_t active_irqs;
const char *name;
irqreturn_t (*handle_irq)(int irq_num, void *dev);
......@@ -396,7 +397,7 @@ armpmu_release_hardware(void)
free_irq(irq, NULL);
}
release_pmu(ARM_PMU_DEVICE_CPU);
release_pmu(armpmu->type);
}
static int
......@@ -407,7 +408,7 @@ armpmu_reserve_hardware(void)
int i, err, irq, irqs;
struct platform_device *pmu_device = armpmu->plat_device;
err = reserve_pmu(ARM_PMU_DEVICE_CPU);
err = reserve_pmu(armpmu->type);
if (err) {
pr_warning("unable to reserve pmu\n");
return err;
......@@ -691,6 +692,7 @@ static void __init cpu_pmu_init(struct arm_pmu *armpmu)
raw_spin_lock_init(&events->pmu_lock);
}
armpmu->get_hw_events = armpmu_get_cpu_events;
armpmu->type = ARM_PMU_DEVICE_CPU;
}
/*
......
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