Commit 7e2fb365 authored by David S. Miller's avatar David S. Miller

[FRAMEBUFFER]: Convert P9100 driver to new APIs.

parent 67bf3c24
...@@ -832,7 +832,7 @@ config FB_CG14 ...@@ -832,7 +832,7 @@ config FB_CG14
config FB_P9100 config FB_P9100
bool "P9100 (Sparcbook 3 only) support" bool "P9100 (Sparcbook 3 only) support"
depends on FB_SBUS && SPARC32 depends on FB_SBUS
help help
This is the frame buffer device driver for the P9100 card This is the frame buffer device driver for the P9100 card
supported on Sparcbook 3 machines. supported on Sparcbook 3 machines.
......
...@@ -72,7 +72,6 @@ obj-$(CONFIG_FB_VOODOO1) += sstfb.o cfbfillrect.o cfbcopyarea.o cfbimgb ...@@ -72,7 +72,6 @@ obj-$(CONFIG_FB_VOODOO1) += sstfb.o cfbfillrect.o cfbcopyarea.o cfbimgb
# One by one these are being converted over to the new APIs # One by one these are being converted over to the new APIs
#obj-$(CONFIG_FB_TCX) += tcxfb.o sbusfb.o #obj-$(CONFIG_FB_TCX) += tcxfb.o sbusfb.o
#obj-$(CONFIG_FB_P9100) += p9100fb.o sbusfb.o
#obj-$(CONFIG_FB_LEO) += leofb.o sbusfb.o #obj-$(CONFIG_FB_LEO) += leofb.o sbusfb.o
obj-$(CONFIG_FB_FFB) += ffb.o sbuslib.o cfbimgblt.o cfbcopyarea.o obj-$(CONFIG_FB_FFB) += ffb.o sbuslib.o cfbimgblt.o cfbcopyarea.o
...@@ -83,6 +82,8 @@ obj-$(CONFIG_FB_BW2) += bw2.o sbuslib.o cfbimgblt.o cfbcopyarea.o ...@@ -83,6 +82,8 @@ obj-$(CONFIG_FB_BW2) += bw2.o sbuslib.o cfbimgblt.o cfbcopyarea.o
cfbfillrect.o cfbfillrect.o
obj-$(CONFIG_FB_CG14) += cg14.o sbuslib.o cfbimgblt.o cfbcopyarea.o \ obj-$(CONFIG_FB_CG14) += cg14.o sbuslib.o cfbimgblt.o cfbcopyarea.o \
cfbfillrect.o cfbfillrect.o
obj-$(CONFIG_FB_P9100) += p9100.o sbuslib.o cfbimgblt.o cfbcopyarea.o \
cfbfillrect.o
# Files generated that shall be removed upon make clean # Files generated that shall be removed upon make clean
clean-files := promcon_tbl.c clean-files := promcon_tbl.c
......
...@@ -154,6 +154,8 @@ extern int bw2_init(void); ...@@ -154,6 +154,8 @@ extern int bw2_init(void);
extern int bw2_setup(char*); extern int bw2_setup(char*);
extern int cg14_init(void); extern int cg14_init(void);
extern int cg14_setup(char*); extern int cg14_setup(char*);
extern int p9100_init(void);
extern int p9100_setup(char*);
static struct { static struct {
const char *name; const char *name;
...@@ -260,6 +262,9 @@ static struct { ...@@ -260,6 +262,9 @@ static struct {
#ifdef CONFIG_FB_CG14 #ifdef CONFIG_FB_CG14
{ "cg14", cg14_init, cg14_setup }, { "cg14", cg14_init, cg14_setup },
#endif #endif
#ifdef CONFIG_FB_P9100
{ "p9100", p9100_init, p9100_setup },
#endif
/* /*
* Generic drivers that are used as fallbacks * Generic drivers that are used as fallbacks
......
/* p9100.c: P9100 frame buffer driver
*
* Copyright (C) 2003 David S. Miller (davem@redhat.com)
* Copyright 1999 Derrick J Brashear (shadow@dementia.org)
*
* Driver layout based loosely on tgafb.c, see that file for credits.
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/fb.h>
#include <linux/mm.h>
#include <asm/io.h>
#include <asm/sbus.h>
#include <asm/oplib.h>
#include <asm/fbio.h>
#include "sbuslib.h"
/*
* Local functions.
*/
static int p9100_check_var(struct fb_var_screeninfo *, struct fb_info *);
static int p9100_set_par(struct fb_info *);
static int p9100_setcolreg(unsigned, unsigned, unsigned, unsigned,
unsigned, struct fb_info *);
static int p9100_blank(int, struct fb_info *);
static int p9100_mmap(struct fb_info *, struct file *, struct vm_area_struct *);
/*
* Frame buffer operations
*/
static struct fb_ops p9100_ops = {
.owner = THIS_MODULE,
.fb_check_var = p9100_check_var,
.fb_set_par = p9100_set_par,
.fb_setcolreg = p9100_setcolreg,
.fb_blank = p9100_blank,
.fb_fillrect = cfb_fillrect,
.fb_copyarea = cfb_copyarea,
.fb_imageblit = cfb_imageblit,
.fb_mmap = p9100_mmap,
.fb_cursor = soft_cursor,
};
/* P9100 control registers */
#define P9100_SYSCTL_OFF 0x0UL
#define P9100_VIDEOCTL_OFF 0x100UL
#define P9100_VRAMCTL_OFF 0x180UL
#define P9100_RAMDAC_OFF 0x200UL
#define P9100_VIDEOCOPROC_OFF 0x400UL
/* P9100 command registers */
#define P9100_CMD_OFF 0x0UL
/* P9100 framebuffer memory */
#define P9100_FB_OFF 0x0UL
/* 3 bits: 2=8bpp 3=16bpp 5=32bpp 7=24bpp */
#define SYS_CONFIG_PIXELSIZE_SHIFT 26
#define SCREENPAINT_TIMECTL1_ENABLE_VIDEO 0x20 /* 0 = off, 1 = on */
struct p9100_regs {
/* Registers for the system control */
volatile u32 sys_base;
volatile u32 sys_config;
volatile u32 sys_intr;
volatile u32 sys_int_ena;
volatile u32 sys_alt_rd;
volatile u32 sys_alt_wr;
volatile u32 sys_xxx[58];
/* Registers for the video control */
volatile u32 vid_base;
volatile u32 vid_hcnt;
volatile u32 vid_htotal;
volatile u32 vid_hsync_rise;
volatile u32 vid_hblank_rise;
volatile u32 vid_hblank_fall;
volatile u32 vid_hcnt_preload;
volatile u32 vid_vcnt;
volatile u32 vid_vlen;
volatile u32 vid_vsync_rise;
volatile u32 vid_vblank_rise;
volatile u32 vid_vblank_fall;
volatile u32 vid_vcnt_preload;
volatile u32 vid_screenpaint_addr;
volatile u32 vid_screenpaint_timectl1;
volatile u32 vid_screenpaint_qsfcnt;
volatile u32 vid_screenpaint_timectl2;
volatile u32 vid_xxx[15];
/* Registers for the video control */
volatile u32 vram_base;
volatile u32 vram_memcfg;
volatile u32 vram_refresh_pd;
volatile u32 vram_refresh_cnt;
volatile u32 vram_raslo_max;
volatile u32 vram_raslo_cur;
volatile u32 pwrup_cfg;
volatile u32 vram_xxx[25];
/* Registers for IBM RGB528 Palette */
volatile u32 ramdac_cmap_wridx;
volatile u32 ramdac_palette_data;
volatile u32 ramdac_pixel_mask;
volatile u32 ramdac_palette_rdaddr;
volatile u32 ramdac_idx_lo;
volatile u32 ramdac_idx_hi;
volatile u32 ramdac_idx_data;
volatile u32 ramdac_idx_ctl;
volatile u32 ramdac_xxx[1784];
};
struct p9100_cmd_parameng {
volatile u32 parameng_status;
volatile u32 parameng_bltcmd;
volatile u32 parameng_quadcmd;
};
struct p9100_par {
spinlock_t lock;
struct p9100_regs *regs;
u32 flags;
#define P9100_FLAG_BLANKED 0x00000001
unsigned long physbase;
unsigned long fbsize;
struct sbus_dev *sdev;
struct list_head list;
};
/**
* p9100_check_var - Optional function. Validates a var passed in.
* @var: frame buffer variable screen structure
* @info: frame buffer structure that represents a single frame buffer
*/
static int p9100_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
{
if (var->bits_per_pixel != 8)
return -EINVAL;
if (var->xres_virtual != var->xres || var->yres_virtual != var->yres)
return -EINVAL;
if (var->nonstd)
return -EINVAL;
if ((var->vmode & FB_VMODE_MASK) != FB_VMODE_NONINTERLACED)
return -EINVAL;
if (var->xres != info->var.xres || var->yres != info->var.yres)
return -EINVAL;
return 0;
}
/**
* p9100_set_par - Optional function. Alters the hardware state.
* @info: frame buffer structure that represents a single frame buffer
*/
static int
p9100_set_par(struct fb_info *info)
{
return 0;
}
/**
* p9100_setcolreg - Optional function. Sets a color register.
* @regno: boolean, 0 copy local, 1 get_user() function
* @red: frame buffer colormap structure
* @green: The green value which can be up to 16 bits wide
* @blue: The blue value which can be up to 16 bits wide.
* @transp: If supported the alpha value which can be up to 16 bits wide.
* @info: frame buffer info structure
*/
static int p9100_setcolreg(unsigned regno,
unsigned red, unsigned green, unsigned blue,
unsigned transp, struct fb_info *info)
{
struct p9100_par *par = (struct p9100_par *) info->par;
struct p9100_regs *regs = par->regs;
unsigned long flags;
if (regno >= 256)
return 1;
red >>= 8;
green >>= 8;
blue >>= 8;
spin_lock_irqsave(&par->lock, flags);
sbus_writel((regno << 16), &regs->ramdac_cmap_wridx);
sbus_writel((red << 16), &regs->ramdac_palette_data);
sbus_writel((green << 16), &regs->ramdac_palette_data);
sbus_writel((blue << 16), &regs->ramdac_palette_data);
spin_unlock_irqrestore(&par->lock, flags);
return 0;
}
/**
* p9100_blank - Optional function. Blanks the display.
* @blank_mode: the blank mode we want.
* @info: frame buffer structure that represents a single frame buffer
*/
static int
p9100_blank(int blank, struct fb_info *info)
{
struct p9100_par *par = (struct p9100_par *) info->par;
struct p9100_regs *regs = par->regs;
unsigned long flags;
u32 val;
spin_lock_irqsave(&par->lock, flags);
switch (blank) {
case 0: /* Unblanking */
val = sbus_readl(&regs->vid_screenpaint_timectl1);
val |= SCREENPAINT_TIMECTL1_ENABLE_VIDEO;
sbus_writel(val, &regs->vid_screenpaint_timectl1);
par->flags &= ~P9100_FLAG_BLANKED;
break;
case 1: /* Normal blanking */
case 2: /* VESA blank (vsync off) */
case 3: /* VESA blank (hsync off) */
case 4: /* Poweroff */
val = sbus_readl(&regs->vid_screenpaint_timectl1);
val &= ~SCREENPAINT_TIMECTL1_ENABLE_VIDEO;
sbus_writel(val, &regs->vid_screenpaint_timectl1);
par->flags |= P9100_FLAG_BLANKED;
break;
}
spin_unlock_irqrestore(&par->lock, flags);
return 0;
}
static struct sbus_mmap_map p9100_mmap_map[] = {
{ CG3_MMAP_OFFSET, 0, SBUS_MMAP_FBSIZE(1) },
{ 0, 0, 0 }
};
static int p9100_mmap(struct fb_info *info, struct file *file, struct vm_area_struct *vma)
{
struct p9100_par *par = (struct p9100_par *)info->par;
return sbusfb_mmap_helper(p9100_mmap_map,
par->physbase, par->fbsize,
par->sdev->reg_addrs[0].which_io,
vma);
}
/*
* Initialisation
*/
static void
p9100_init_fix(struct fb_info *info, int linebytes)
{
struct p9100_par *par = (struct p9100_par *)info->par;
strncpy(info->fix.id, par->sdev->prom_name, sizeof(info->fix.id) - 1);
info->fix.id[sizeof(info->fix.id)-1] = 0;
info->fix.type = FB_TYPE_PACKED_PIXELS;
info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
info->fix.line_length = linebytes;
info->fix.accel = FB_ACCEL_SUN_CGTHREE;
}
struct all_info {
struct fb_info info;
struct p9100_par par;
struct list_head list;
};
static LIST_HEAD(p9100_list);
static void p9100_init_one(struct sbus_dev *sdev)
{
struct all_info *all;
int linebytes;
all = kmalloc(sizeof(*all), GFP_KERNEL);
if (!all) {
printk(KERN_ERR "p9100: Cannot allocate memory.\n");
return;
}
memset(all, 0, sizeof(*all));
INIT_LIST_HEAD(&all->list);
spin_lock_init(&all->par.lock);
all->par.sdev = sdev;
/* This is the framebuffer and the only resource apps can mmap. */
all->par.physbase = sdev->reg_addrs[2].phys_addr;
sbusfb_fill_var(&all->info.var, sdev->prom_node, 8);
linebytes = prom_getintdefault(sdev->prom_node, "linebytes",
all->info.var.xres);
all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
all->par.regs = (struct p9100_regs *)
sbus_ioremap(&sdev->resource[0], 0,
sizeof(struct p9100_regs), "p9100 regs");
all->info.node = NODEV;
all->info.flags = FBINFO_FLAG_DEFAULT;
all->info.fbops = &p9100_ops;
#ifdef CONFIG_SPARC32
all->info.screen_base = (char *)
prom_getintdefault(sdev->prom_node, "address", 0);
#endif
if (!all->info.screen_base)
all->info.screen_base = (char *)
sbus_ioremap(&sdev->resource[2], 0,
all->par.fbsize, "p9100 ram");
all->info.currcon = -1;
all->info.par = &all->par;
p9100_blank(0, &all->info);
if (fb_alloc_cmap(&all->info.cmap, 256, 0)) {
printk(KERN_ERR "p9100: Could not allocate color map.\n");
kfree(all);
return;
}
p9100_set_par(&all->info);
p9100_init_fix(&all->info, linebytes);
if (register_framebuffer(&all->info) < 0) {
printk(KERN_ERR "p9100: Could not register framebuffer.\n");
fb_dealloc_cmap(&all->info.cmap);
kfree(all);
return;
}
list_add(&all->list, &p9100_list);
printk("p9100: %s at %lx:%lx\n",
sdev->prom_name,
(long) sdev->reg_addrs[0].which_io,
(long) sdev->reg_addrs[0].phys_addr);
}
int __init p9100_init(void)
{
struct sbus_bus *sbus;
struct sbus_dev *sdev;
for_all_sbusdev(sdev, sbus) {
if (!strcmp(sdev->prom_name, "p9100"))
p9100_init_one(sdev);
}
return 0;
}
void __exit p9100_exit(void)
{
struct list_head *pos, *tmp;
list_for_each_safe(pos, tmp, &p9100_list) {
struct all_info *all = list_entry(pos, typeof(*all), list);
unregister_framebuffer(&all->info);
fb_dealloc_cmap(&all->info.cmap);
kfree(all);
}
}
int __init
p9100_setup(char *arg)
{
/* No cmdline options yet... */
return 0;
}
#ifdef MODULE
module_init(p9100_init);
module_exit(p9100_exit);
#endif
MODULE_DESCRIPTION("framebuffer driver for P9100 chipsets");
MODULE_AUTHOR("David S. Miller <davem@redhat.com>");
MODULE_LICENSE("GPL");
/*
* Register information for the Weitek P9100 as found
* on the Tadpole Sparcbook 3 laptops.
*
* From the technical specification document provided by Tadpole.
*
* Derrick J Brashear (shadow@dementia.org)
*/
#ifndef _P9100_H_
#define _P9100_H_
/* P9100 control registers */
#define P9100_SYSCTL_OFF 0x0UL
#define P9100_VIDEOCTL_OFF 0x100UL
#define P9100_VRAMCTL_OFF 0x180UL
#define P9100_RAMDAC_OFF 0x200UL
#define P9100_VIDEOCOPROC_OFF 0x400UL
/* P9100 command registers */
#define P9100_CMD_OFF 0x0UL
/* P9100 framebuffer memory */
#define P9100_FB_OFF 0x0UL
/* 3 bits: 2=8bpp 3=16bpp 5=32bpp 7=24bpp */
#define SYS_CONFIG_PIXELSIZE_SHIFT 26
#define SCREENPAINT_TIMECTL1_ENABLE_VIDEO 0x20 /* 0 = off, 1 = on */
struct p9100_ctrl {
/* Registers for the system control */
__volatile__ __u32 sys_base;
__volatile__ __u32 sys_config;
__volatile__ __u32 sys_intr;
__volatile__ __u32 sys_int_ena;
__volatile__ __u32 sys_alt_rd;
__volatile__ __u32 sys_alt_wr;
__volatile__ __u32 sys_xxx[58];
/* Registers for the video control */
__volatile__ __u32 vid_base;
__volatile__ __u32 vid_hcnt;
__volatile__ __u32 vid_htotal;
__volatile__ __u32 vid_hsync_rise;
__volatile__ __u32 vid_hblank_rise;
__volatile__ __u32 vid_hblank_fall;
__volatile__ __u32 vid_hcnt_preload;
__volatile__ __u32 vid_vcnt;
__volatile__ __u32 vid_vlen;
__volatile__ __u32 vid_vsync_rise;
__volatile__ __u32 vid_vblank_rise;
__volatile__ __u32 vid_vblank_fall;
__volatile__ __u32 vid_vcnt_preload;
__volatile__ __u32 vid_screenpaint_addr;
__volatile__ __u32 vid_screenpaint_timectl1;
__volatile__ __u32 vid_screenpaint_qsfcnt;
__volatile__ __u32 vid_screenpaint_timectl2;
__volatile__ __u32 vid_xxx[15];
/* Registers for the video control */
__volatile__ __u32 vram_base;
__volatile__ __u32 vram_memcfg;
__volatile__ __u32 vram_refresh_pd;
__volatile__ __u32 vram_refresh_cnt;
__volatile__ __u32 vram_raslo_max;
__volatile__ __u32 vram_raslo_cur;
__volatile__ __u32 pwrup_cfg;
__volatile__ __u32 vram_xxx[25];
/* Registers for IBM RGB528 Palette */
__volatile__ __u32 ramdac_cmap_wridx;
__volatile__ __u32 ramdac_palette_data;
__volatile__ __u32 ramdac_pixel_mask;
__volatile__ __u32 ramdac_palette_rdaddr;
__volatile__ __u32 ramdac_idx_lo;
__volatile__ __u32 ramdac_idx_hi;
__volatile__ __u32 ramdac_idx_data;
__volatile__ __u32 ramdac_idx_ctl;
__volatile__ __u32 ramdac_xxx[1784];
};
struct p9100_cmd_parameng {
__volatile__ __u32 parameng_status;
__volatile__ __u32 parameng_bltcmd;
__volatile__ __u32 parameng_quadcmd;
};
#endif /* _P9100_H_ */
/* $id: p9100fb.c,v 1.4 1999/08/18 10:55:01 shadow Exp $
* p9100fb.c: P9100 frame buffer driver
*
* Copyright 1999 Derrick J Brashear (shadow@dementia.org)
*/
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/tty.h>
#include <linux/slab.h>
#include <linux/vmalloc.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/fb.h>
#include <linux/init.h>
#include <linux/selection.h>
#include <video/sbusfb.h>
#include <asm/io.h>
#include <video/fbcon-cfb8.h>
#include "p9100.h"
static struct sbus_mmap_map p9100_mmap_map[] = {
#if 0 /* For now, play we're a dumb color fb */
{ P9100_CTL_OFF, 0x38000000, 0x2000 },
{ P9100_CMD_OFF, 0x38002000, 0x2000 },
{ P9100_FB_OFF, 0x38800000, 0x200000 },
{ CG3_MMAP_OFFSET, 0x38800000, SBUS_MMAP_FBSIZE(1) },
#else
{ CG3_MMAP_OFFSET, 0x0, SBUS_MMAP_FBSIZE(1) },
#endif
{ 0, 0, 0 }
};
#define _READCTL(member, out) \
{ \
struct p9100_ctrl *actual; \
actual = (struct p9100_ctrl *)fb->s.p9100.ctrl; \
out = sbus_readl(&actual-> ## member ); \
}
#define READCTL(member, out) \
{ \
struct p9100_ctrl *enab, *actual; \
actual = (struct p9100_ctrl *)fb->s.p9100.ctrl; \
enab = (struct p9100_ctrl *)fb->s.p9100.fbmem; \
out = sbus_readl(&enab-> ## member ); \
out = sbus_readl(&actual-> ## member ); \
}
#define WRITECTL(member, val) \
{ \
u32 __writetmp; \
struct p9100_ctrl *enab, *actual; \
actual = (struct p9100_ctrl *)fb->s.p9100.ctrl; \
enab = (struct p9100_ctrl *)fb->s.p9100.fbmem; \
__writetmp = sbus_readl(&enab-> ## member ); \
sbus_writel(val, &actual-> ## member ); \
}
static void p9100_loadcmap (struct fb_info_sbusfb *fb, struct display *p, int index, int count)
{
unsigned long flags;
u32 tmp;
int i;
spin_lock_irqsave(&fb->lock, flags);
_READCTL(pwrup_cfg, tmp);
WRITECTL(ramdac_cmap_wridx, (index << 16));
for (i = index; count--; i++){
_READCTL(pwrup_cfg, tmp);
WRITECTL(ramdac_palette_data, (fb->color_map CM(i,0) << 16));
_READCTL(pwrup_cfg, tmp);
WRITECTL(ramdac_palette_data, (fb->color_map CM(i,1) << 16));
_READCTL(pwrup_cfg, tmp);
WRITECTL(ramdac_palette_data, (fb->color_map CM(i,2) << 16));
}
spin_unlock_irqrestore(&fb->lock, flags);
}
static int p9100_blank (struct fb_info_sbusfb *fb)
{
unsigned long flags;
u32 val;
spin_lock_irqsave(&fb->lock, flags);
READCTL(vid_screenpaint_timectl1, val);
val &= ~ SCREENPAINT_TIMECTL1_ENABLE_VIDEO;
WRITECTL(vid_screenpaint_timectl1, val);
spin_unlock_irqrestore(&fb->lock, flags);
return 0;
}
static int p9100_unblank (struct fb_info_sbusfb *fb)
{
unsigned long flags;
u32 val;
spin_lock_irqsave(&fb->lock, flags);
READCTL(vid_screenpaint_timectl1, val);
val |= SCREENPAINT_TIMECTL1_ENABLE_VIDEO;
WRITECTL(vid_screenpaint_timectl1, val);
spin_unlock_irqrestore(&fb->lock, flags);
return 0;
}
static void p9100_margins (struct fb_info_sbusfb *fb, struct display *p, int x_margin, int y_margin)
{
fb->info.screen_base += (y_margin - fb->y_margin) * p->line_length +
(x_margin - fb->x_margin);
}
static char idstring[60] __initdata = { 0 };
char * __init p9100fb_init(struct fb_info_sbusfb *fb)
{
struct fb_fix_screeninfo *fix = &fb->fix;
struct display *disp = &fb->disp;
struct fbtype *type = &fb->type;
struct sbus_dev *sdev = fb->sbdp;
unsigned long phys = sdev->reg_addrs[2].phys_addr;
int tmp;
#ifndef FBCON_HAS_CFB8
return NULL;
#endif
/* Control regs: fb->sbdp->reg_addrs[0].phys_addr
* Command regs: fb->sbdp->reg_addrs[1].phys_addr
* Frame buffer: fb->sbdp->reg_addrs[2].phys_addr
*/
if (!fb->s.p9100.ctrl) {
fb->s.p9100.ctrl = (struct p9100_ctrl *)
sbus_ioremap(&sdev->resource[0], 0,
sdev->reg_addrs[0].reg_size, "p9100 ctrl");
}
strcpy(fb->info.modename, "p9100");
strcpy(fix->id, "p9100");
fix->accel = FB_ACCEL_SUN_CGTHREE;
fix->line_length = fb->var.xres_virtual;
disp->scrollmode = SCROLL_YREDRAW;
if (!fb->info.screen_base)
fb->info.screen_base = (char *)
sbus_ioremap(&sdev->resource[2], 0,
type->fb_size, "p9100 ram");
fb->s.p9100.fbmem = (volatile u32 *)fb->info.screen_base;
fb->info.screen_base += fix->line_length * fb->y_margin + fb->x_margin;
READCTL(sys_config, tmp);
switch ((tmp >> SYS_CONFIG_PIXELSIZE_SHIFT) & 7) {
case 7:
type->fb_depth = 24;
break;
case 5:
type->fb_depth = 32;
break;
case 3:
type->fb_depth = 16;
break;
case 2:
type->fb_depth = 8;
break;
default:
printk("p9100: screen depth unknown: 0x%x", tmp);
return NULL;
}
fb->dispsw = fbcon_cfb8;
fb->margins = p9100_margins;
fb->loadcmap = p9100_loadcmap;
fb->blank = p9100_blank;
fb->unblank = p9100_unblank;
fb->physbase = phys;
fb->mmap_map = p9100_mmap_map;
sprintf(idstring, "%s at 0x%x", "p9100",
(unsigned int)fb->info.screen_base);
return idstring;
}
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