drm/i915/tgl: Add gam instdone

This has been asked from us already. Prepare for the next
time.
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20191029163841.5224-2-mika.kuoppala@linux.intel.com

drivers/gpu/drm/i915/i915_gpu_error.c

@@ -746,6 +746,8 @@ static void __err_print_to_sgl(struct drm_i915_error_state_buf *m,
 		for (i = 0; i < GEN12_SFC_DONE_MAX; i++)
 			err_printf(m, "  SFC_DONE[%d]: 0x%08x\n", i,
 				   error->sfc_done[i]);
+
+		err_printf(m, "  GAM_DONE: 0x%08x\n", error->gam_done);
 	}
 
 	for (ee = error->engine; ee; ee = ee->next)
@@ -1612,6 +1614,8 @@ static void capture_reg_state(struct i915_gpu_state *error)
 			error->sfc_done[i] =
 				intel_uncore_read(uncore, GEN12_SFC_DONE(i));
 		}
+
+		error->gam_done = intel_uncore_read(uncore, GEN12_GAM_DONE);
 	}
 
 	/* 4: Everything else */

drivers/gpu/drm/i915/i915_gpu_error.h

@@ -76,6 +76,7 @@ struct i915_gpu_state {
 	u32 gtt_cache;
 	u32 aux_err; /* gen12 */
 	u32 sfc_done[GEN12_SFC_DONE_MAX]; /* gen12 */
+	u32 gam_done; /* gen12 */
 
 	u32 nfence;
 	u64 fence[I915_MAX_NUM_FENCES];

drivers/gpu/drm/i915/i915_reg.h

@@ -2561,6 +2561,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
 #define   RING_FAULT_FAULT_TYPE(x) (((x) >> 1) & 0x3)
 #define   RING_FAULT_VALID	(1 << 0)
 #define DONE_REG		_MMIO(0x40b0)
+#define GEN12_GAM_DONE		_MMIO(0xcf68)
 #define GEN8_PRIVATE_PAT_LO	_MMIO(0x40e0)
 #define GEN8_PRIVATE_PAT_HI	_MMIO(0x40e0 + 4)
 #define GEN10_PAT_INDEX(index)	_MMIO(0x40e0 + (index) * 4)