Commit 825c423a authored by Kenji Kaneshige's avatar Kenji Kaneshige Committed by Jesse Barnes

PCI hotplug: add support for 5.0G link speed

Add support for PCI-E 5.0 GT/s in max_bus_speed and cur_bus_speed.
Reviewed-by: default avatarMatthew Wilcox <matthew@wil.cx>
Signed-off-by: default avatarKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
parent 6ed6a8dc
......@@ -87,6 +87,7 @@ static char *pci_bus_speed_strings[] = {
"100 MHz PCIX 533", /* 0x12 */
"133 MHz PCIX 533", /* 0x13 */
"2.5 GT/s PCI-E", /* 0x14 */
"5.0 GT/s PCI-E", /* 0x15 */
};
#ifdef CONFIG_HOTPLUG_PCI_CPCI
......
......@@ -693,7 +693,10 @@ static int hpc_get_max_lnk_speed(struct slot *slot, enum pci_bus_speed *value)
switch (lnk_cap & 0x000F) {
case 1:
lnk_speed = PCIE_2PT5GB;
lnk_speed = PCIE_2_5GB;
break;
case 2:
lnk_speed = PCIE_5_0GB;
break;
default:
lnk_speed = PCIE_LNK_SPEED_UNKNOWN;
......@@ -772,7 +775,10 @@ static int hpc_get_cur_lnk_speed(struct slot *slot, enum pci_bus_speed *value)
switch (lnk_status & PCI_EXP_LNKSTA_CLS) {
case 1:
lnk_speed = PCIE_2PT5GB;
lnk_speed = PCIE_2_5GB;
break;
case 2:
lnk_speed = PCIE_5_0GB;
break;
default:
lnk_speed = PCIE_LNK_SPEED_UNKNOWN;
......
......@@ -62,7 +62,8 @@ enum pcie_link_width {
};
enum pcie_link_speed {
PCIE_2PT5GB = 0x14,
PCIE_2_5GB = 0x14,
PCIE_5_0GB = 0x15,
PCIE_LNK_SPEED_UNKNOWN = 0xFF,
};
......
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