Commit 85bf9da1 authored by Emmanuel Grumbach's avatar Emmanuel Grumbach

iwlwifi: pcie: re-organize the PCIe ISR code

Separate the code that simply disables interrupt in the
hardware and the code that checks what interrupt fired.
This will be useful to move the second part in the threaded
handler which will be done in a future patch.
Reviewed-by: default avatarJohannes Berg <johannes.berg@intel.com>
Signed-off-by: default avatarEmmanuel Grumbach <emmanuel.grumbach@intel.com>
parent 2dbc368d
...@@ -343,7 +343,7 @@ void iwl_pcie_rx_free(struct iwl_trans *trans); ...@@ -343,7 +343,7 @@ void iwl_pcie_rx_free(struct iwl_trans *trans);
/***************************************************** /*****************************************************
* ICT - interrupt handling * ICT - interrupt handling
******************************************************/ ******************************************************/
irqreturn_t iwl_pcie_isr_ict(int irq, void *data); irqreturn_t iwl_pcie_isr(int irq, void *data);
int iwl_pcie_alloc_ict(struct iwl_trans *trans); int iwl_pcie_alloc_ict(struct iwl_trans *trans);
void iwl_pcie_free_ict(struct iwl_trans *trans); void iwl_pcie_free_ict(struct iwl_trans *trans);
void iwl_pcie_reset_ict(struct iwl_trans *trans); void iwl_pcie_reset_ict(struct iwl_trans *trans);
......
...@@ -1111,9 +1111,8 @@ void iwl_pcie_disable_ict(struct iwl_trans *trans) ...@@ -1111,9 +1111,8 @@ void iwl_pcie_disable_ict(struct iwl_trans *trans)
} }
/* legacy (non-ICT) ISR. Assumes that trans_pcie->irq_lock is held */ /* legacy (non-ICT) ISR. Assumes that trans_pcie->irq_lock is held */
static irqreturn_t iwl_pcie_isr(int irq, void *data) static irqreturn_t iwl_pcie_isr_non_ict(struct iwl_trans *trans)
{ {
struct iwl_trans *trans = data;
struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
u32 inta; u32 inta;
...@@ -1121,12 +1120,6 @@ static irqreturn_t iwl_pcie_isr(int irq, void *data) ...@@ -1121,12 +1120,6 @@ static irqreturn_t iwl_pcie_isr(int irq, void *data)
trace_iwlwifi_dev_irq(trans->dev); trace_iwlwifi_dev_irq(trans->dev);
/* Disable (but don't clear!) interrupts here to avoid
* back-to-back ISRs and sporadic interrupts from our NIC.
* If we have something to service, the irq thread will re-enable ints.
* If we *don't* have something, we'll re-enable before leaving here. */
iwl_write32(trans, CSR_INT_MASK, 0x00000000);
/* Discover which interrupts are active/pending */ /* Discover which interrupts are active/pending */
inta = iwl_read32(trans, CSR_INT); inta = iwl_read32(trans, CSR_INT);
...@@ -1181,20 +1174,14 @@ static irqreturn_t iwl_pcie_isr(int irq, void *data) ...@@ -1181,20 +1174,14 @@ static irqreturn_t iwl_pcie_isr(int irq, void *data)
* the interrupt we need to service, driver will set the entries back to 0 and * the interrupt we need to service, driver will set the entries back to 0 and
* set index. * set index.
*/ */
irqreturn_t iwl_pcie_isr_ict(int irq, void *data) static irqreturn_t iwl_pcie_isr_ict(struct iwl_trans *trans)
{ {
struct iwl_trans *trans = data; struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
struct iwl_trans_pcie *trans_pcie; unsigned long flags;
irqreturn_t ret;
u32 inta; u32 inta;
u32 val = 0; u32 val = 0;
u32 read; u32 read;
unsigned long flags;
irqreturn_t ret = IRQ_NONE;
if (!trans)
return IRQ_NONE;
trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
spin_lock_irqsave(&trans_pcie->irq_lock, flags); spin_lock_irqsave(&trans_pcie->irq_lock, flags);
...@@ -1202,20 +1189,13 @@ irqreturn_t iwl_pcie_isr_ict(int irq, void *data) ...@@ -1202,20 +1189,13 @@ irqreturn_t iwl_pcie_isr_ict(int irq, void *data)
* use legacy interrupt. * use legacy interrupt.
*/ */
if (unlikely(!trans_pcie->use_ict)) { if (unlikely(!trans_pcie->use_ict)) {
ret = iwl_pcie_isr(irq, data); ret = iwl_pcie_isr_non_ict(trans);
spin_unlock_irqrestore(&trans_pcie->irq_lock, flags); spin_unlock_irqrestore(&trans_pcie->irq_lock, flags);
return ret; return ret;
} }
trace_iwlwifi_dev_irq(trans->dev); trace_iwlwifi_dev_irq(trans->dev);
/* Disable (but don't clear!) interrupts here to avoid
* back-to-back ISRs and sporadic interrupts from our NIC.
* If we have something to service, the tasklet will re-enable ints.
* If we *don't* have something, we'll re-enable before leaving here.
*/
iwl_write32(trans, CSR_INT_MASK, 0x00000000);
/* Ignore interrupt if there's nothing in NIC to service. /* Ignore interrupt if there's nothing in NIC to service.
* This may be due to IRQ shared with another device, * This may be due to IRQ shared with another device,
* or due to sporadic interrupts thrown from our NIC. */ * or due to sporadic interrupts thrown from our NIC. */
...@@ -1286,3 +1266,20 @@ irqreturn_t iwl_pcie_isr_ict(int irq, void *data) ...@@ -1286,3 +1266,20 @@ irqreturn_t iwl_pcie_isr_ict(int irq, void *data)
spin_unlock_irqrestore(&trans_pcie->irq_lock, flags); spin_unlock_irqrestore(&trans_pcie->irq_lock, flags);
return ret; return ret;
} }
irqreturn_t iwl_pcie_isr(int irq, void *data)
{
struct iwl_trans *trans = data;
if (!trans)
return IRQ_NONE;
/* Disable (but don't clear!) interrupts here to avoid
* back-to-back ISRs and sporadic interrupts from our NIC.
* If we have something to service, the tasklet will re-enable ints.
* If we *don't* have something, we'll re-enable before leaving here.
*/
iwl_write32(trans, CSR_INT_MASK, 0x00000000);
return iwl_pcie_isr_ict(trans);
}
...@@ -1597,7 +1597,7 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev, ...@@ -1597,7 +1597,7 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev,
if (iwl_pcie_alloc_ict(trans)) if (iwl_pcie_alloc_ict(trans))
goto out_free_cmd_pool; goto out_free_cmd_pool;
err = request_threaded_irq(pdev->irq, iwl_pcie_isr_ict, err = request_threaded_irq(pdev->irq, iwl_pcie_isr,
iwl_pcie_irq_handler, iwl_pcie_irq_handler,
IRQF_SHARED, DRV_NAME, trans); IRQF_SHARED, DRV_NAME, trans);
if (err) { if (err) {
......
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