Commit 86166f98 authored by Linus Torvalds's avatar Linus Torvalds

Merge master.kernel.org:/home/rmk/linux-2.6-arm

parents 44f8e1a2 db579554
This diff is collapsed.
...@@ -344,9 +344,9 @@ __create_page_tables: ...@@ -344,9 +344,9 @@ __create_page_tables:
str r6, [r0] str r6, [r0]
#endif #endif
#ifdef CONFIG_DEBUG_LL
bic r7, r7, #0x0c @ turn off cacheable bic r7, r7, #0x0c @ turn off cacheable
@ and bufferable bits @ and bufferable bits
#ifdef CONFIG_DEBUG_LL
/* /*
* Map in IO space for serial debugging. * Map in IO space for serial debugging.
* This allows debug messages to be output * This allows debug messages to be output
...@@ -372,27 +372,23 @@ __create_page_tables: ...@@ -372,27 +372,23 @@ __create_page_tables:
teq r1, #MACH_TYPE_NETWINDER teq r1, #MACH_TYPE_NETWINDER
teqne r1, #MACH_TYPE_CATS teqne r1, #MACH_TYPE_CATS
bne 1f bne 1f
add r0, r4, #0x3fc0 @ ff000000 add r0, r4, #0xff000000 >> 18
mov r3, #0x7c000000 orr r3, r7, #0x7c000000
orr r3, r3, r7 str r3, [r0]
str r3, [r0], #4
add r3, r3, #1 << 20
str r3, [r0], #4
1: 1:
#endif #endif
#endif
#ifdef CONFIG_ARCH_RPC #ifdef CONFIG_ARCH_RPC
/* /*
* Map in screen at 0x02000000 & SCREEN2_BASE * Map in screen at 0x02000000 & SCREEN2_BASE
* Similar reasons here - for debug. This is * Similar reasons here - for debug. This is
* only for Acorn RiscPC architectures. * only for Acorn RiscPC architectures.
*/ */
add r0, r4, #0x80 @ 02000000 add r0, r4, #0x02000000 >> 18
mov r3, #0x02000000 orr r3, r7, #0x02000000
orr r3, r3, r7
str r3, [r0] str r3, [r0]
add r0, r4, #0x3600 @ d8000000 add r0, r4, #0xd8000000 >> 18
str r3, [r0] str r3, [r0]
#endif
#endif #endif
mov pc, lr mov pc, lr
.ltorg .ltorg
......
...@@ -24,3 +24,7 @@ obj-$(CONFIG_LEDS) += $(led-y) ...@@ -24,3 +24,7 @@ obj-$(CONFIG_LEDS) += $(led-y)
# Misc features # Misc features
obj-$(CONFIG_PM) += pm.o sleep.o obj-$(CONFIG_PM) += pm.o sleep.o
ifeq ($(CONFIG_PXA27x),y)
obj-$(CONFIG_PM) += standby.o
endif
...@@ -126,6 +126,7 @@ int pxa_cpu_pm_prepare(suspend_state_t state) ...@@ -126,6 +126,7 @@ int pxa_cpu_pm_prepare(suspend_state_t state)
{ {
switch (state) { switch (state) {
case PM_SUSPEND_MEM: case PM_SUSPEND_MEM:
case PM_SUSPEND_STANDBY:
return 0; return 0;
default: default:
return -EINVAL; return -EINVAL;
...@@ -138,6 +139,9 @@ void pxa_cpu_pm_enter(suspend_state_t state) ...@@ -138,6 +139,9 @@ void pxa_cpu_pm_enter(suspend_state_t state)
extern void pxa_cpu_suspend(unsigned int); extern void pxa_cpu_suspend(unsigned int);
extern void pxa_cpu_resume(void); extern void pxa_cpu_resume(void);
if (state == PM_SUSPEND_STANDBY)
CKEN = CKEN22_MEMC | CKEN9_OSTIMER | CKEN16_LCD |CKEN0_PWM0;
else
CKEN = CKEN22_MEMC | CKEN9_OSTIMER; CKEN = CKEN22_MEMC | CKEN9_OSTIMER;
/* ensure voltage-change sequencer not initiated, which hangs */ /* ensure voltage-change sequencer not initiated, which hangs */
...@@ -147,6 +151,9 @@ void pxa_cpu_pm_enter(suspend_state_t state) ...@@ -147,6 +151,9 @@ void pxa_cpu_pm_enter(suspend_state_t state)
PEDR = 0xDF12FE1B; PEDR = 0xDF12FE1B;
switch (state) { switch (state) {
case PM_SUSPEND_STANDBY:
pxa_cpu_standby();
break;
case PM_SUSPEND_MEM: case PM_SUSPEND_MEM:
/* set resume return address */ /* set resume return address */
PSPR = virt_to_phys(pxa_cpu_resume); PSPR = virt_to_phys(pxa_cpu_resume);
......
/*
* PXA27x standby mode
*
* Author: David Burrage
*
* 2005 (c) MontaVista Software, Inc. This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*/
#include <linux/config.h>
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/hardware.h>
#include <asm/arch/pxa-regs.h>
.text
ENTRY(pxa_cpu_standby)
ldr r0, =PSSR
mov r1, #(PSSR_PH | PSSR_STS)
mov r2, #2
mov r3, #UNCACHED_PHYS_0 @ Read mem context in.
ldr ip, [r3]
b 1f
.align 5
1: mcr p14, 0, r2, c7, c0, 0 @ put the system into Standby
str r1, [r0] @ make sure PSSR_PH/STS are clear
mov pc, lr
...@@ -271,8 +271,7 @@ static int sa1110_target(struct cpufreq_policy *policy, ...@@ -271,8 +271,7 @@ static int sa1110_target(struct cpufreq_policy *policy,
*/ */
sdram_set_refresh(2); sdram_set_refresh(2);
if (!irqs_disabled()) { if (!irqs_disabled()) {
set_current_state(TASK_UNINTERRUPTIBLE); msleep(20);
schedule_timeout(20 * HZ / 1000);
} else { } else {
mdelay(20); mdelay(20);
} }
......
...@@ -1505,6 +1505,7 @@ ...@@ -1505,6 +1505,7 @@
#define PSSR_OTGPH (1 << 6) /* OTG Peripheral control Hold */ #define PSSR_OTGPH (1 << 6) /* OTG Peripheral control Hold */
#define PSSR_RDH (1 << 5) /* Read Disable Hold */ #define PSSR_RDH (1 << 5) /* Read Disable Hold */
#define PSSR_PH (1 << 4) /* Peripheral Control Hold */ #define PSSR_PH (1 << 4) /* Peripheral Control Hold */
#define PSSR_STS (1 << 3) /* Standby Mode Status */
#define PSSR_VFS (1 << 2) /* VDD Fault Status */ #define PSSR_VFS (1 << 2) /* VDD Fault Status */
#define PSSR_BFS (1 << 1) /* Battery Fault Status */ #define PSSR_BFS (1 << 1) /* Battery Fault Status */
#define PSSR_SSS (1 << 0) /* Software Sleep Status */ #define PSSR_SSS (1 << 0) /* Software Sleep Status */
...@@ -1965,6 +1966,7 @@ ...@@ -1965,6 +1966,7 @@
#define MECR_NOS (1 << 0) /* Number Of Sockets: 0 -> 1 sock, 1 -> 2 sock */ #define MECR_NOS (1 << 0) /* Number Of Sockets: 0 -> 1 sock, 1 -> 2 sock */
#define MECR_CIT (1 << 1) /* Card Is There: 0 -> no card, 1 -> card inserted */ #define MECR_CIT (1 << 1) /* Card Is There: 0 -> no card, 1 -> card inserted */
#define MDREFR_K0DB4 (1 << 29) /* SDCLK0 Divide by 4 Control/Status */
#define MDREFR_K2FREE (1 << 25) /* SDRAM Free-Running Control */ #define MDREFR_K2FREE (1 << 25) /* SDRAM Free-Running Control */
#define MDREFR_K1FREE (1 << 24) /* SDRAM Free-Running Control */ #define MDREFR_K1FREE (1 << 24) /* SDRAM Free-Running Control */
#define MDREFR_K0FREE (1 << 23) /* SDRAM Free-Running Control */ #define MDREFR_K0FREE (1 << 23) /* SDRAM Free-Running Control */
......
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