Commit 87fed556 authored by Rafał Miłecki's avatar Rafał Miłecki Committed by John W. Linville

bcma: get info about flash type SoC booted from

There is an ongoing work on cleaning MIPS's nvram support so it could be
re-used on other platforms (bcm53xx to say precisely).
This will require a bit of extra logic in bcma this patch implements.
Signed-off-by: default avatarRafał Miłecki <zajec5@gmail.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent d17ec4d5
...@@ -21,6 +21,14 @@ ...@@ -21,6 +21,14 @@
#include <linux/serial_reg.h> #include <linux/serial_reg.h>
#include <linux/time.h> #include <linux/time.h>
enum bcma_boot_dev {
BCMA_BOOT_DEV_UNK = 0,
BCMA_BOOT_DEV_ROM,
BCMA_BOOT_DEV_PARALLEL,
BCMA_BOOT_DEV_SERIAL,
BCMA_BOOT_DEV_NAND,
};
static const char * const part_probes[] = { "bcm47xxpart", NULL }; static const char * const part_probes[] = { "bcm47xxpart", NULL };
static struct physmap_flash_data bcma_pflash_data = { static struct physmap_flash_data bcma_pflash_data = {
...@@ -229,11 +237,51 @@ u32 bcma_cpu_clock(struct bcma_drv_mips *mcore) ...@@ -229,11 +237,51 @@ u32 bcma_cpu_clock(struct bcma_drv_mips *mcore)
} }
EXPORT_SYMBOL(bcma_cpu_clock); EXPORT_SYMBOL(bcma_cpu_clock);
static enum bcma_boot_dev bcma_boot_dev(struct bcma_bus *bus)
{
struct bcma_drv_cc *cc = &bus->drv_cc;
u8 cc_rev = cc->core->id.rev;
if (cc_rev == 42) {
struct bcma_device *core;
core = bcma_find_core(bus, BCMA_CORE_NS_ROM);
if (core) {
switch (bcma_aread32(core, BCMA_IOST) &
BCMA_NS_ROM_IOST_BOOT_DEV_MASK) {
case BCMA_NS_ROM_IOST_BOOT_DEV_NOR:
return BCMA_BOOT_DEV_SERIAL;
case BCMA_NS_ROM_IOST_BOOT_DEV_NAND:
return BCMA_BOOT_DEV_NAND;
case BCMA_NS_ROM_IOST_BOOT_DEV_ROM:
default:
return BCMA_BOOT_DEV_ROM;
}
}
} else {
if (cc_rev == 38) {
if (cc->status & BCMA_CC_CHIPST_5357_NAND_BOOT)
return BCMA_BOOT_DEV_NAND;
else if (cc->status & BIT(5))
return BCMA_BOOT_DEV_ROM;
}
if ((cc->capabilities & BCMA_CC_CAP_FLASHT) ==
BCMA_CC_FLASHT_PARA)
return BCMA_BOOT_DEV_PARALLEL;
else
return BCMA_BOOT_DEV_SERIAL;
}
return BCMA_BOOT_DEV_SERIAL;
}
static void bcma_core_mips_flash_detect(struct bcma_drv_mips *mcore) static void bcma_core_mips_flash_detect(struct bcma_drv_mips *mcore)
{ {
struct bcma_bus *bus = mcore->core->bus; struct bcma_bus *bus = mcore->core->bus;
struct bcma_drv_cc *cc = &bus->drv_cc; struct bcma_drv_cc *cc = &bus->drv_cc;
struct bcma_pflash *pflash = &cc->pflash; struct bcma_pflash *pflash = &cc->pflash;
enum bcma_boot_dev boot_dev;
switch (cc->capabilities & BCMA_CC_CAP_FLASHT) { switch (cc->capabilities & BCMA_CC_CAP_FLASHT) {
case BCMA_CC_FLASHT_STSER: case BCMA_CC_FLASHT_STSER:
...@@ -269,6 +317,20 @@ static void bcma_core_mips_flash_detect(struct bcma_drv_mips *mcore) ...@@ -269,6 +317,20 @@ static void bcma_core_mips_flash_detect(struct bcma_drv_mips *mcore)
bcma_nflash_init(cc); bcma_nflash_init(cc);
} }
} }
/* Determine flash type this SoC boots from */
boot_dev = bcma_boot_dev(bus);
switch (boot_dev) {
case BCMA_BOOT_DEV_PARALLEL:
case BCMA_BOOT_DEV_SERIAL:
/* TODO: Init NVRAM using BCMA_SOC_FLASH2 window */
break;
case BCMA_BOOT_DEV_NAND:
/* TODO: Init NVRAM using BCMA_SOC_FLASH1 window */
break;
default:
break;
}
} }
void bcma_core_mips_early_init(struct bcma_drv_mips *mcore) void bcma_core_mips_early_init(struct bcma_drv_mips *mcore)
......
...@@ -39,6 +39,11 @@ ...@@ -39,6 +39,11 @@
#define BCMA_RESET_CTL_RESET 0x0001 #define BCMA_RESET_CTL_RESET 0x0001
#define BCMA_RESET_ST 0x0804 #define BCMA_RESET_ST 0x0804
#define BCMA_NS_ROM_IOST_BOOT_DEV_MASK 0x0003
#define BCMA_NS_ROM_IOST_BOOT_DEV_NOR 0x0000
#define BCMA_NS_ROM_IOST_BOOT_DEV_NAND 0x0001
#define BCMA_NS_ROM_IOST_BOOT_DEV_ROM 0x0002
/* BCMA PCI config space registers. */ /* BCMA PCI config space registers. */
#define BCMA_PCI_PMCSR 0x44 #define BCMA_PCI_PMCSR 0x44
#define BCMA_PCI_PE 0x100 #define BCMA_PCI_PE 0x100
......
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