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Commit 8d5c3150 authored by Linus Torvalds's avatar Linus Torvalds
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Merge master.kernel.org:/home/rmk/linux-2.6-arm

parents a9df3d0f 3f471126
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Showing with 930 additions and 289 deletions
arch/arm/Kconfig
View file @ 8d5c3150
......@@ -180,6 +180,7 @@ config ARCH_OMAP
config ARCH_VERSATILE
bool "Versatile"
select ARM_AMBA
select ARM_VIC
select ICST307
help
This enables support for ARM Ltd Versatile board.
......@@ -400,6 +401,38 @@ config NO_IDLE_HZ
Currently at least OMAP, PXA2xx and SA11x0 platforms are known
to have accurate timekeeping with dynamic tick.
config AEABI
bool "Use the ARM EABI to compile the kernel"
help
This option allows for the kernel to be compiled using the latest
ARM ABI (aka EABI). This is only useful if you are using a user
space environment that is also compiled with EABI.
Since there are major incompatibilities between the legacy ABI and
EABI, especially with regard to structure member alignment, this
option also changes the kernel syscall calling convention to
disambiguate both ABIs and allow for backward compatibility support
(selected with CONFIG_OABI_COMPAT).
To use this you need GCC version 4.0.0 or later.
config OABI_COMPAT
bool "Allow old ABI binaries to run with this kernel"
depends on AEABI
default y
help
This option preserves the old syscall interface along with the
new (ARM EABI) one. It also provides a compatibility layer to
intercept syscalls that have structure arguments which layout
in memory differs between the legacy ABI and the new ARM EABI
(only for non "thumb" binaries). This option adds a tiny
overhead to all syscalls and produces a slightly larger kernel.
If you know you'll be using only pure EABI user space then you
can say N here. If this option is not selected and you attempt
to execute a legacy ABI binary then the result will be
UNPREDICTABLE (in fact it can be predicted that it won't work
at all). If in doubt say Y.
config ARCH_DISCONTIGMEM_ENABLE
bool
default (ARCH_LH7A40X && !LH7A40X_CONTIGMEM)
......@@ -586,6 +619,7 @@ comment "At least one emulation must be selected"
config FPE_NWFPE
bool "NWFPE math emulation"
depends on !AEABI || OABI_COMPAT
---help---
Say Y to include the NWFPE floating point emulator in the kernel.
This is necessary to run most binaries. Linux does not currently
......@@ -609,7 +643,7 @@ config FPE_NWFPE_XP
config FPE_FASTFPE
bool "FastFPE math emulation (EXPERIMENTAL)"
depends on !CPU_32v3 && EXPERIMENTAL
depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
---help---
Say Y here to include the FAST floating point emulator in the kernel.
This is an experimental much faster emulator which now also has full
......@@ -641,6 +675,7 @@ source "fs/Kconfig.binfmt"
config ARTHUR
tristate "RISC OS personality"
depends on !AEABI
help
Say Y here to include the kernel code necessary if you want to run
Acorn RISC OS/Arthur binaries under Linux. This code is still very
......
arch/arm/Makefile
View file @ 8d5c3150
......@@ -56,8 +56,13 @@ tune-$(CONFIG_CPU_SA1100) :=-mtune=strongarm1100
tune-$(CONFIG_CPU_XSCALE) :=$(call cc-option,-mtune=xscale,-mtune=strongarm110) -Wa,-mcpu=xscale
tune-$(CONFIG_CPU_V6) :=$(call cc-option,-mtune=arm1136j-s,-mtune=strongarm)
# Need -Uarm for gcc < 3.x
ifeq ($(CONFIG_AEABI),y)
CFLAGS_ABI :=-mabi=aapcs -mno-thumb-interwork
else
CFLAGS_ABI :=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) $(call cc-option,-mno-thumb-interwork,)
endif
# Need -Uarm for gcc < 3.x
CFLAGS +=$(CFLAGS_ABI) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -msoft-float -Uarm
AFLAGS +=$(CFLAGS_ABI) $(arch-y) $(tune-y) -msoft-float
......
arch/arm/common/Kconfig
View file @ 8d5c3150
config ICST525
config ARM_GIC
bool
config ARM_GIC
config ARM_VIC
bool
config ICST525
bool
config ICST307
......
arch/arm/common/Makefile
View file @ 8d5c3150
......@@ -4,6 +4,7 @@
obj-y += rtctime.o
obj-$(CONFIG_ARM_GIC) += gic.o
obj-$(CONFIG_ARM_VIC) += vic.o
obj-$(CONFIG_ICST525) += icst525.o
obj-$(CONFIG_ICST307) += icst307.o
obj-$(CONFIG_SA1111) += sa1111.o
......
arch/arm/common/vic.c 0 → 100644
View file @ 8d5c3150
/*
* linux/arch/arm/common/vic.c
*
* Copyright (C) 1999 - 2003 ARM Limited
* Copyright (C) 2000 Deep Blue Solutions Ltd
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/init.h>
#include <linux/list.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach/irq.h>
#include <asm/hardware/vic.h>
static void __iomem *vic_base;
static void vic_mask_irq(unsigned int irq)
{
irq -= IRQ_VIC_START;
writel(1 << irq, vic_base + VIC_INT_ENABLE_CLEAR);
}
static void vic_unmask_irq(unsigned int irq)
{
irq -= IRQ_VIC_START;
writel(1 << irq, vic_base + VIC_INT_ENABLE);
}
static struct irqchip vic_chip = {
.ack = vic_mask_irq,
.mask = vic_mask_irq,
.unmask = vic_unmask_irq,
};
void __init vic_init(void __iomem *base, u32 vic_sources)
{
unsigned int i;
vic_base = base;
/* Disable all interrupts initially. */
writel(0, vic_base + VIC_INT_SELECT);
writel(0, vic_base + VIC_INT_ENABLE);
writel(~0, vic_base + VIC_INT_ENABLE_CLEAR);
writel(0, vic_base + VIC_IRQ_STATUS);
writel(0, vic_base + VIC_ITCR);
writel(~0, vic_base + VIC_INT_SOFT_CLEAR);
/*
* Make sure we clear all existing interrupts
*/
writel(0, vic_base + VIC_VECT_ADDR);
for (i = 0; i < 19; i++) {
unsigned int value;
value = readl(vic_base + VIC_VECT_ADDR);
writel(value, vic_base + VIC_VECT_ADDR);
}
for (i = 0; i < 16; i++) {
void __iomem *reg = vic_base + VIC_VECT_CNTL0 + (i * 4);
writel(VIC_VECT_CNTL_ENABLE | i, reg);
}
writel(32, vic_base + VIC_DEF_VECT_ADDR);
for (i = 0; i < 32; i++) {
unsigned int irq = IRQ_VIC_START + i;
set_irq_chip(irq, &vic_chip);
if (vic_sources & (1 << i)) {
set_irq_handler(irq, do_level_IRQ);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
}
}
}
arch/arm/kernel/Makefile
View file @ 8d5c3150
......@@ -20,6 +20,7 @@ obj-$(CONFIG_ARTHUR) += arthur.o
obj-$(CONFIG_ISA_DMA) += dma-isa.o
obj-$(CONFIG_PCI) += bios32.o
obj-$(CONFIG_SMP) += smp.o
obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o
obj-$(CONFIG_IWMMXT) += iwmmxt.o
AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt
......
arch/arm/kernel/armksyms.c
View file @ 8d5c3150
......@@ -35,6 +35,16 @@ extern void __udivsi3(void);
extern void __umodsi3(void);
extern void __do_div64(void);
extern void __aeabi_idiv(void);
extern void __aeabi_idivmod(void);
extern void __aeabi_lasr(void);
extern void __aeabi_llsl(void);
extern void __aeabi_llsr(void);
extern void __aeabi_lmul(void);
extern void __aeabi_uidiv(void);
extern void __aeabi_uidivmod(void);
extern void __aeabi_ulcmp(void);
extern void fpundefinstr(void);
extern void fp_enter(void);
......@@ -141,6 +151,18 @@ EXPORT_SYMBOL(__udivsi3);
EXPORT_SYMBOL(__umodsi3);
EXPORT_SYMBOL(__do_div64);
#ifdef CONFIG_AEABI
EXPORT_SYMBOL(__aeabi_idiv);
EXPORT_SYMBOL(__aeabi_idivmod);
EXPORT_SYMBOL(__aeabi_lasr);
EXPORT_SYMBOL(__aeabi_llsl);
EXPORT_SYMBOL(__aeabi_llsr);
EXPORT_SYMBOL(__aeabi_lmul);
EXPORT_SYMBOL(__aeabi_uidiv);
EXPORT_SYMBOL(__aeabi_uidivmod);
EXPORT_SYMBOL(__aeabi_ulcmp);
#endif
/* bitops */
EXPORT_SYMBOL(_set_bit_le);
EXPORT_SYMBOL(_test_and_set_bit_le);
......
arch/arm/kernel/calls.S
View file @ 8d5c3150
......@@ -13,7 +13,7 @@
#define NR_syscalls 328
#else
__syscall_start:
100:
/* 0 */ .long sys_restart_syscall
.long sys_exit
.long sys_fork_wrapper
......@@ -27,7 +27,7 @@ __syscall_start:
/* 10 */ .long sys_unlink
.long sys_execve_wrapper
.long sys_chdir
.long sys_time /* used by libc4 */
.long OBSOLETE(sys_time) /* used by libc4 */
.long sys_mknod
/* 15 */ .long sys_chmod
.long sys_lchown16
......@@ -36,15 +36,15 @@ __syscall_start:
.long sys_lseek
/* 20 */ .long sys_getpid
.long sys_mount
.long sys_oldumount /* used by libc4 */
.long OBSOLETE(sys_oldumount) /* used by libc4 */
.long sys_setuid16
.long sys_getuid16
/* 25 */ .long sys_stime
/* 25 */ .long OBSOLETE(sys_stime)
.long sys_ptrace
.long sys_alarm /* used by libc4 */
.long OBSOLETE(sys_alarm) /* used by libc4 */
.long sys_ni_syscall /* was sys_fstat */
.long sys_pause
/* 30 */ .long sys_utime /* used by libc4 */
/* 30 */ .long OBSOLETE(sys_utime) /* used by libc4 */
.long sys_ni_syscall /* was sys_stty */
.long sys_ni_syscall /* was sys_getty */
.long sys_access
......@@ -90,21 +90,21 @@ __syscall_start:
.long sys_sigpending
.long sys_sethostname
/* 75 */ .long sys_setrlimit
.long sys_old_getrlimit /* used by libc4 */
.long OBSOLETE(sys_old_getrlimit) /* used by libc4 */
.long sys_getrusage
.long sys_gettimeofday
.long sys_settimeofday
/* 80 */ .long sys_getgroups16
.long sys_setgroups16
.long old_select /* used by libc4 */
.long OBSOLETE(old_select) /* used by libc4 */
.long sys_symlink
.long sys_ni_syscall /* was sys_lstat */
/* 85 */ .long sys_readlink
.long sys_uselib
.long sys_swapon
.long sys_reboot
.long old_readdir /* used by libc4 */
/* 90 */ .long old_mmap /* used by libc4 */
.long OBSOLETE(old_readdir) /* used by libc4 */
/* 90 */ .long OBSOLETE(old_mmap) /* used by libc4 */
.long sys_munmap
.long sys_truncate
.long sys_ftruncate
......@@ -116,7 +116,7 @@ __syscall_start:
.long sys_statfs
/* 100 */ .long sys_fstatfs
.long sys_ni_syscall
.long sys_socketcall
.long OBSOLETE(sys_socketcall)
.long sys_syslog
.long sys_setitimer
/* 105 */ .long sys_getitimer
......@@ -127,11 +127,11 @@ __syscall_start:
/* 110 */ .long sys_ni_syscall /* was sys_iopl */
.long sys_vhangup
.long sys_ni_syscall
.long sys_syscall /* call a syscall */
.long OBSOLETE(sys_syscall) /* call a syscall */
.long sys_wait4
/* 115 */ .long sys_swapoff
.long sys_sysinfo
.long sys_ipc
.long OBSOLETE(ABI(sys_ipc, sys_oabi_ipc))
.long sys_fsync
.long sys_sigreturn_wrapper
/* 120 */ .long sys_clone_wrapper
......@@ -194,8 +194,8 @@ __syscall_start:
.long sys_rt_sigtimedwait
.long sys_rt_sigqueueinfo
.long sys_rt_sigsuspend_wrapper
/* 180 */ .long sys_pread64
.long sys_pwrite64
/* 180 */ .long ABI(sys_pread64, sys_oabi_pread64)
.long ABI(sys_pwrite64, sys_oabi_pwrite64)
.long sys_chown16
.long sys_getcwd
.long sys_capget
......@@ -207,11 +207,11 @@ __syscall_start:
/* 190 */ .long sys_vfork_wrapper
.long sys_getrlimit
.long sys_mmap2
.long sys_truncate64
.long sys_ftruncate64
/* 195 */ .long sys_stat64
.long sys_lstat64
.long sys_fstat64
.long ABI(sys_truncate64, sys_oabi_truncate64)
.long ABI(sys_ftruncate64, sys_oabi_ftruncate64)
/* 195 */ .long ABI(sys_stat64, sys_oabi_stat64)
.long ABI(sys_lstat64, sys_oabi_lstat64)
.long ABI(sys_fstat64, sys_oabi_fstat64)
.long sys_lchown
.long sys_getuid
/* 200 */ .long sys_getgid
......@@ -235,11 +235,11 @@ __syscall_start:
.long sys_pivot_root
.long sys_mincore
/* 220 */ .long sys_madvise
.long sys_fcntl64
.long ABI(sys_fcntl64, sys_oabi_fcntl64)
.long sys_ni_syscall /* TUX */
.long sys_ni_syscall
.long sys_gettid
/* 225 */ .long sys_readahead
/* 225 */ .long ABI(sys_readahead, sys_oabi_readahead)
.long sys_setxattr
.long sys_lsetxattr
.long sys_fsetxattr
......@@ -265,8 +265,8 @@ __syscall_start:
.long sys_exit_group
.long sys_lookup_dcookie
/* 250 */ .long sys_epoll_create
.long sys_epoll_ctl
.long sys_epoll_wait
.long ABI(sys_epoll_ctl, sys_oabi_epoll_ctl)
.long ABI(sys_epoll_wait, sys_oabi_epoll_wait)
.long sys_remap_file_pages
.long sys_ni_syscall /* sys_set_thread_area */
/* 255 */ .long sys_ni_syscall /* sys_get_thread_area */
......@@ -280,8 +280,8 @@ __syscall_start:
.long sys_clock_gettime
.long sys_clock_getres
/* 265 */ .long sys_clock_nanosleep
.long sys_statfs64
.long sys_fstatfs64
.long sys_statfs64_wrapper
.long sys_fstatfs64_wrapper
.long sys_tgkill
.long sys_utimes
/* 270 */ .long sys_arm_fadvise64_64
......@@ -312,7 +312,7 @@ __syscall_start:
/* 295 */ .long sys_getsockopt
.long sys_sendmsg
.long sys_recvmsg
.long sys_semop
.long ABI(sys_semop, sys_oabi_semop)
.long sys_semget
/* 300 */ .long sys_semctl
.long sys_msgsnd
......@@ -326,7 +326,7 @@ __syscall_start:
.long sys_add_key
/* 310 */ .long sys_request_key
.long sys_keyctl
.long sys_semtimedop
.long ABI(sys_semtimedop, sys_oabi_semtimedop)
/* vserver */ .long sys_ni_syscall
.long sys_ioprio_set
/* 315 */ .long sys_ioprio_get
......@@ -336,9 +336,8 @@ __syscall_start:
.long sys_mbind
/* 320 */ .long sys_get_mempolicy
.long sys_set_mempolicy
__syscall_end:
.rept NR_syscalls - (__syscall_end - __syscall_start) / 4
.rept NR_syscalls - (. - 100b) / 4
.long sys_ni_syscall
.endr
#endif
arch/arm/kernel/entry-armv.S
View file @ 8d5c3150
......@@ -3,6 +3,7 @@
*
* Copyright (C) 1996,1997,1998 Russell King.
* ARM700 fix by Matthew Godbolt (linux-user@willothewisp.demon.co.uk)
* nommu support by Hyok S. Choi (hyok.choi@samsung.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
......@@ -104,14 +105,24 @@ common_invalid:
/*
* SVC mode handlers
*/
#if defined(CONFIG_AEABI) && (__LINUX_ARM_ARCH__ >= 5)
#define SPFIX(code...) code
#else
#define SPFIX(code...)
#endif
.macro svc_entry
sub sp, sp, #S_FRAME_SIZE
SPFIX( tst sp, #4 )
SPFIX( bicne sp, sp, #4 )
stmib sp, {r1 - r12}
ldmia r0, {r1 - r3}
add r5, sp, #S_SP @ here for interlock avoidance
mov r4, #-1 @ "" "" "" ""
add r0, sp, #S_FRAME_SIZE @ "" "" "" ""
SPFIX( addne r0, r0, #4 )
str r1, [sp] @ save the "real" r0 copied
@ from the exception stack
......@@ -302,7 +313,14 @@ __pabt_svc:
/*
* User mode handlers
*
* EABI note: sp_svc is always 64-bit aligned here, so should S_FRAME_SIZE
*/
#if defined(CONFIG_AEABI) && (__LINUX_ARM_ARCH__ >= 5) && (S_FRAME_SIZE & 7)
#error "sizeof(struct pt_regs) must be a multiple of 8"
#endif
.macro usr_entry
sub sp, sp, #S_FRAME_SIZE
stmib sp, {r1 - r12}
......@@ -538,7 +556,11 @@ ENTRY(__switch_to)
add ip, r1, #TI_CPU_SAVE
ldr r3, [r2, #TI_TP_VALUE]
stmia ip!, {r4 - sl, fp, sp, lr} @ Store most regs on stack
#ifndef CONFIG_MMU
add r2, r2, #TI_CPU_DOMAIN
#else
ldr r6, [r2, #TI_CPU_DOMAIN]!
#endif
#if __LINUX_ARM_ARCH__ >= 6
#ifdef CONFIG_CPU_MPCORE
clrex
......@@ -556,7 +578,9 @@ ENTRY(__switch_to)
mov r4, #0xffff0fff
str r3, [r4, #-15] @ TLS val at 0xffff0ff0
#endif
#ifdef CONFIG_MMU
mcr p15, 0, r6, c3, c0, 0 @ Set domain register
#endif
#ifdef CONFIG_VFP
@ Always disable VFP so we can lazily save/restore the old
@ state. This occurs in the context of the previous thread.
......
arch/arm/kernel/entry-common.S
View file @ 8d5c3150
......@@ -98,20 +98,14 @@ ENTRY(ret_from_fork)
run on an ARM7 and we can save a couple of instructions.
--pb */
#ifdef CONFIG_CPU_ARM710
.macro arm710_bug_check, instr, temp
and \temp, \instr, #0x0f000000 @ check for SWI
teq \temp, #0x0f000000
bne .Larm700bug
.endm
.Larm700bug:
#define A710(code...) code
.Larm710bug:
ldmia sp, {r0 - lr}^ @ Get calling r0 - lr
mov r0, r0
add sp, sp, #S_FRAME_SIZE
subs pc, lr, #4
#else
.macro arm710_bug_check, instr, temp
.endm
#define A710(code...)
#endif
.align 5
......@@ -129,14 +123,50 @@ ENTRY(vector_swi)
/*
* Get the system call number.
*/
#if defined(CONFIG_OABI_COMPAT)
/*
* If we have CONFIG_OABI_COMPAT then we need to look at the swi
* value to determine if it is an EABI or an old ABI call.
*/
#ifdef CONFIG_ARM_THUMB
tst r8, #PSR_T_BIT
movne r10, #0 @ no thumb OABI emulation
ldreq r10, [lr, #-4] @ get SWI instruction
#else
ldr r10, [lr, #-4] @ get SWI instruction
A710( and ip, r10, #0x0f000000 @ check for SWI )
A710( teq ip, #0x0f000000 )
A710( bne .Larm710bug )
#endif
#elif defined(CONFIG_AEABI)
/*
* Pure EABI user space always put syscall number into scno (r7).
*/
A710( ldr ip, [lr, #-4] @ get SWI instruction )
A710( and ip, ip, #0x0f000000 @ check for SWI )
A710( teq ip, #0x0f000000 )
A710( bne .Larm710bug )
#elif defined(CONFIG_ARM_THUMB)
/* Legacy ABI only, possibly thumb mode. */
tst r8, #PSR_T_BIT @ this is SPSR from save_user_regs
addne scno, r7, #__NR_SYSCALL_BASE @ put OS number in
ldreq scno, [lr, #-4]
#else
/* Legacy ABI only. */
ldr scno, [lr, #-4] @ get SWI instruction
A710( and ip, scno, #0x0f000000 @ check for SWI )
A710( teq ip, #0x0f000000 )
A710( bne .Larm710bug )
#endif
arm710_bug_check scno, ip
#ifdef CONFIG_ALIGNMENT_TRAP
ldr ip, __cr_alignment
......@@ -145,18 +175,31 @@ ENTRY(vector_swi)
#endif
enable_irq
stmdb sp!, {r4, r5} @ push fifth and sixth args
get_thread_info tsk
adr tbl, sys_call_table @ load syscall table pointer
ldr ip, [tsk, #TI_FLAGS] @ check for syscall tracing
#if defined(CONFIG_OABI_COMPAT)
/*
* If the swi argument is zero, this is an EABI call and we do nothing.
*
* If this is an old ABI call, get the syscall number into scno and
* get the old ABI syscall table address.
*/
bics r10, r10, #0xff000000
eorne scno, r10, #__NR_OABI_SYSCALL_BASE
ldrne tbl, =sys_oabi_call_table
#elif !defined(CONFIG_AEABI)
bic scno, scno, #0xff000000 @ mask off SWI op-code
eor scno, scno, #__NR_SYSCALL_BASE @ check OS number
adr tbl, sys_call_table @ load syscall table pointer
#endif
stmdb sp!, {r4, r5} @ push fifth and sixth args
tst ip, #_TIF_SYSCALL_TRACE @ are we tracing syscalls?
bne __sys_trace
adr lr, ret_fast_syscall @ return address
cmp scno, #NR_syscalls @ check upper syscall limit
adr lr, ret_fast_syscall @ return address
ldrcc pc, [tbl, scno, lsl #2] @ call sys_* routine
add r1, sp, #S_OFF
......@@ -171,11 +214,13 @@ ENTRY(vector_swi)
* context switches, and waiting for our parent to respond.
*/
__sys_trace:
mov r2, scno
add r1, sp, #S_OFF
mov r0, #0 @ trace entry [IP = 0]
bl syscall_trace
adr lr, __sys_trace_return @ return address
mov scno, r0 @ syscall number (possibly new)
add r1, sp, #S_R0 + S_OFF @ pointer to regs
cmp scno, #NR_syscalls @ check upper syscall limit
ldmccia r1, {r0 - r3} @ have to reload r0 - r3
......@@ -184,6 +229,7 @@ __sys_trace:
__sys_trace_return:
str r0, [sp, #S_R0 + S_OFF]! @ save returned r0
mov r2, scno
mov r1, sp
mov r0, #1 @ trace exit [IP = 1]
bl syscall_trace
......@@ -194,11 +240,25 @@ __sys_trace_return:
.type __cr_alignment, #object
__cr_alignment:
.word cr_alignment
#endif
.ltorg
/*
* This is the syscall table declaration for native ABI syscalls.
* With EABI a couple syscalls are obsolete and defined as sys_ni_syscall.
*/
#define ABI(native, compat) native
#ifdef CONFIG_AEABI
#define OBSOLETE(syscall) sys_ni_syscall
#else
#define OBSOLETE(syscall) syscall
#endif
.type sys_call_table, #object
ENTRY(sys_call_table)
#include "calls.S"
#undef ABI
#undef OBSOLETE
/*============================================================================
* Special system call wrappers
......@@ -207,7 +267,7 @@ ENTRY(sys_call_table)
@ r8 = syscall table
.type sys_syscall, #function
sys_syscall:
eor scno, r0, #__NR_SYSCALL_BASE
eor scno, r0, #__NR_OABI_SYSCALL_BASE
cmp scno, #__NR_syscall - __NR_SYSCALL_BASE
cmpne scno, #NR_syscalls @ check range
stmloia sp, {r5, r6} @ shuffle args
......@@ -255,6 +315,16 @@ sys_sigaltstack_wrapper:
ldr r2, [sp, #S_OFF + S_SP]
b do_sigaltstack
sys_statfs64_wrapper:
teq r1, #88
moveq r1, #84
b sys_statfs64
sys_fstatfs64_wrapper:
teq r1, #88
moveq r1, #84
b sys_fstatfs64
/*
* Note: off_4k (r5) is always units of 4K. If we can't do the requested
* offset, we return EINVAL.
......@@ -271,3 +341,49 @@ sys_mmap2:
str r5, [sp, #4]
b do_mmap2
#endif
#ifdef CONFIG_OABI_COMPAT
/*
* These are syscalls with argument register differences
*/
sys_oabi_pread64:
stmia sp, {r3, r4}
b sys_pread64
sys_oabi_pwrite64:
stmia sp, {r3, r4}
b sys_pwrite64
sys_oabi_truncate64:
mov r3, r2
mov r2, r1
b sys_truncate64
sys_oabi_ftruncate64:
mov r3, r2
mov r2, r1
b sys_ftruncate64
sys_oabi_readahead:
str r3, [sp]
mov r3, r2
mov r2, r1
b sys_readahead
/*
* Let's declare a second syscall table for old ABI binaries
* using the compatibility syscall entries.
*/
#define ABI(native, compat) compat
#define OBSOLETE(syscall) syscall
.type sys_oabi_call_table, #object
ENTRY(sys_oabi_call_table)
#include "calls.S"
#undef ABI
#undef OBSOLETE
#endif
arch/arm/kernel/entry-header.S
View file @ 8d5c3150
......@@ -19,6 +19,7 @@
@
@ Most of the stack format comes from struct pt_regs, but with
@ the addition of 8 bytes for storing syscall args 5 and 6.
@ This _must_ remain a multiple of 8 for EABI.
@
#define S_OFF 8
......
arch/arm/kernel/head.S
View file @ 8d5c3150
......@@ -251,12 +251,11 @@ __turn_mmu_on:
* r10 = procinfo
*
* Returns:
* r0, r3, r5, r6, r7 corrupted
* r0, r3, r6, r7 corrupted
* r4 = physical page table address
*/
.type __create_page_tables, %function
__create_page_tables:
ldr r5, [r8, #MACHINFO_PHYSRAM] @ physram
pgtbl r4 @ page table address
/*
......@@ -303,7 +302,7 @@ __create_page_tables:
* Then map first 1MB of ram in case it contains our boot params.
*/
add r0, r4, #PAGE_OFFSET >> 18
orr r6, r5, r7
orr r6, r7, #PHYS_OFFSET
str r6, [r0]
#ifdef CONFIG_XIP_KERNEL
......@@ -311,7 +310,7 @@ __create_page_tables:
* Map some ram to cover our .data and .bss areas.
* Mapping 3MB should be plenty.
*/
sub r3, r4, r5
sub r3, r4, #PHYS_OFFSET
mov r3, r3, lsr #20
add r0, r0, r3, lsl #2
add r6, r6, r3, lsl #20
......
arch/arm/kernel/ptrace.c
View file @ 8d5c3150
......@@ -766,6 +766,11 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
(unsigned long __user *) data);
break;
case PTRACE_SET_SYSCALL:
ret = 0;
child->ptrace_message = data;
break;
default:
ret = ptrace_request(child, request, addr, data);
break;
......@@ -774,14 +779,14 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
return ret;
}
asmlinkage void syscall_trace(int why, struct pt_regs *regs)
asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno)
{
unsigned long ip;
if (!test_thread_flag(TIF_SYSCALL_TRACE))
return;
return scno;
if (!(current->ptrace & PT_PTRACED))
return;
return scno;
/*
* Save IP. IP is used to denote syscall entry/exit:
......@@ -790,6 +795,8 @@ asmlinkage void syscall_trace(int why, struct pt_regs *regs)
ip = regs->ARM_ip;
regs->ARM_ip = why;
current->ptrace_message = scno;
/* the 0x80 provides a way for the tracing parent to distinguish
between a syscall stop and SIGTRAP delivery */
ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
......@@ -804,4 +811,6 @@ asmlinkage void syscall_trace(int why, struct pt_regs *regs)
current->exit_code = 0;
}
regs->ARM_ip = ip;
return current->ptrace_message;
}
arch/arm/kernel/semaphore.c
View file @ 8d5c3150
......@@ -177,41 +177,42 @@ int __down_trylock(struct semaphore * sem)
* ip contains the semaphore pointer on entry. Save the C-clobbered
* registers (r0 to r3 and lr), but not ip, as we use it as a return
* value in some cases..
* To remain AAPCS compliant (64-bit stack align) we save r4 as well.
*/
asm(" .section .sched.text,\"ax\",%progbits \n\
.align 5 \n\
.globl __down_failed \n\
__down_failed: \n\
stmfd sp!, {r0 - r3, lr} \n\
stmfd sp!, {r0 - r4, lr} \n\
mov r0, ip \n\
bl __down \n\
ldmfd sp!, {r0 - r3, pc} \n\
ldmfd sp!, {r0 - r4, pc} \n\
\n\
.align 5 \n\
.globl __down_interruptible_failed \n\
__down_interruptible_failed: \n\
stmfd sp!, {r0 - r3, lr} \n\
stmfd sp!, {r0 - r4, lr} \n\
mov r0, ip \n\
bl __down_interruptible \n\
mov ip, r0 \n\
ldmfd sp!, {r0 - r3, pc} \n\
ldmfd sp!, {r0 - r4, pc} \n\
\n\
.align 5 \n\
.globl __down_trylock_failed \n\
__down_trylock_failed: \n\
stmfd sp!, {r0 - r3, lr} \n\
stmfd sp!, {r0 - r4, lr} \n\
mov r0, ip \n\
bl __down_trylock \n\
mov ip, r0 \n\
ldmfd sp!, {r0 - r3, pc} \n\
ldmfd sp!, {r0 - r4, pc} \n\
\n\
.align 5 \n\
.globl __up_wakeup \n\
__up_wakeup: \n\
stmfd sp!, {r0 - r3, lr} \n\
stmfd sp!, {r0 - r4, lr} \n\
mov r0, ip \n\
bl __up \n\
ldmfd sp!, {r0 - r3, pc} \n\
ldmfd sp!, {r0 - r4, pc} \n\
");
EXPORT_SYMBOL(__down_failed);
......
arch/arm/kernel/sys_arm.c
View file @ 8d5c3150
......@@ -147,6 +147,7 @@ asmlinkage int old_select(struct sel_arg_struct __user *arg)
return sys_select(a.n, a.inp, a.outp, a.exp, a.tvp);
}
#if !defined(CONFIG_AEABI) || defined(CONFIG_OABI_COMPAT)
/*
* sys_ipc() is the de-multiplexer for the SysV IPC calls..
*
......@@ -226,6 +227,7 @@ asmlinkage int sys_ipc(uint call, int first, int second, int third,
return -ENOSYS;
}
}
#endif
/* Fork a new task - this creates a new program thread.
* This is called indirectly via a small wrapper
......
arch/arm/kernel/sys_oabi-compat.c 0 → 100644
View file @ 8d5c3150
/*
* arch/arm/kernel/sys_oabi-compat.c
*
* Compatibility wrappers for syscalls that are used from
* old ABI user space binaries with an EABI kernel.
*
* Author: Nicolas Pitre
* Created: Oct 7, 2005
* Copyright: MontaVista Software, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/*
* The legacy ABI and the new ARM EABI have different rules making some
* syscalls incompatible especially with structure arguments.
* Most notably, Eabi says 64-bit members should be 64-bit aligned instead of
* simply word aligned. EABI also pads structures to the size of the largest
* member it contains instead of the invariant 32-bit.
*
* The following syscalls are affected:
*
* sys_stat64:
* sys_lstat64:
* sys_fstat64:
*
* struct stat64 has different sizes and some members are shifted
* Compatibility wrappers are needed for them and provided below.
*
* sys_fcntl64:
*
* struct flock64 has different sizes and some members are shifted
* A compatibility wrapper is needed and provided below.
*
* sys_statfs64:
* sys_fstatfs64:
*
* struct statfs64 has extra padding with EABI growing its size from
* 84 to 88. This struct is now __attribute__((packed,aligned(4)))
* with a small assembly wrapper to force the sz argument to 84 if it is 88
* to avoid copying the extra padding over user space unexpecting it.
*
* sys_newuname:
*
* struct new_utsname has no padding with EABI. No problem there.
*
* sys_epoll_ctl:
* sys_epoll_wait:
*
* struct epoll_event has its second member shifted also affecting the
* structure size. Compatibility wrappers are needed and provided below.
*
* sys_ipc:
* sys_semop:
* sys_semtimedop:
*
* struct sembuf loses its padding with EABI. Since arrays of them are
* used they have to be copyed to remove the padding. Compatibility wrappers
* provided below.
*/
#include <linux/syscalls.h>
#include <linux/errno.h>
#include <linux/fs.h>
#include <linux/fcntl.h>
#include <linux/eventpoll.h>
#include <linux/sem.h>
#include <asm/ipc.h>
#include <asm/uaccess.h>
struct oldabi_stat64 {
unsigned long long st_dev;
unsigned int __pad1;
unsigned long __st_ino;
unsigned int st_mode;
unsigned int st_nlink;
unsigned long st_uid;
unsigned long st_gid;
unsigned long long st_rdev;
unsigned int __pad2;
long long st_size;
unsigned long st_blksize;
unsigned long long st_blocks;
unsigned long st_atime;
unsigned long st_atime_nsec;
unsigned long st_mtime;
unsigned long st_mtime_nsec;
unsigned long st_ctime;
unsigned long st_ctime_nsec;
unsigned long long st_ino;
} __attribute__ ((packed,aligned(4)));
static long cp_oldabi_stat64(struct kstat *stat,
struct oldabi_stat64 __user *statbuf)
{
struct oldabi_stat64 tmp;
tmp.st_dev = huge_encode_dev(stat->dev);
tmp.__pad1 = 0;
tmp.__st_ino = stat->ino;
tmp.st_mode = stat->mode;
tmp.st_nlink = stat->nlink;
tmp.st_uid = stat->uid;
tmp.st_gid = stat->gid;
tmp.st_rdev = huge_encode_dev(stat->rdev);
tmp.st_size = stat->size;
tmp.st_blocks = stat->blocks;
tmp.__pad2 = 0;
tmp.st_blksize = stat->blksize;
tmp.st_atime = stat->atime.tv_sec;
tmp.st_atime_nsec = stat->atime.tv_nsec;
tmp.st_mtime = stat->mtime.tv_sec;
tmp.st_mtime_nsec = stat->mtime.tv_nsec;
tmp.st_ctime = stat->ctime.tv_sec;
tmp.st_ctime_nsec = stat->ctime.tv_nsec;
tmp.st_ino = stat->ino;
return copy_to_user(statbuf,&tmp,sizeof(tmp)) ? -EFAULT : 0;
}
asmlinkage long sys_oabi_stat64(char __user * filename,
struct oldabi_stat64 __user * statbuf)
{
struct kstat stat;
int error = vfs_stat(filename, &stat);
if (!error)
error = cp_oldabi_stat64(&stat, statbuf);
return error;
}
asmlinkage long sys_oabi_lstat64(char __user * filename,
struct oldabi_stat64 __user * statbuf)
{
struct kstat stat;
int error = vfs_lstat(filename, &stat);
if (!error)
error = cp_oldabi_stat64(&stat, statbuf);
return error;
}
asmlinkage long sys_oabi_fstat64(unsigned long fd,
struct oldabi_stat64 __user * statbuf)
{
struct kstat stat;
int error = vfs_fstat(fd, &stat);
if (!error)
error = cp_oldabi_stat64(&stat, statbuf);
return error;
}
struct oabi_flock64 {
short l_type;
short l_whence;
loff_t l_start;
loff_t l_len;
pid_t l_pid;
} __attribute__ ((packed,aligned(4)));
asmlinkage long sys_oabi_fcntl64(unsigned int fd, unsigned int cmd,
unsigned long arg)
{
struct oabi_flock64 user;
struct flock64 kernel;
mm_segment_t fs = USER_DS; /* initialized to kill a warning */
unsigned long local_arg = arg;
int ret;
switch (cmd) {
case F_GETLK64:
case F_SETLK64:
case F_SETLKW64:
if (copy_from_user(&user, (struct oabi_flock64 __user *)arg,
sizeof(user)))
return -EFAULT;
kernel.l_type = user.l_type;
kernel.l_whence = user.l_whence;
kernel.l_start = user.l_start;
kernel.l_len = user.l_len;
kernel.l_pid = user.l_pid;
local_arg = (unsigned long)&kernel;
fs = get_fs();
set_fs(KERNEL_DS);
}
ret = sys_fcntl64(fd, cmd, local_arg);
switch (cmd) {
case F_GETLK64:
if (!ret) {
user.l_type = kernel.l_type;
user.l_whence = kernel.l_whence;
user.l_start = kernel.l_start;
user.l_len = kernel.l_len;
user.l_pid = kernel.l_pid;
if (copy_to_user((struct oabi_flock64 __user *)arg,
&user, sizeof(user)))
ret = -EFAULT;
}
case F_SETLK64:
case F_SETLKW64:
set_fs(fs);
}
return ret;
}
struct oabi_epoll_event {
__u32 events;
__u64 data;
} __attribute__ ((packed,aligned(4)));
asmlinkage long sys_oabi_epoll_ctl(int epfd, int op, int fd,
struct oabi_epoll_event __user *event)
{
struct oabi_epoll_event user;
struct epoll_event kernel;
mm_segment_t fs;
long ret;
if (op == EPOLL_CTL_DEL)
return sys_epoll_ctl(epfd, op, fd, NULL);
if (copy_from_user(&user, event, sizeof(user)))
return -EFAULT;
kernel.events = user.events;
kernel.data = user.data;
fs = get_fs();
set_fs(KERNEL_DS);
ret = sys_epoll_ctl(epfd, op, fd, &kernel);
set_fs(fs);
return ret;
}
asmlinkage long sys_oabi_epoll_wait(int epfd,
struct oabi_epoll_event __user *events,
int maxevents, int timeout)
{
struct epoll_event *kbuf;
mm_segment_t fs;
long ret, err, i;
if (maxevents <= 0 || maxevents > (INT_MAX/sizeof(struct epoll_event)))
return -EINVAL;
kbuf = kmalloc(sizeof(*kbuf) * maxevents, GFP_KERNEL);
if (!kbuf)
return -ENOMEM;
fs = get_fs();
set_fs(KERNEL_DS);
ret = sys_epoll_wait(epfd, kbuf, maxevents, timeout);
set_fs(fs);
err = 0;
for (i = 0; i < ret; i++) {
__put_user_error(kbuf[i].events, &events->events, err);
__put_user_error(kbuf[i].data, &events->data, err);
events++;
}
kfree(kbuf);
return err ? -EFAULT : ret;
}
struct oabi_sembuf {
unsigned short sem_num;
short sem_op;
short sem_flg;
unsigned short __pad;
};
asmlinkage long sys_oabi_semtimedop(int semid,
struct oabi_sembuf __user *tsops,
unsigned nsops,
const struct timespec __user *timeout)
{
struct sembuf *sops;
struct timespec local_timeout;
long err;
int i;
if (nsops < 1)
return -EINVAL;
sops = kmalloc(sizeof(*sops) * nsops, GFP_KERNEL);
if (!sops)
return -ENOMEM;
err = 0;
for (i = 0; i < nsops; i++) {
__get_user_error(sops[i].sem_num, &tsops->sem_num, err);
__get_user_error(sops[i].sem_op, &tsops->sem_op, err);
__get_user_error(sops[i].sem_flg, &tsops->sem_flg, err);
tsops++;
}
if (timeout) {
/* copy this as well before changing domain protection */
err |= copy_from_user(&local_timeout, timeout, sizeof(*timeout));
timeout = &local_timeout;
}
if (err) {
err = -EFAULT;
} else {
mm_segment_t fs = get_fs();
set_fs(KERNEL_DS);
err = sys_semtimedop(semid, sops, nsops, timeout);
set_fs(fs);
}
kfree(sops);
return err;
}
asmlinkage long sys_oabi_semop(int semid, struct oabi_sembuf __user *tsops,
unsigned nsops)
{
return sys_oabi_semtimedop(semid, tsops, nsops, NULL);
}
extern asmlinkage int sys_ipc(uint call, int first, int second, int third,
void __user *ptr, long fifth);
asmlinkage int sys_oabi_ipc(uint call, int first, int second, int third,
void __user *ptr, long fifth)
{
switch (call & 0xffff) {
case SEMOP:
return sys_oabi_semtimedop(first,
(struct oabi_sembuf __user *)ptr,
second, NULL);
case SEMTIMEDOP:
return sys_oabi_semtimedop(first,
(struct oabi_sembuf __user *)ptr,
second,
(const struct timespec __user *)fifth);
default:
return sys_ipc(call, first, second, third, ptr, fifth);
}
}
arch/arm/kernel/traps.c
View file @ 8d5c3150
......@@ -404,7 +404,7 @@ asmlinkage int arm_syscall(int no, struct pt_regs *regs)
struct thread_info *thread = current_thread_info();
siginfo_t info;
if ((no >> 16) != 0x9f)
if ((no >> 16) != (__ARM_NR_BASE>> 16))
return bad_syscall(no, regs);
switch (no & 0xffff) {
......
arch/arm/lib/ashldi3.S
View file @ 8d5c3150
......@@ -37,6 +37,7 @@ Boston, MA 02110-1301, USA. */
#endif
ENTRY(__ashldi3)
ENTRY(__aeabi_llsl)
subs r3, r2, #32
rsb ip, r2, #32
......
arch/arm/lib/ashrdi3.S
View file @ 8d5c3150
......@@ -37,6 +37,7 @@ Boston, MA 02110-1301, USA. */
#endif
ENTRY(__ashrdi3)
ENTRY(__aeabi_lasr)
subs r3, r2, #32
rsb ip, r2, #32
......
arch/arm/lib/lib1funcs.S
View file @ 8d5c3150
......@@ -206,6 +206,7 @@ Boston, MA 02111-1307, USA. */
ENTRY(__udivsi3)
ENTRY(__aeabi_uidiv)
subs r2, r1, #1
moveq pc, lr
......@@ -246,6 +247,7 @@ ENTRY(__umodsi3)
ENTRY(__divsi3)
ENTRY(__aeabi_idiv)
cmp r1, #0
eor ip, r0, r1 @ save the sign of the result.
......@@ -303,12 +305,33 @@ ENTRY(__modsi3)
rsbmi r0, r0, #0
mov pc, lr
#ifdef CONFIG_AEABI
ENTRY(__aeabi_uidivmod)
stmfd sp!, {r0, r1, ip, lr}
bl __aeabi_uidiv
ldmfd sp!, {r1, r2, ip, lr}
mul r3, r0, r2
sub r1, r1, r3
mov pc, lr
ENTRY(__aeabi_idivmod)
stmfd sp!, {r0, r1, ip, lr}
bl __aeabi_idiv
ldmfd sp!, {r1, r2, ip, lr}
mul r3, r0, r2
sub r1, r1, r3
mov pc, lr
#endif
Ldiv0:
str lr, [sp, #-4]!
str lr, [sp, #-8]!
bl __div0
mov r0, #0 @ About as wrong as it could be.
ldr pc, [sp], #4
ldr pc, [sp], #8
arch/arm/lib/lshrdi3.S
View file @ 8d5c3150
......@@ -37,6 +37,7 @@ Boston, MA 02110-1301, USA. */
#endif
ENTRY(__lshrdi3)
ENTRY(__aeabi_llsr)
subs r3, r2, #32
rsb ip, r2, #32
......
arch/arm/lib/muldi3.S
View file @ 8d5c3150
......@@ -25,6 +25,7 @@
#endif
ENTRY(__muldi3)
ENTRY(__aeabi_lmul)
mul xh, yl, xh
mla xh, xl, yh, xh
......
arch/arm/lib/ucmpdi2.S
View file @ 8d5c3150
......@@ -10,6 +10,7 @@
* published by the Free Software Foundation.
*/
#include <linux/config.h>
#include <linux/linkage.h>
#ifdef __ARMEB__
......@@ -33,3 +34,16 @@ ENTRY(__ucmpdi2)
movhi r0, #2
mov pc, lr
#ifdef CONFIG_AEABI
ENTRY(__aeabi_ulcmp)
cmp xh, yh
cmpeq xl, yl
movlo r0, #-1
moveq r0, #0
movhi r0, #1
mov pc, lr
#endif
arch/arm/mach-aaec2000/aaed2000.c
View file @ 8d5c3150
......@@ -90,7 +90,6 @@ static void __init aaed2000_map_io(void)
MACHINE_START(AAED2000, "Agilent AAED-2000 Development Platform")
/* Maintainer: Nicolas Bellido Y Ortega */
.phys_ram = 0xf0000000,
.phys_io = PIO_BASE,
.io_pg_offst = ((VIO_BASE) >> 18) & 0xfffc,
.map_io = aaed2000_map_io,
......
arch/arm/mach-at91rm9200/board-csb337.c
View file @ 8d5c3150
......@@ -132,7 +132,6 @@ static void __init csb337_board_init(void)
MACHINE_START(CSB337, "Cogent CSB337")
/* Maintainer: Bill Gatliff */
.phys_ram = AT91_SDRAM_BASE,
.phys_io = AT91_BASE_SYS,
.io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
.boot_params = AT91_SDRAM_BASE + 0x100,
......
arch/arm/mach-at91rm9200/board-csb637.c
View file @ 8d5c3150
......@@ -105,7 +105,6 @@ static void __init csb637_board_init(void)
MACHINE_START(CSB637, "Cogent CSB637")
/* Maintainer: Bill Gatliff */
.phys_ram = AT91_SDRAM_BASE,
.phys_io = AT91_BASE_SYS,
.io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
.boot_params = AT91_SDRAM_BASE + 0x100,
......
arch/arm/mach-at91rm9200/board-dk.c
View file @ 8d5c3150
......@@ -127,7 +127,6 @@ static void __init dk_board_init(void)
MACHINE_START(AT91RM9200DK, "Atmel AT91RM9200-DK")
/* Maintainer: SAN People/Atmel */
.phys_ram = AT91_SDRAM_BASE,
.phys_io = AT91_BASE_SYS,
.io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
.boot_params = AT91_SDRAM_BASE + 0x100,
......
arch/arm/mach-at91rm9200/board-ek.c
View file @ 8d5c3150
......@@ -120,7 +120,6 @@ static void __init ek_board_init(void)
MACHINE_START(AT91RM9200EK, "Atmel AT91RM9200-EK")
/* Maintainer: SAN People/Atmel */
.phys_ram = AT91_SDRAM_BASE,
.phys_io = AT91_BASE_SYS,
.io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
.boot_params = AT91_SDRAM_BASE + 0x100,
......
arch/arm/mach-clps711x/autcpu12.c
View file @ 8d5c3150
......@@ -64,7 +64,6 @@ void __init autcpu12_map_io(void)
MACHINE_START(AUTCPU12, "autronix autcpu12")
/* Maintainer: Thomas Gleixner */
.phys_ram = 0xc0000000,
.phys_io = 0x80000000,
.io_pg_offst = ((0xff000000) >> 18) & 0xfffc,
.boot_params = 0xc0020000,
......
arch/arm/mach-clps711x/cdb89712.c
View file @ 8d5c3150
......@@ -55,7 +55,6 @@ static void __init cdb89712_map_io(void)
MACHINE_START(CDB89712, "Cirrus-CDB89712")
/* Maintainer: Ray Lehtiniemi */
.phys_ram = 0xc0000000,
.phys_io = 0x80000000,
.io_pg_offst = ((0xff000000) >> 18) & 0xfffc,
.boot_params = 0xc0000100,
......
arch/arm/mach-clps711x/ceiva.c
View file @ 8d5c3150
......@@ -56,7 +56,6 @@ static void __init ceiva_map_io(void)
MACHINE_START(CEIVA, "CEIVA/Polaroid Photo MAX Digital Picture Frame")
/* Maintainer: Rob Scott */
.phys_ram = 0xc0000000,
.phys_io = 0x80000000,
.io_pg_offst = ((0xff000000) >> 18) & 0xfffc,
.boot_params = 0xc0000100,
......
arch/arm/mach-clps711x/clep7312.c
View file @ 8d5c3150
......@@ -38,7 +38,6 @@ fixup_clep7312(struct machine_desc *desc, struct tag *tags,
MACHINE_START(CLEP7212, "Cirrus Logic 7212/7312")
/* Maintainer: Nobody */
.phys_ram = 0xc0000000,
.phys_io = 0x80000000,
.io_pg_offst = ((0xff000000) >> 18) & 0xfffc,
.boot_params = 0xc0000100,
......
arch/arm/mach-clps711x/edb7211-arch.c
View file @ 8d5c3150
......@@ -52,7 +52,6 @@ fixup_edb7211(struct machine_desc *desc, struct tag *tags,
MACHINE_START(EDB7211, "CL-EDB7211 (EP7211 eval board)")
/* Maintainer: Jon McClintock */
.phys_ram = 0xc0000000,
.phys_io = 0x80000000,
.io_pg_offst = ((0xff000000) >> 18) & 0xfffc,
.boot_params = 0xc0020100, /* 0xc0000000 - 0xc001ffff can be video RAM */
......
arch/arm/mach-clps711x/fortunet.c
View file @ 8d5c3150
......@@ -78,7 +78,6 @@ fortunet_fixup(struct machine_desc *desc, struct tag *tags,
MACHINE_START(FORTUNET, "ARM-FortuNet")
/* Maintainer: FortuNet Inc. */
.phys_ram = 0xc0000000,
.phys_io = 0x80000000,
.io_pg_offst = ((0xf0000000) >> 18) & 0xfffc,
.boot_params = 0x00000000,
......
arch/arm/mach-clps711x/p720t.c
View file @ 8d5c3150
......@@ -90,7 +90,6 @@ static void __init p720t_map_io(void)
MACHINE_START(P720T, "ARM-Prospector720T")
/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
.phys_ram = 0xc0000000,
.phys_io = 0x80000000,
.io_pg_offst = ((0xff000000) >> 18) & 0xfffc,
.boot_params = 0xc0000100,
......
arch/arm/mach-clps7500/core.c
View file @ 8d5c3150
......@@ -384,7 +384,6 @@ static void __init clps7500_init(void)
MACHINE_START(CLPS7500, "CL-PS7500")
/* Maintainer: Philip Blundell */
.phys_ram = 0x10000000,
.phys_io = 0x03000000,
.io_pg_offst = ((0xe0000000) >> 18) & 0xfffc,
.map_io = clps7500_map_io,
......
arch/arm/mach-ebsa110/core.c
View file @ 8d5c3150
......@@ -284,7 +284,6 @@ arch_initcall(ebsa110_init);
MACHINE_START(EBSA110, "EBSA110")
/* Maintainer: Russell King */
.phys_ram = 0x00000000,
.phys_io = 0xe0000000,
.io_pg_offst = ((0xe0000000) >> 18) & 0xfffc,
.boot_params = 0x00000400,
......
arch/arm/mach-footbridge/cats-hw.c
View file @ 8d5c3150
......@@ -85,7 +85,6 @@ fixup_cats(struct machine_desc *desc, struct tag *tags,
MACHINE_START(CATS, "Chalice-CATS")
/* Maintainer: Philip Blundell */
.phys_ram = 0x00000000,
.phys_io = DC21285_ARMCSR_BASE,
.io_pg_offst = ((0xfe000000) >> 18) & 0xfffc,
.boot_params = 0x00000100,
......
arch/arm/mach-footbridge/co285.c
View file @ 8d5c3150
......@@ -29,7 +29,6 @@ fixup_coebsa285(struct machine_desc *desc, struct tag *tags,
MACHINE_START(CO285, "co-EBSA285")
/* Maintainer: Mark van Doesburg */
.phys_ram = 0x00000000,
.phys_io = DC21285_ARMCSR_BASE,
.io_pg_offst = ((0x7cf00000) >> 18) & 0xfffc,
.fixup = fixup_coebsa285,
......
arch/arm/mach-footbridge/ebsa285.c
View file @ 8d5c3150
......@@ -14,7 +14,6 @@
MACHINE_START(EBSA285, "EBSA285")
/* Maintainer: Russell King */
.phys_ram = 0x00000000,
.phys_io = DC21285_ARMCSR_BASE,
.io_pg_offst = ((0xfe000000) >> 18) & 0xfffc,
.boot_params = 0x00000100,
......
arch/arm/mach-footbridge/netwinder-hw.c
View file @ 8d5c3150
......@@ -649,7 +649,6 @@ fixup_netwinder(struct machine_desc *desc, struct tag *tags,
MACHINE_START(NETWINDER, "Rebel-NetWinder")
/* Maintainer: Russell King/Rebel.com */
.phys_ram = 0x00000000,
.phys_io = DC21285_ARMCSR_BASE,
.io_pg_offst = ((0xfe000000) >> 18) & 0xfffc,
.boot_params = 0x00000100,
......
arch/arm/mach-footbridge/personal.c
View file @ 8d5c3150
......@@ -14,7 +14,6 @@
MACHINE_START(PERSONAL_SERVER, "Compaq-PersonalServer")
/* Maintainer: Jamey Hicks / George France */
.phys_ram = 0x00000000,
.phys_io = DC21285_ARMCSR_BASE,
.io_pg_offst = ((0xfe000000) >> 18) & 0xfffc,
.boot_params = 0x00000100,
......
arch/arm/mach-h720x/h7201-eval.c
View file @ 8d5c3150
......@@ -31,7 +31,6 @@
MACHINE_START(H7201, "Hynix GMS30C7201")
/* Maintainer: Robert Schwebel, Pengutronix */
.phys_ram = 0x40000000,
.phys_io = 0x80000000,
.io_pg_offst = ((0xf0000000) >> 18) & 0xfffc,
.boot_params = 0xc0001000,
......
arch/arm/mach-h720x/h7202-eval.c
View file @ 8d5c3150
......@@ -72,7 +72,6 @@ static void __init init_eval_h7202(void)
MACHINE_START(H7202, "Hynix HMS30C7202")
/* Maintainer: Robert Schwebel, Pengutronix */
.phys_ram = 0x40000000,
.phys_io = 0x80000000,
.io_pg_offst = ((0xf0000000) >> 18) & 0xfffc,
.boot_params = 0x40000100,
......
arch/arm/mach-imx/mx1ads.c
View file @ 8d5c3150
......@@ -69,7 +69,6 @@ mx1ads_map_io(void)
MACHINE_START(MX1ADS, "Motorola MX1ADS")
/* Maintainer: Sascha Hauer, Pengutronix */
.phys_ram = 0x08000000,
.phys_io = 0x00200000,
.io_pg_offst = ((0xe0200000) >> 18) & 0xfffc,
.boot_params = 0x08000100,
......
arch/arm/mach-integrator/integrator_ap.c
View file @ 8d5c3150
......@@ -347,7 +347,6 @@ static struct sys_timer ap_timer = {
MACHINE_START(INTEGRATOR, "ARM-Integrator")
/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
.phys_ram = 0x00000000,
.phys_io = 0x16000000,
.io_pg_offst = ((0xf1600000) >> 18) & 0xfffc,
.boot_params = 0x00000100,
......
arch/arm/mach-integrator/integrator_cp.c
View file @ 8d5c3150
......@@ -578,7 +578,6 @@ static struct sys_timer cp_timer = {
MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP")
/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
.phys_ram = 0x00000000,
.phys_io = 0x16000000,
.io_pg_offst = ((0xf1600000) >> 18) & 0xfffc,
.boot_params = 0x00000100,
......
arch/arm/mach-iop3xx/iop321-setup.c
View file @ 8d5c3150
......@@ -151,7 +151,6 @@ extern void iop321_init_time(void);
#if defined(CONFIG_ARCH_IQ80321)
MACHINE_START(IQ80321, "Intel IQ80321")
/* Maintainer: Intel Corporation */
.phys_ram = PHYS_OFFSET,
.phys_io = IQ80321_UART,
.io_pg_offst = ((IQ80321_UART) >> 18) & 0xfffc,
.map_io = iq80321_map_io,
......@@ -163,7 +162,6 @@ MACHINE_END
#elif defined(CONFIG_ARCH_IQ31244)
MACHINE_START(IQ31244, "Intel IQ31244")
/* Maintainer: Intel Corp. */
.phys_ram = PHYS_OFFSET,
.phys_io = IQ31244_UART,
.io_pg_offst = ((IQ31244_UART) >> 18) & 0xfffc,
.map_io = iq31244_map_io,
......
arch/arm/mach-iop3xx/iop331-setup.c
View file @ 8d5c3150
......@@ -195,7 +195,6 @@ extern void iq80332_map_io(void);
#if defined(CONFIG_ARCH_IQ80331)
MACHINE_START(IQ80331, "Intel IQ80331")
/* Maintainer: Intel Corp. */
.phys_ram = PHYS_OFFSET,
.phys_io = 0xfefff000,
.io_pg_offst = ((0xfffff000) >> 18) & 0xfffc, // virtual, physical
.map_io = iq80331_map_io,
......@@ -208,7 +207,6 @@ MACHINE_END
#elif defined(CONFIG_MACH_IQ80332)
MACHINE_START(IQ80332, "Intel IQ80332")
/* Maintainer: Intel Corp. */
.phys_ram = PHYS_OFFSET,
.phys_io = 0xfefff000,
.io_pg_offst = ((0xfffff000) >> 18) & 0xfffc, // virtual, physical
.map_io = iq80332_map_io,
......
arch/arm/mach-ixp2000/core.c
View file @ 8d5c3150
......@@ -105,6 +105,16 @@ static struct map_desc ixp2000_io_desc[] __initdata = {
.pfn = __phys_to_pfn(IXP2000_MSF_PHYS_BASE),
.length = IXP2000_MSF_SIZE,
.type = MT_IXP2000_DEVICE,
}, {
.virtual = IXP2000_SCRATCH_RING_VIRT_BASE,
.pfn = __phys_to_pfn(IXP2000_SCRATCH_RING_PHYS_BASE),
.length = IXP2000_SCRATCH_RING_SIZE,
.type = MT_IXP2000_DEVICE,
}, {
.virtual = IXP2000_SRAM0_VIRT_BASE,
.pfn = __phys_to_pfn(IXP2000_SRAM0_PHYS_BASE),
.length = IXP2000_SRAM0_SIZE,
.type = MT_IXP2000_DEVICE,
}, {
.virtual = IXP2000_PCI_IO_VIRT_BASE,
.pfn = __phys_to_pfn(IXP2000_PCI_IO_PHYS_BASE),
......
arch/arm/mach-ixp2000/enp2611.c
View file @ 8d5c3150
......@@ -254,7 +254,6 @@ static void __init enp2611_init_machine(void)
MACHINE_START(ENP2611, "Radisys ENP-2611 PCI network processor board")
/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
.phys_ram = 0x00000000,
.phys_io = IXP2000_UART_PHYS_BASE,
.io_pg_offst = ((IXP2000_UART_VIRT_BASE) >> 18) & 0xfffc,
.boot_params = 0x00000100,
......
arch/arm/mach-ixp2000/ixdp2400.c
View file @ 8d5c3150
......@@ -169,7 +169,6 @@ void ixdp2400_init_irq(void)
MACHINE_START(IXDP2400, "Intel IXDP2400 Development Platform")
/* Maintainer: MontaVista Software, Inc. */
.phys_ram = 0x00000000,
.phys_io = IXP2000_UART_PHYS_BASE,
.io_pg_offst = ((IXP2000_UART_VIRT_BASE) >> 18) & 0xfffc,
.boot_params = 0x00000100,
......
arch/arm/mach-ixp2000/ixdp2800.c
View file @ 8d5c3150
......@@ -285,7 +285,6 @@ void ixdp2800_init_irq(void)
MACHINE_START(IXDP2800, "Intel IXDP2800 Development Platform")
/* Maintainer: MontaVista Software, Inc. */
.phys_ram = 0x00000000,
.phys_io = IXP2000_UART_PHYS_BASE,
.io_pg_offst = ((IXP2000_UART_VIRT_BASE) >> 18) & 0xfffc,
.boot_params = 0x00000100,
......
arch/arm/mach-ixp2000/ixdp2x01.c
View file @ 8d5c3150
......@@ -376,7 +376,6 @@ static void __init ixdp2x01_init_machine(void)
#ifdef CONFIG_ARCH_IXDP2401
MACHINE_START(IXDP2401, "Intel IXDP2401 Development Platform")
/* Maintainer: MontaVista Software, Inc. */
.phys_ram = 0x00000000,
.phys_io = IXP2000_UART_PHYS_BASE,
.io_pg_offst = ((IXP2000_UART_VIRT_BASE) >> 18) & 0xfffc,
.boot_params = 0x00000100,
......@@ -390,7 +389,6 @@ MACHINE_END
#ifdef CONFIG_ARCH_IXDP2801
MACHINE_START(IXDP2801, "Intel IXDP2801 Development Platform")
/* Maintainer: MontaVista Software, Inc. */
.phys_ram = 0x00000000,
.phys_io = IXP2000_UART_PHYS_BASE,
.io_pg_offst = ((IXP2000_UART_VIRT_BASE) >> 18) & 0xfffc,
.boot_params = 0x00000100,
......
arch/arm/mach-ixp4xx/coyote-setup.c
View file @ 8d5c3150
......@@ -101,7 +101,6 @@ static void __init coyote_init(void)
#ifdef CONFIG_ARCH_ADI_COYOTE
MACHINE_START(ADI_COYOTE, "ADI Engineering Coyote")
/* Maintainer: MontaVista Software, Inc. */
.phys_ram = PHYS_OFFSET,
.phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
.io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
.map_io = ixp4xx_map_io,
......@@ -119,7 +118,6 @@ MACHINE_END
#ifdef CONFIG_MACH_IXDPG425
MACHINE_START(IXDPG425, "Intel IXDPG425")
/* Maintainer: MontaVista Software, Inc. */
.phys_ram = PHYS_OFFSET,
.phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
.io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
.map_io = ixp4xx_map_io,
......
arch/arm/mach-ixp4xx/gtwx5715-setup.c
View file @ 8d5c3150
......@@ -142,7 +142,6 @@ static void __init gtwx5715_init(void)
MACHINE_START(GTWX5715, "Gemtek GTWX5715 (Linksys WRV54G)")
/* Maintainer: George Joseph */
.phys_ram = PHYS_OFFSET,
.phys_io = IXP4XX_UART2_BASE_PHYS,
.io_pg_offst = ((IXP4XX_UART2_BASE_VIRT) >> 18) & 0xfffc,
.map_io = ixp4xx_map_io,
......
arch/arm/mach-ixp4xx/ixdp425-setup.c
View file @ 8d5c3150
......@@ -121,7 +121,6 @@ static void __init ixdp425_init(void)
#ifdef CONFIG_ARCH_IXDP425
MACHINE_START(IXDP425, "Intel IXDP425 Development Platform")
/* Maintainer: MontaVista Software, Inc. */
.phys_ram = PHYS_OFFSET,
.phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
.io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
.map_io = ixp4xx_map_io,
......@@ -135,7 +134,6 @@ MACHINE_END
#ifdef CONFIG_MACH_IXDP465
MACHINE_START(IXDP465, "Intel IXDP465 Development Platform")
/* Maintainer: MontaVista Software, Inc. */
.phys_ram = PHYS_OFFSET,
.phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
.io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
.map_io = ixp4xx_map_io,
......@@ -149,7 +147,6 @@ MACHINE_END
#ifdef CONFIG_ARCH_PRPMC1100
MACHINE_START(IXCDP1100, "Intel IXCDP1100 Development Platform")
/* Maintainer: MontaVista Software, Inc. */
.phys_ram = PHYS_OFFSET,
.phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
.io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
.map_io = ixp4xx_map_io,
......@@ -169,7 +166,6 @@ MACHINE_END
#ifdef CONFIG_ARCH_AVILA
MACHINE_START(AVILA, "Gateworks Avila Network Platform")
/* Maintainer: Deepak Saxena <dsaxena@plexity.net> */
.phys_ram = PHYS_OFFSET,
.phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
.io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
.map_io = ixp4xx_map_io,
......
arch/arm/mach-ixp4xx/nas100d-setup.c
View file @ 8d5c3150
......@@ -124,7 +124,6 @@ static void __init nas100d_init(void)
MACHINE_START(NAS100D, "Iomega NAS 100d")
/* Maintainer: www.nslu2-linux.org */
.phys_ram = PHYS_OFFSET,
.phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
.io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xFFFC,
.boot_params = 0x00000100,
......
arch/arm/mach-ixp4xx/nslu2-setup.c
View file @ 8d5c3150
......@@ -123,7 +123,6 @@ static void __init nslu2_init(void)
MACHINE_START(NSLU2, "Linksys NSLU2")
/* Maintainer: www.nslu2-linux.org */
.phys_ram = PHYS_OFFSET,
.phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
.io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xFFFC,
.boot_params = 0x00000100,
......
arch/arm/mach-l7200/core.c
View file @ 8d5c3150
......@@ -91,7 +91,6 @@ static void __init l7200_map_io(void)
MACHINE_START(L7200, "LinkUp Systems L7200")
/* Maintainer: Steve Hill / Scott McConnell */
.phys_ram = 0xf0000000,
.phys_io = 0x80040000,
.io_pg_offst = ((0xd0000000) >> 18) & 0xfffc,
.map_io = l7200_map_io,
......
arch/arm/mach-lh7a40x/arch-kev7a400.c
View file @ 8d5c3150
......@@ -112,7 +112,6 @@ void __init lh7a40x_init_board_irq (void)
MACHINE_START (KEV7A400, "Sharp KEV7a400")
/* Maintainer: Marc Singer */
.phys_ram = 0xc0000000,
.phys_io = 0x80000000,
.io_pg_offst = ((io_p2v (0x80000000))>>18) & 0xfffc,
.boot_params = 0xc0000100,
......
arch/arm/mach-lh7a40x/arch-lpd7a40x.c
View file @ 8d5c3150
......@@ -317,7 +317,6 @@ lpd7a400_map_io(void)
MACHINE_START (LPD7A400, "Logic Product Development LPD7A400-10")
/* Maintainer: Marc Singer */
.phys_ram = 0xc0000000,
.phys_io = 0x80000000,
.io_pg_offst = ((io_p2v (0x80000000))>>18) & 0xfffc,
.boot_params = 0xc0000100,
......@@ -333,7 +332,6 @@ MACHINE_END
MACHINE_START (LPD7A404, "Logic Product Development LPD7A404-10")
/* Maintainer: Marc Singer */
.phys_ram = 0xc0000000,
.phys_io = 0x80000000,
.io_pg_offst = ((io_p2v (0x80000000))>>18) & 0xfffc,
.boot_params = 0xc0000100,
......
arch/arm/mach-omap1/board-generic.c
View file @ 8d5c3150
......@@ -109,7 +109,6 @@ static void __init omap_generic_map_io(void)
MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710")
/* Maintainer: Tony Lindgren <tony@atomide.com> */
.phys_ram = 0x10000000,
.phys_io = 0xfff00000,
.io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
.boot_params = 0x10000100,
......
arch/arm/mach-omap1/board-h2.c
View file @ 8d5c3150
......@@ -199,7 +199,6 @@ static void __init h2_map_io(void)
MACHINE_START(OMAP_H2, "TI-H2")
/* Maintainer: Imre Deak <imre.deak@nokia.com> */
.phys_ram = 0x10000000,
.phys_io = 0xfff00000,
.io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
.boot_params = 0x10000100,
......
arch/arm/mach-omap1/board-h3.c
View file @ 8d5c3150
......@@ -215,7 +215,6 @@ static void __init h3_map_io(void)
MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
/* Maintainer: Texas Instruments, Inc. */
.phys_ram = 0x10000000,
.phys_io = 0xfff00000,
.io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
.boot_params = 0x10000100,
......
arch/arm/mach-omap1/board-innovator.c
View file @ 8d5c3150
......@@ -303,7 +303,6 @@ static void __init innovator_map_io(void)
MACHINE_START(OMAP_INNOVATOR, "TI-Innovator")
/* Maintainer: MontaVista Software, Inc. */
.phys_ram = 0x10000000,
.phys_io = 0xfff00000,
.io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
.boot_params = 0x10000100,
......
arch/arm/mach-omap1/board-netstar.c
View file @ 8d5c3150
......@@ -149,7 +149,6 @@ postcore_initcall(netstar_late_init);
MACHINE_START(NETSTAR, "NetStar OMAP5910")
/* Maintainer: Ladislav Michl <michl@2n.cz> */
.phys_ram = 0x10000000,
.phys_io = 0xfff00000,
.io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
.boot_params = 0x10000100,
......
arch/arm/mach-omap1/board-osk.c
View file @ 8d5c3150
......@@ -274,7 +274,6 @@ static void __init osk_map_io(void)
MACHINE_START(OMAP_OSK, "TI-OSK")
/* Maintainer: Dirk Behme <dirk.behme@de.bosch.com> */
.phys_ram = 0x10000000,
.phys_io = 0xfff00000,
.io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
.boot_params = 0x10000100,
......
arch/arm/mach-omap1/board-palmte.c
View file @ 8d5c3150
......@@ -76,7 +76,6 @@ static void __init omap_generic_map_io(void)
}
MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E")
.phys_ram = 0x10000000,
.phys_io = 0xfff00000,
.io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
.boot_params = 0x10000100,
......
arch/arm/mach-omap1/board-perseus2.c
View file @ 8d5c3150
......@@ -199,7 +199,6 @@ static void __init omap_perseus2_map_io(void)
MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
/* Maintainer: Kevin Hilman <kjh@hilman.org> */
.phys_ram = 0x10000000,
.phys_io = 0xfff00000,
.io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
.boot_params = 0x10000100,
......
arch/arm/mach-omap1/board-voiceblue.c
View file @ 8d5c3150
......@@ -281,7 +281,6 @@ EXPORT_SYMBOL(voiceblue_wdt_ping);
MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910")
/* Maintainer: Ladislav Michl <michl@2n.cz> */
.phys_ram = 0x10000000,
.phys_io = 0xfff00000,
.io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
.boot_params = 0x10000100,
......
arch/arm/mach-omap2/board-generic.c
View file @ 8d5c3150
......@@ -69,7 +69,6 @@ static void __init omap_generic_map_io(void)
MACHINE_START(OMAP_GENERIC, "Generic OMAP24xx")
/* Maintainer: Paul Mundt <paul.mundt@nokia.com> */
.phys_ram = 0x80000000,
.phys_io = 0x48000000,
.io_pg_offst = ((0xd8000000) >> 18) & 0xfffc,
.boot_params = 0x80000100,
......
arch/arm/mach-omap2/board-h4.c
View file @ 8d5c3150
......@@ -186,7 +186,6 @@ static void __init omap_h4_map_io(void)
MACHINE_START(OMAP_H4, "OMAP2420 H4 board")
/* Maintainer: Paul Mundt <paul.mundt@nokia.com> */
.phys_ram = 0x80000000,
.phys_io = 0x48000000,
.io_pg_offst = ((0xd8000000) >> 18) & 0xfffc,
.boot_params = 0x80000100,
......
arch/arm/mach-pxa/corgi.c
View file @ 8d5c3150
......@@ -342,7 +342,6 @@ static void __init fixup_corgi(struct machine_desc *desc,
#ifdef CONFIG_MACH_CORGI
MACHINE_START(CORGI, "SHARP Corgi")
.phys_ram = 0xa0000000,
.phys_io = 0x40000000,
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
.fixup = fixup_corgi,
......@@ -355,7 +354,6 @@ MACHINE_END
#ifdef CONFIG_MACH_SHEPHERD
MACHINE_START(SHEPHERD, "SHARP Shepherd")
.phys_ram = 0xa0000000,
.phys_io = 0x40000000,
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
.fixup = fixup_corgi,
......@@ -368,7 +366,6 @@ MACHINE_END
#ifdef CONFIG_MACH_HUSKY
MACHINE_START(HUSKY, "SHARP Husky")
.phys_ram = 0xa0000000,
.phys_io = 0x40000000,
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
.fixup = fixup_corgi,
......
arch/arm/mach-pxa/idp.c
View file @ 8d5c3150
......@@ -183,7 +183,6 @@ static void __init idp_map_io(void)
MACHINE_START(PXA_IDP, "Vibren PXA255 IDP")
/* Maintainer: Vibren Technologies */
.phys_ram = 0xa0000000,
.phys_io = 0x40000000,
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
.map_io = idp_map_io,
......
arch/arm/mach-pxa/lubbock.c
View file @ 8d5c3150
......@@ -437,7 +437,6 @@ static void __init lubbock_map_io(void)
MACHINE_START(LUBBOCK, "Intel DBPXA250 Development Platform (aka Lubbock)")
/* Maintainer: MontaVista Software Inc. */
.phys_ram = 0xa0000000,
.phys_io = 0x40000000,
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
.map_io = lubbock_map_io,
......
arch/arm/mach-pxa/mainstone.c
View file @ 8d5c3150
......@@ -489,7 +489,6 @@ static void __init mainstone_map_io(void)
MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
/* Maintainer: MontaVista Software Inc. */
.phys_ram = 0xa0000000,
.phys_io = 0x40000000,
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
.map_io = mainstone_map_io,
......
arch/arm/mach-pxa/poodle.c
View file @ 8d5c3150
......@@ -311,7 +311,6 @@ static void __init fixup_poodle(struct machine_desc *desc,
}
MACHINE_START(POODLE, "SHARP Poodle")
.phys_ram = 0xa0000000,
.phys_io = 0x40000000,
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
.fixup = fixup_poodle,
......
arch/arm/mach-pxa/spitz.c
View file @ 8d5c3150
......@@ -497,7 +497,6 @@ static void __init fixup_spitz(struct machine_desc *desc,
#ifdef CONFIG_MACH_SPITZ
MACHINE_START(SPITZ, "SHARP Spitz")
.phys_ram = 0xa0000000,
.phys_io = 0x40000000,
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
.fixup = fixup_spitz,
......@@ -510,7 +509,6 @@ MACHINE_END
#ifdef CONFIG_MACH_BORZOI
MACHINE_START(BORZOI, "SHARP Borzoi")
.phys_ram = 0xa0000000,
.phys_io = 0x40000000,
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
.fixup = fixup_spitz,
......@@ -523,7 +521,6 @@ MACHINE_END
#ifdef CONFIG_MACH_AKITA
MACHINE_START(AKITA, "SHARP Akita")
.phys_ram = 0xa0000000,
.phys_io = 0x40000000,
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
.fixup = fixup_spitz,
......
arch/arm/mach-pxa/tosa.c
View file @ 8d5c3150
......@@ -295,7 +295,6 @@ static void __init fixup_tosa(struct machine_desc *desc,
}
MACHINE_START(TOSA, "SHARP Tosa")
.phys_ram = 0xa0000000,
.phys_io = 0x40000000,
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
.fixup = fixup_tosa,
......
arch/arm/mach-realview/Kconfig
View file @ 8d5c3150
......@@ -3,7 +3,6 @@ menu "RealView platform type"
config MACH_REALVIEW_EB
bool "Support RealView/EB platform"
default n
select ARM_GIC
help
Include support for the ARM(R) RealView Emulation Baseboard platform.
......
arch/arm/mach-realview/realview_eb.c
View file @ 8d5c3150
......@@ -166,7 +166,6 @@ static void __init realview_eb_init(void)
MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
.phys_ram = 0x00000000,
.phys_io = REALVIEW_UART0_BASE,
.io_pg_offst = (IO_ADDRESS(REALVIEW_UART0_BASE) >> 18) & 0xfffc,
.boot_params = 0x00000100,
......
arch/arm/mach-rpc/riscpc.c
View file @ 8d5c3150
......@@ -177,7 +177,6 @@ extern struct sys_timer ioc_timer;
MACHINE_START(RISCPC, "Acorn-RiscPC")
/* Maintainer: Russell King */
.phys_ram = 0x10000000,
.phys_io = 0x03000000,
.io_pg_offst = ((0xe0000000) >> 18) & 0xfffc,
.boot_params = 0x10000100,
......
arch/arm/mach-s3c2410/mach-anubis.c
View file @ 8d5c3150
......@@ -294,7 +294,6 @@ static void __init anubis_map_io(void)
MACHINE_START(ANUBIS, "Simtec-Anubis")
/* Maintainer: Ben Dooks <ben@simtec.co.uk> */
.phys_ram = S3C2410_SDRAM_PA,
.phys_io = S3C2410_PA_UART,
.io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
.boot_params = S3C2410_SDRAM_PA + 0x100,
......
arch/arm/mach-s3c2410/mach-bast.c
View file @ 8d5c3150
......@@ -527,7 +527,6 @@ static void __init bast_init(void)
MACHINE_START(BAST, "Simtec-BAST")
/* Maintainer: Ben Dooks <ben@simtec.co.uk> */
.phys_ram = S3C2410_SDRAM_PA,
.phys_io = S3C2410_PA_UART,
.io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
.boot_params = S3C2410_SDRAM_PA + 0x100,
......
arch/arm/mach-s3c2410/mach-h1940.c
View file @ 8d5c3150
......@@ -171,7 +171,6 @@ static void __init h1940_init(void)
MACHINE_START(H1940, "IPAQ-H1940")
/* Maintainer: Ben Dooks <ben@fluff.org> */
.phys_ram = S3C2410_SDRAM_PA,
.phys_io = S3C2410_PA_UART,
.io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
.boot_params = S3C2410_SDRAM_PA + 0x100,
......
arch/arm/mach-s3c2410/mach-n30.c
View file @ 8d5c3150
......@@ -128,7 +128,6 @@ MACHINE_START(N30, "Acer-N30")
/* Maintainer: Christer Weinigel <christer@weinigel.se>,
Ben Dooks <ben-linux@fluff.org>
*/
.phys_ram = S3C2410_SDRAM_PA,
.phys_io = S3C2410_PA_UART,
.io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
.boot_params = S3C2410_SDRAM_PA + 0x100,
......
arch/arm/mach-s3c2410/mach-nexcoder.c
View file @ 8d5c3150
......@@ -148,7 +148,6 @@ static void __init nexcoder_map_io(void)
MACHINE_START(NEXCODER_2440, "NexVision - Nexcoder 2440")
/* Maintainer: Guillaume GOURAT <guillaume.gourat@nexvision.tv> */
.phys_ram = S3C2410_SDRAM_PA,
.phys_io = S3C2410_PA_UART,
.io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
.boot_params = S3C2410_SDRAM_PA + 0x100,
......
arch/arm/mach-s3c2410/mach-otom.c
View file @ 8d5c3150
......@@ -116,7 +116,6 @@ static void __init otom11_map_io(void)
MACHINE_START(OTOM, "Nex Vision - Otom 1.1")
/* Maintainer: Guillaume GOURAT <guillaume.gourat@nexvision.tv> */
.phys_ram = S3C2410_SDRAM_PA,
.phys_io = S3C2410_PA_UART,
.io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
.boot_params = S3C2410_SDRAM_PA + 0x100,
......
arch/arm/mach-s3c2410/mach-rx3715.c
View file @ 8d5c3150
......@@ -205,7 +205,6 @@ static void __init rx3715_init_machine(void)
MACHINE_START(RX3715, "IPAQ-RX3715")
/* Maintainer: Ben Dooks <ben@fluff.org> */
.phys_ram = S3C2410_SDRAM_PA,
.phys_io = S3C2410_PA_UART,
.io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
.boot_params = S3C2410_SDRAM_PA + 0x100,
......
arch/arm/mach-s3c2410/mach-smdk2410.c
View file @ 8d5c3150
......@@ -115,7 +115,6 @@ static void __init smdk2410_init_irq(void)
MACHINE_START(SMDK2410, "SMDK2410") /* @TODO: request a new identifier and switch
* to SMDK2410 */
/* Maintainer: Jonas Dietsche */
.phys_ram = S3C2410_SDRAM_PA,
.phys_io = S3C2410_PA_UART,
.io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
.boot_params = S3C2410_SDRAM_PA + 0x100,
......
arch/arm/mach-s3c2410/mach-smdk2440.c
View file @ 8d5c3150
......@@ -216,7 +216,6 @@ static void __init smdk2440_machine_init(void)
MACHINE_START(S3C2440, "SMDK2440")
/* Maintainer: Ben Dooks <ben@fluff.org> */
.phys_ram = S3C2410_SDRAM_PA,
.phys_io = S3C2410_PA_UART,
.io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
.boot_params = S3C2410_SDRAM_PA + 0x100,
......
arch/arm/mach-s3c2410/mach-vr1000.c
View file @ 8d5c3150
......@@ -395,7 +395,6 @@ static void __init vr1000_map_io(void)
MACHINE_START(VR1000, "Thorcom-VR1000")
/* Maintainer: Ben Dooks <ben@simtec.co.uk> */
.phys_ram = S3C2410_SDRAM_PA,
.phys_io = S3C2410_PA_UART,
.io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
.boot_params = S3C2410_SDRAM_PA + 0x100,
......
arch/arm/mach-sa1100/assabet.c
View file @ 8d5c3150
......@@ -447,7 +447,6 @@ static void __init assabet_map_io(void)
MACHINE_START(ASSABET, "Intel-Assabet")
.phys_ram = 0xc0000000,
.phys_io = 0x80000000,
.io_pg_offst = ((0xf8000000) >> 18) & 0xfffc,
.boot_params = 0xc0000100,
......
arch/arm/mach-sa1100/badge4.c
View file @ 8d5c3150
......@@ -297,7 +297,6 @@ static void __init badge4_map_io(void)
}
MACHINE_START(BADGE4, "Hewlett-Packard Laboratories BadgePAD 4")
.phys_ram = 0xc0000000,
.phys_io = 0x80000000,
.io_pg_offst = ((0xf8000000) >> 18) & 0xfffc,
.boot_params = 0xc0000100,
......
arch/arm/mach-sa1100/cerf.c
View file @ 8d5c3150
......@@ -135,7 +135,6 @@ static void __init cerf_init(void)
MACHINE_START(CERF, "Intrinsyc CerfBoard/CerfCube")
/* Maintainer: support@intrinsyc.com */
.phys_ram = 0xc0000000,
.phys_io = 0x80000000,
.io_pg_offst = ((0xf8000000) >> 18) & 0xfffc,
.map_io = cerf_map_io,
......
arch/arm/mach-sa1100/collie.c
View file @ 8d5c3150
......@@ -191,7 +191,6 @@ static void __init collie_map_io(void)
}
MACHINE_START(COLLIE, "Sharp-Collie")
.phys_ram = 0xc0000000,
.phys_io = 0x80000000,
.io_pg_offst = ((0xf8000000) >> 18) & 0xfffc,
.map_io = collie_map_io,
......
arch/arm/mach-sa1100/h3600.c
View file @ 8d5c3150
......@@ -392,7 +392,6 @@ static void __init h3100_map_io(void)
}
MACHINE_START(H3100, "Compaq iPAQ H3100")
.phys_ram = 0xc0000000,
.phys_io = 0x80000000,
.io_pg_offst = ((0xf8000000) >> 18) & 0xfffc,
.boot_params = 0xc0000100,
......@@ -510,7 +509,6 @@ static void __init h3600_map_io(void)
}
MACHINE_START(H3600, "Compaq iPAQ H3600")
.phys_ram = 0xc0000000,
.phys_io = 0x80000000,
.io_pg_offst = ((0xf8000000) >> 18) & 0xfffc,
.boot_params = 0xc0000100,
......@@ -897,7 +895,6 @@ static void __init h3800_map_io(void)
}
MACHINE_START(H3800, "Compaq iPAQ H3800")
.phys_ram = 0xc0000000,
.phys_io = 0x80000000,
.io_pg_offst = ((0xf8000000) >> 18) & 0xfffc,
.boot_params = 0xc0000100,
......
arch/arm/mach-sa1100/hackkit.c
View file @ 8d5c3150
......@@ -195,7 +195,6 @@ static void __init hackkit_init(void)
*/
MACHINE_START(HACKKIT, "HackKit Cpu Board")
.phys_ram = 0xc0000000,
.phys_io = 0x80000000,
.io_pg_offst = ((0xf8000000) >> 18) & 0xfffc,
.boot_params = 0xc0000100,
......
arch/arm/mach-sa1100/jornada720.c
View file @ 8d5c3150
......@@ -173,7 +173,6 @@ static void __init jornada720_mach_init(void)
MACHINE_START(JORNADA720, "HP Jornada 720")
/* Maintainer: Michael Gernoth <michael@gernoth.net> */
.phys_ram = 0xc0000000,
.phys_io = 0x80000000,
.io_pg_offst = ((0xf8000000) >> 18) & 0xfffc,
.boot_params = 0xc0000100,
......
arch/arm/mach-sa1100/lart.c
View file @ 8d5c3150
......@@ -60,7 +60,6 @@ static void __init lart_map_io(void)
}
MACHINE_START(LART, "LART")
.phys_ram = 0xc0000000,
.phys_io = 0x80000000,
.io_pg_offst = ((0xf8000000) >> 18) & 0xfffc,
.boot_params = 0xc0000100,
......
arch/arm/mach-sa1100/pleb.c
View file @ 8d5c3150
......@@ -146,7 +146,6 @@ static void __init pleb_map_io(void)
}
MACHINE_START(PLEB, "PLEB")
.phys_ram = 0xc0000000,
.phys_io = 0x80000000,
.io_pg_offst = ((0xf8000000) >> 18) & 0xfffc,
.map_io = pleb_map_io,
......
arch/arm/mach-sa1100/shannon.c
View file @ 8d5c3150
......@@ -83,7 +83,6 @@ static void __init shannon_map_io(void)
}
MACHINE_START(SHANNON, "Shannon (AKA: Tuxscreen)")
.phys_ram = 0xc0000000,
.phys_io = 0x80000000,
.io_pg_offst = ((0xf8000000) >> 18) & 0xfffc,
.boot_params = 0xc0000100,
......
arch/arm/mach-sa1100/simpad.c
View file @ 8d5c3150
......@@ -229,7 +229,6 @@ arch_initcall(simpad_init);
MACHINE_START(SIMPAD, "Simpad")
/* Maintainer: Holger Freyther */
.phys_ram = 0xc0000000,
.phys_io = 0x80000000,
.io_pg_offst = ((0xf8000000) >> 18) & 0xfffc,
.boot_params = 0xc0000100,
......
arch/arm/mach-shark/core.c
View file @ 8d5c3150
......@@ -111,7 +111,6 @@ static struct sys_timer shark_timer = {
MACHINE_START(SHARK, "Shark")
/* Maintainer: Alexander Schulz */
.phys_ram = 0x08000000,
.phys_io = 0x40000000,
.io_pg_offst = ((0xe0000000) >> 18) & 0xfffc,
.boot_params = 0x08003000,
......
arch/arm/mach-versatile/Kconfig
View file @ 8d5c3150
......@@ -9,7 +9,6 @@ config ARCH_VERSATILE_PB
config MACH_VERSATILE_AB
bool "Support Versatile/AB platform"
default n
help
Include support for the ARM(R) Versatile/AP platform.
......
arch/arm/mach-versatile/core.c
View file @ 8d5c3150
......@@ -35,6 +35,7 @@
#include <asm/leds.h>
#include <asm/hardware/arm_timer.h>
#include <asm/hardware/icst307.h>
#include <asm/hardware/vic.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
......@@ -56,24 +57,6 @@
#define VA_VIC_BASE __io_address(VERSATILE_VIC_BASE)
#define VA_SIC_BASE __io_address(VERSATILE_SIC_BASE)
static void vic_mask_irq(unsigned int irq)
{
irq -= IRQ_VIC_START;
writel(1 << irq, VA_VIC_BASE + VIC_IRQ_ENABLE_CLEAR);
}
static void vic_unmask_irq(unsigned int irq)
{
irq -= IRQ_VIC_START;
writel(1 << irq, VA_VIC_BASE + VIC_IRQ_ENABLE);
}
static struct irqchip vic_chip = {
.ack = vic_mask_irq,
.mask = vic_mask_irq,
.unmask = vic_unmask_irq,
};
static void sic_mask_irq(unsigned int irq)
{
irq -= IRQ_SIC_START;
......@@ -127,43 +110,12 @@ sic_handle_irq(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
void __init versatile_init_irq(void)
{
unsigned int i, value;
/* Disable all interrupts initially. */
unsigned int i;
writel(0, VA_VIC_BASE + VIC_INT_SELECT);
writel(0, VA_VIC_BASE + VIC_IRQ_ENABLE);
writel(~0, VA_VIC_BASE + VIC_IRQ_ENABLE_CLEAR);
writel(0, VA_VIC_BASE + VIC_IRQ_STATUS);
writel(0, VA_VIC_BASE + VIC_ITCR);
writel(~0, VA_VIC_BASE + VIC_IRQ_SOFT_CLEAR);
/*
* Make sure we clear all existing interrupts
*/
writel(0, VA_VIC_BASE + VIC_VECT_ADDR);
for (i = 0; i < 19; i++) {
value = readl(VA_VIC_BASE + VIC_VECT_ADDR);
writel(value, VA_VIC_BASE + VIC_VECT_ADDR);
}
for (i = 0; i < 16; i++) {
value = readl(VA_VIC_BASE + VIC_VECT_CNTL0 + (i * 4));
writel(value | VICVectCntl_Enable | i, VA_VIC_BASE + VIC_VECT_CNTL0 + (i * 4));
}
writel(32, VA_VIC_BASE + VIC_DEF_VECT_ADDR);
for (i = IRQ_VIC_START; i <= IRQ_VIC_END; i++) {
if (i != IRQ_VICSOURCE31) {
set_irq_chip(i, &vic_chip);
set_irq_handler(i, do_level_IRQ);
set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
}
}
vic_init(VA_VIC_BASE, ~(1 << 31));
set_irq_handler(IRQ_VICSOURCE31, sic_handle_irq);
vic_unmask_irq(IRQ_VICSOURCE31);
enable_irq(IRQ_VICSOURCE31);
/* Do second interrupt controller */
writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR);
......@@ -877,7 +829,7 @@ static unsigned long versatile_gettimeoffset(void)
ticks2 = readl(TIMER0_VA_BASE + TIMER_VALUE) & 0xffff;
do {
ticks1 = ticks2;
status = __raw_readl(VA_IC_BASE + VIC_IRQ_RAW_STATUS);
status = __raw_readl(VA_IC_BASE + VIC_RAW_STATUS);
ticks2 = readl(TIMER0_VA_BASE + TIMER_VALUE) & 0xffff;
} while (ticks2 > ticks1);
......
arch/arm/mach-versatile/versatile_ab.c
View file @ 8d5c3150
......@@ -36,7 +36,6 @@
MACHINE_START(VERSATILE_AB, "ARM-Versatile AB")
/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
.phys_ram = 0x00000000,
.phys_io = 0x101f1000,
.io_pg_offst = ((0xf11f1000) >> 18) & 0xfffc,
.boot_params = 0x00000100,
......
arch/arm/mach-versatile/versatile_pb.c
View file @ 8d5c3150
......@@ -100,7 +100,6 @@ arch_initcall(versatile_pb_init);
MACHINE_START(VERSATILE_PB, "ARM-Versatile PB")
/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
.phys_ram = 0x00000000,
.phys_io = 0x101f1000,
.io_pg_offst = ((0xf11f1000) >> 18) & 0xfffc,
.boot_params = 0x00000100,
......
arch/arm/nwfpe/fpa11.h
View file @ 8d5c3150
......@@ -62,7 +62,7 @@ typedef union tagFPREG {
#else
u32 padding[3];
#endif
} FPREG;
} __attribute__ ((packed,aligned(4))) FPREG;
/*
* FPA11 device model.
......@@ -89,7 +89,7 @@ typedef struct tagFPA11 {
so we can use it to detect whether this
instance of the emulator needs to be
initialised. */
} FPA11;
} __attribute__ ((packed,aligned(4))) FPA11;
extern int8 SetRoundingMode(const unsigned int);
extern int8 SetRoundingPrecision(const unsigned int);
......
arch/arm/plat-omap/Kconfig
View file @ 8d5c3150
......@@ -22,7 +22,6 @@ comment "OMAP Feature Selections"
config OMAP_RESET_CLOCKS
bool "Reset unused clocks during boot"
depends on ARCH_OMAP
default n
help
Say Y if you want to reset unused clocks during boot.
This option saves power, but assumes all drivers are
......@@ -44,7 +43,6 @@ config OMAP_MUX
config OMAP_MUX_DEBUG
bool "Multiplexing debug output"
depends on OMAP_MUX
default n
help
Makes the multiplexing functions print out a lot of debug info.
This is useful if you want to find out the correct values of the
......@@ -93,7 +91,6 @@ config OMAP_32K_TIMER_HZ
config OMAP_DM_TIMER
bool "Use dual-mode timer"
default n
depends on ARCH_OMAP16XX
help
Select this option if you want to use OMAP Dual-Mode timers.
......
drivers/serial/imx.c
View file @ 8d5c3150
......@@ -499,7 +499,7 @@ imx_set_termios(struct uart_port *port, struct termios *termios,
ucr2 |= UCR2_STPB;
if (termios->c_cflag & PARENB) {
ucr2 |= UCR2_PREN;
if (!(termios->c_cflag & PARODD))
if (termios->c_cflag & PARODD)
ucr2 |= UCR2_PROE;
}
......
include/asm-arm/arch-ixp2000/ixp2000-regs.h
View file @ 8d5c3150
......@@ -26,6 +26,8 @@
* fc000000 da000000 16M PCI CFG0
* fd000000 d8000000 16M PCI I/O
* fe[0-7]00000 8M per-platform mappings
* fe900000 80000000 1M SRAM #0 (first MB)
* fea00000 cb400000 1M SCRATCH ring get/put
* feb00000 c8000000 1M MSF
* fec00000 df000000 1M PCI CSRs
* fed00000 de000000 1M PCI CREG
......@@ -91,6 +93,14 @@
#define IXP2000_MSF_VIRT_BASE 0xfeb00000
#define IXP2000_MSF_SIZE 0x00100000
#define IXP2000_SCRATCH_RING_PHYS_BASE 0xcb400000
#define IXP2000_SCRATCH_RING_VIRT_BASE 0xfea00000
#define IXP2000_SCRATCH_RING_SIZE 0x00100000
#define IXP2000_SRAM0_PHYS_BASE 0x80000000
#define IXP2000_SRAM0_VIRT_BASE 0xfe900000
#define IXP2000_SRAM0_SIZE 0x00100000
#define IXP2000_PCI_IO_PHYS_BASE 0xd8000000
#define IXP2000_PCI_IO_VIRT_BASE 0xfd000000
#define IXP2000_PCI_IO_SIZE 0x01000000
......
include/asm-arm/arch-versatile/entry-macro.S
View file @ 8d5c3150
......@@ -8,6 +8,7 @@
* warranty of any kind, whether express or implied.
*/
#include <asm/hardware.h>
#include <asm/hardware/vic.h>
.macro disable_fiq
.endm
......
include/asm-arm/arch-versatile/platform.h
View file @ 8d5c3150
......@@ -293,26 +293,7 @@
* VERSATILE_SYS_IC
*
*/
#define VIC_IRQ_STATUS 0
#define VIC_FIQ_STATUS 0x04
#define VIC_IRQ_RAW_STATUS 0x08
#define VIC_INT_SELECT 0x0C /* 1 = FIQ, 0 = IRQ */
#define VIC_IRQ_ENABLE 0x10 /* 1 = enable, 0 = disable */
#define VIC_IRQ_ENABLE_CLEAR 0x14
#define VIC_IRQ_SOFT 0x18
#define VIC_IRQ_SOFT_CLEAR 0x1C
#define VIC_PROTECT 0x20
#define VIC_VECT_ADDR 0x30
#define VIC_DEF_VECT_ADDR 0x34
#define VIC_VECT_ADDR0 0x100 /* 0 to 15 */
#define VIC_VECT_CNTL0 0x200 /* 0 to 15 */
#define VIC_ITCR 0x300 /* VIC test control register */
#define VIC_FIQ_RAW_STATUS 0x08
#define VIC_FIQ_ENABLE 0x10 /* 1 = enable, 0 = disable */
#define VIC_FIQ_ENABLE_CLEAR 0x14
#define VIC_FIQ_SOFT 0x18
#define VIC_FIQ_SOFT_CLEAR 0x1C
/* VIC definitions in include/asm-arm/hardware/vic.h */
#define SIC_IRQ_STATUS 0
#define SIC_IRQ_RAW_STATUS 0x04
......@@ -325,8 +306,6 @@
#define SIC_INT_PIC_ENABLES 0x20 /* set interrupt pass through bits */
#define SIC_INT_PIC_ENABLEC 0x24 /* Clear interrupt pass through bits */
#define VICVectCntl_Enable (1 << 5)
/* ------------------------------------------------------------------------
* Interrupts - bit assignment (primary)
* ------------------------------------------------------------------------
......
include/asm-arm/hardware/vic.h 0 → 100644
View file @ 8d5c3150
/*
* linux/include/asm-arm/hardware/vic.h
*
* Copyright (c) ARM Limited 2003. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARM_HARDWARE_VIC_H
#define __ASM_ARM_HARDWARE_VIC_H
#define VIC_IRQ_STATUS 0x00
#define VIC_FIQ_STATUS 0x04
#define VIC_RAW_STATUS 0x08
#define VIC_INT_SELECT 0x0c /* 1 = FIQ, 0 = IRQ */
#define VIC_INT_ENABLE 0x10 /* 1 = enable, 0 = disable */
#define VIC_INT_ENABLE_CLEAR 0x14
#define VIC_INT_SOFT 0x18
#define VIC_INT_SOFT_CLEAR 0x1c
#define VIC_PROTECT 0x20
#define VIC_VECT_ADDR 0x30
#define VIC_DEF_VECT_ADDR 0x34
#define VIC_VECT_ADDR0 0x100 /* 0 to 15 */
#define VIC_VECT_CNTL0 0x200 /* 0 to 15 */
#define VIC_ITCR 0x300 /* VIC test control register */
#define VIC_VECT_CNTL_ENABLE (1 << 5)
#ifndef __ASSEMBLY__
void vic_init(void __iomem *base, u32 vic_sources);
#endif
#endif
include/asm-arm/mach/arch.h
View file @ 8d5c3150
......@@ -20,7 +20,7 @@ struct machine_desc {
* by assembler code in head-armv.S
*/
unsigned int nr; /* architecture number */
unsigned int phys_ram; /* start of physical ram */
unsigned int __deprecated phys_ram; /* start of physical ram */
unsigned int phys_io; /* start of physical io */
unsigned int io_pg_offst; /* byte offset for io
* page tabe entry */
......
include/asm-arm/page.h
View file @ 8d5c3150
......@@ -170,6 +170,13 @@ extern pmd_t *top_pmd;
#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
/*
* With EABI on ARMv5 and above we must have 64-bit aligned slab pointers.
*/
#if defined(CONFIG_AEABI) && (__LINUX_ARM_ARCH__ >= 5)
#define ARCH_SLAB_MINALIGN 8
#endif
#endif /* __KERNEL__ */
#include <asm-generic/page.h>
......
include/asm-arm/processor.h
View file @ 8d5c3150
......@@ -49,6 +49,12 @@ struct thread_struct {
#define INIT_THREAD { }
#ifdef CONFIG_MMU
#define nommu_start_thread(regs) do { } while (0)
#else
#define nommu_start_thread(regs) regs->ARM_r10 = current->mm->start_data
#endif
#define start_thread(regs,pc,sp) \
({ \
unsigned long *stack = (unsigned long *)sp; \
......@@ -65,6 +71,7 @@ struct thread_struct {
regs->ARM_r2 = stack[2]; /* r2 (envp) */ \
regs->ARM_r1 = stack[1]; /* r1 (argv) */ \
regs->ARM_r0 = stack[0]; /* r0 (argc) */ \
nommu_start_thread(regs); \
})
/* Forward declaration, a strange C thing */
......
include/asm-arm/ptrace.h
View file @ 8d5c3150
......@@ -23,6 +23,9 @@
#define PTRACE_OLDSETOPTIONS 21
#define PTRACE_GET_THREAD_AREA 22
#define PTRACE_SET_SYSCALL 23
/*
* PSR bits
*/
......@@ -60,9 +63,11 @@
#ifndef __ASSEMBLY__
/* this struct defines the way the registers are stored on the
stack during a system call. */
/*
* This struct defines the way the registers are stored on the
* stack during a system call. Note that sizeof(struct pt_regs)
* has to be a multiple of 8.
*/
struct pt_regs {
long uregs[18];
};
......
include/asm-arm/stat.h
View file @ 8d5c3150
......@@ -70,14 +70,7 @@ struct stat64 {
long long st_size;
unsigned long st_blksize;
#if defined(__ARMEB__)
unsigned long __pad4; /* Future possible st_blocks hi bits */
unsigned long st_blocks; /* Number 512-byte blocks allocated. */
#else /* Must be little */
unsigned long st_blocks; /* Number 512-byte blocks allocated. */
unsigned long __pad4; /* Future possible st_blocks hi bits */
#endif
unsigned long long st_blocks; /* Number 512-byte blocks allocated. */
unsigned long st_atime;
unsigned long st_atime_nsec;
......@@ -89,6 +82,6 @@ struct stat64 {
unsigned long st_ctime_nsec;
unsigned long long st_ino;
} __attribute__((packed));
};
#endif
include/asm-arm/statfs.h
View file @ 8d5c3150
#ifndef _ASMARM_STATFS_H
#define _ASMARM_STATFS_H
#include <asm-generic/statfs.h>
#ifndef __KERNEL_STRICT_NAMES
# include <linux/types.h>
typedef __kernel_fsid_t fsid_t;
#endif
struct statfs {
__u32 f_type;
__u32 f_bsize;
__u32 f_blocks;
__u32 f_bfree;
__u32 f_bavail;
__u32 f_files;
__u32 f_ffree;
__kernel_fsid_t f_fsid;
__u32 f_namelen;
__u32 f_frsize;
__u32 f_spare[5];
};
/*
* With EABI there is 4 bytes of padding added to this structure.
* Let's pack it so the padding goes away to simplify dual ABI support.
* Note that user space does NOT have to pack this structure.
*/
struct statfs64 {
__u32 f_type;
__u32 f_bsize;
__u64 f_blocks;
__u64 f_bfree;
__u64 f_bavail;
__u64 f_files;
__u64 f_ffree;
__kernel_fsid_t f_fsid;
__u32 f_namelen;
__u32 f_frsize;
__u32 f_spare[5];
} __attribute__ ((packed,aligned(4)));
#endif
include/asm-arm/unistd.h
View file @ 8d5c3150
......@@ -15,10 +15,12 @@
#include <linux/linkage.h>
#if defined(__thumb__)
#define __NR_OABI_SYSCALL_BASE 0x900000
#if defined(__thumb__) || defined(__ARM_EABI__)
#define __NR_SYSCALL_BASE 0
#else
#define __NR_SYSCALL_BASE 0x900000
#define __NR_SYSCALL_BASE __NR_OABI_SYSCALL_BASE
#endif
/*
......@@ -373,13 +375,13 @@
#define __sys1(x) __sys2(x)
#ifndef __syscall
#if defined(__thumb__)
#define __syscall(name) \
"push {r7}\n\t" \
"mov r7, #" __sys1(__NR_##name) "\n\t" \
"swi 0\n\t" \
"pop {r7}"
#if defined(__thumb__) || defined(__ARM_EABI__)
#define __SYS_REG(name) register long __sysreg __asm__("r7") = __NR_##name;
#define __SYS_REG_LIST(regs...) "r" (__sysreg) , ##regs
#define __syscall(name) "swi\t0"
#else
#define __SYS_REG(name)
#define __SYS_REG_LIST(regs...) regs
#define __syscall(name) "swi\t" __sys1(__NR_##name) ""
#endif
#endif
......@@ -395,33 +397,34 @@ do { \
#define _syscall0(type,name) \
type name(void) { \
__SYS_REG(name) \
register long __res_r0 __asm__("r0"); \
long __res; \
__asm__ __volatile__ ( \
__syscall(name) \
: "=r" (__res_r0) \
: \
: "lr"); \
: __SYS_REG_LIST() ); \
__res = __res_r0; \
__syscall_return(type,__res); \
}
#define _syscall1(type,name,type1,arg1) \
type name(type1 arg1) { \
__SYS_REG(name) \
register long __r0 __asm__("r0") = (long)arg1; \
register long __res_r0 __asm__("r0"); \
long __res; \
__asm__ __volatile__ ( \
__syscall(name) \
: "=r" (__res_r0) \
: "r" (__r0) \
: "lr"); \
: __SYS_REG_LIST( "0" (__r0) ) ); \
__res = __res_r0; \
__syscall_return(type,__res); \
}
#define _syscall2(type,name,type1,arg1,type2,arg2) \
type name(type1 arg1,type2 arg2) { \
__SYS_REG(name) \
register long __r0 __asm__("r0") = (long)arg1; \
register long __r1 __asm__("r1") = (long)arg2; \
register long __res_r0 __asm__("r0"); \
......@@ -429,8 +432,7 @@ type name(type1 arg1,type2 arg2) { \
__asm__ __volatile__ ( \
__syscall(name) \
: "=r" (__res_r0) \
: "r" (__r0),"r" (__r1) \
: "lr"); \
: __SYS_REG_LIST( "0" (__r0), "r" (__r1) ) ); \
__res = __res_r0; \
__syscall_return(type,__res); \
}
......@@ -438,6 +440,7 @@ type name(type1 arg1,type2 arg2) { \
#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \
type name(type1 arg1,type2 arg2,type3 arg3) { \
__SYS_REG(name) \
register long __r0 __asm__("r0") = (long)arg1; \
register long __r1 __asm__("r1") = (long)arg2; \
register long __r2 __asm__("r2") = (long)arg3; \
......@@ -446,8 +449,7 @@ type name(type1 arg1,type2 arg2,type3 arg3) { \
__asm__ __volatile__ ( \
__syscall(name) \
: "=r" (__res_r0) \
: "r" (__r0),"r" (__r1),"r" (__r2) \
: "lr"); \
: __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2) ) ); \
__res = __res_r0; \
__syscall_return(type,__res); \
}
......@@ -455,6 +457,7 @@ type name(type1 arg1,type2 arg2,type3 arg3) { \
#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4)\
type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4) { \
__SYS_REG(name) \
register long __r0 __asm__("r0") = (long)arg1; \
register long __r1 __asm__("r1") = (long)arg2; \
register long __r2 __asm__("r2") = (long)arg3; \
......@@ -464,8 +467,7 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4) { \
__asm__ __volatile__ ( \
__syscall(name) \
: "=r" (__res_r0) \
: "r" (__r0),"r" (__r1),"r" (__r2),"r" (__r3) \
: "lr"); \
: __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), "r" (__r3) ) ); \
__res = __res_r0; \
__syscall_return(type,__res); \
}
......@@ -473,6 +475,7 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4) { \
#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \
type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) { \
__SYS_REG(name) \
register long __r0 __asm__("r0") = (long)arg1; \
register long __r1 __asm__("r1") = (long)arg2; \
register long __r2 __asm__("r2") = (long)arg3; \
......@@ -483,14 +486,15 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) { \
__asm__ __volatile__ ( \
__syscall(name) \
: "=r" (__res_r0) \
: "r" (__r0),"r" (__r1),"r" (__r2),"r" (__r3),"r" (__r4) \
: "lr"); \
: __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), \
"r" (__r3), "r" (__r4) ) ); \
__res = __res_r0; \
__syscall_return(type,__res); \
}
#define _syscall6(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5,type6,arg6) \
type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6) { \
__SYS_REG(name) \
register long __r0 __asm__("r0") = (long)arg1; \
register long __r1 __asm__("r1") = (long)arg2; \
register long __r2 __asm__("r2") = (long)arg3; \
......@@ -502,30 +506,33 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6
__asm__ __volatile__ ( \
__syscall(name) \
: "=r" (__res_r0) \
: "r" (__r0),"r" (__r1),"r" (__r2),"r" (__r3), "r" (__r4),"r" (__r5) \
: "lr"); \
: __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), \
"r" (__r3), "r" (__r4), "r" (__r5) ) ); \
__res = __res_r0; \
__syscall_return(type,__res); \
}
#ifdef __KERNEL__
#define __ARCH_WANT_IPC_PARSE_VERSION
#define __ARCH_WANT_OLD_READDIR
#define __ARCH_WANT_STAT64
#define __ARCH_WANT_SYS_ALARM
#define __ARCH_WANT_SYS_GETHOSTNAME
#define __ARCH_WANT_SYS_PAUSE
#define __ARCH_WANT_SYS_TIME
#define __ARCH_WANT_SYS_UTIME
#define __ARCH_WANT_SYS_SOCKETCALL
#define __ARCH_WANT_SYS_GETPGRP
#define __ARCH_WANT_SYS_LLSEEK
#define __ARCH_WANT_SYS_NICE
#define __ARCH_WANT_SYS_OLD_GETRLIMIT
#define __ARCH_WANT_SYS_OLDUMOUNT
#define __ARCH_WANT_SYS_SIGPENDING
#define __ARCH_WANT_SYS_SIGPROCMASK
#define __ARCH_WANT_SYS_RT_SIGACTION
#if !defined(CONFIG_AEABI) || defined(CONFIG_OABI_COMPAT)
#define __ARCH_WANT_SYS_TIME
#define __ARCH_WANT_SYS_OLDUMOUNT
#define __ARCH_WANT_SYS_ALARM
#define __ARCH_WANT_SYS_UTIME
#define __ARCH_WANT_SYS_OLD_GETRLIMIT
#define __ARCH_WANT_OLD_READDIR
#define __ARCH_WANT_SYS_SOCKETCALL
#endif
#endif
#ifdef __KERNEL_SYSCALLS__
......
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