Commit 9543a9c3 authored by Dan Carpenter's avatar Dan Carpenter Committed by Alex Deucher

drm/amd/display: Possible divide by zero in set_speed()

If "speed" is zero then we use it as a divisor to find "prescale".  It's
better to move the check for zero to the very start of the function.

Fixes: 9eeec26a ("drm/amd/display: Refine i2c frequency calculating sequence")
Signed-off-by: default avatarDan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 95f247e7
...@@ -267,6 +267,9 @@ static void set_speed( ...@@ -267,6 +267,9 @@ static void set_speed(
uint32_t xtal_ref_div = 0; uint32_t xtal_ref_div = 0;
uint32_t prescale = 0; uint32_t prescale = 0;
if (speed == 0)
return;
REG_GET(MICROSECOND_TIME_BASE_DIV, XTAL_REF_DIV, &xtal_ref_div); REG_GET(MICROSECOND_TIME_BASE_DIV, XTAL_REF_DIV, &xtal_ref_div);
if (xtal_ref_div == 0) if (xtal_ref_div == 0)
...@@ -274,7 +277,6 @@ static void set_speed( ...@@ -274,7 +277,6 @@ static void set_speed(
prescale = ((dce_i2c_hw->reference_frequency * 2) / xtal_ref_div) / speed; prescale = ((dce_i2c_hw->reference_frequency * 2) / xtal_ref_div) / speed;
if (speed) {
if (dce_i2c_hw->masks->DC_I2C_DDC1_START_STOP_TIMING_CNTL) if (dce_i2c_hw->masks->DC_I2C_DDC1_START_STOP_TIMING_CNTL)
REG_UPDATE_N(SPEED, 3, REG_UPDATE_N(SPEED, 3,
FN(DC_I2C_DDC1_SPEED, DC_I2C_DDC1_PRESCALE), prescale, FN(DC_I2C_DDC1_SPEED, DC_I2C_DDC1_PRESCALE), prescale,
...@@ -284,7 +286,6 @@ static void set_speed( ...@@ -284,7 +286,6 @@ static void set_speed(
REG_UPDATE_N(SPEED, 2, REG_UPDATE_N(SPEED, 2,
FN(DC_I2C_DDC1_SPEED, DC_I2C_DDC1_PRESCALE), prescale, FN(DC_I2C_DDC1_SPEED, DC_I2C_DDC1_PRESCALE), prescale,
FN(DC_I2C_DDC1_SPEED, DC_I2C_DDC1_THRESHOLD), 2); FN(DC_I2C_DDC1_SPEED, DC_I2C_DDC1_THRESHOLD), 2);
}
} }
static bool setup_engine( static bool setup_engine(
......
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