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Commit 9bc128e1 authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'ux500-multiplatform-asoc' of... 

Merge tag 'ux500-multiplatform-asoc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/multiplatform

From Linus Walleij <linus.walleij@linaro.org>:

Ux500 multiplatform support.  This tag builds upon the MFD-specific base
tag "ux500-multiplatform-mfd". This removes all <mach/*> dependencies
and makes the ux500 fully multi-platform.

* tag 'ux500-multiplatform-asoc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
  ARM: ux500: build hotplug.o for ARMv7-a
  ARM: ux500: move to multiplatform
  ARM: ux500: make remaining headers local
  ARM: ux500: make irqs.h local to platform
  ARM: ux500: get rid of <mach/[hardware|db8500-regs].h>
  staging: ste_rmi4: kill platform_data hack
  ARM: ux500: move mach/msp.h to <linux/platform_data/*>
  clk: ux500: pass clock base adresses in init call
  ARM: ux500: make debug macro stand-alone
  ARM: ux500: move debugmacro to debug includes
  ARM: ux500: split out prcmu initialization
  mfd: db8500-prcmu: drop unused includes
  ARM: ux500: move PM-related PRCMU functions to machine
  mfd: db8500-prcmu: get base address from resource
  mfd: prcmu: pass a base and size with the early initcall

Conflicts:
	arch/arm/Kconfig
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 835f9c38 f6f1bdac
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Showing with 699 additions and 727 deletions
arch/arm/Kconfig
View file @ 9bc128e1
......@@ -853,22 +853,6 @@ config ARCH_U300
help
Support for ST-Ericsson U300 series mobile platforms.
config ARCH_U8500
bool "ST-Ericsson U8500 Series"
depends on MMU
select ARCH_HAS_CPUFREQ
select ARCH_REQUIRE_GPIOLIB
select ARM_AMBA
select CLKDEV_LOOKUP
select CPU_V7
select GENERIC_CLOCKEVENTS
select HAVE_SMP
select MIGHT_HAVE_CACHE_L2X0
select SPARSE_IRQ
help
Support for ST-Ericsson's Ux500 architecture
config ARCH_DAVINCI
bool "TI DaVinci"
select ARCH_HAS_HOLES_MEMORYMODEL
......
arch/arm/Kconfig.debug
View file @ 9bc128e1
......@@ -432,6 +432,13 @@ choice
Say Y here if you want the debug print routines to direct
their output to the uart1 port on SiRFmarco devices.
config DEBUG_UX500_UART
depends on ARCH_U8500
bool "Use Ux500 UART for low-level debug"
help
Say Y here if you want kernel low-level debugging support
on Ux500 based platforms.
config DEBUG_VEXPRESS_UART0_DETECT
bool "Autodetect UART0 on Versatile Express Cortex-A core tiles"
depends on ARCH_VEXPRESS && CPU_CP15_MMU
......@@ -620,6 +627,7 @@ config DEBUG_LL_INCLUDE
DEBUG_VEXPRESS_UART0_CA9 || DEBUG_VEXPRESS_UART0_RS1
default "debug/vt8500.S" if DEBUG_VT8500_UART0
default "debug/tegra.S" if DEBUG_TEGRA_UART
default "debug/ux500.S" if DEBUG_UX500_UART
default "debug/zynq.S" if DEBUG_ZYNQ_UART0 || DEBUG_ZYNQ_UART1
default "mach/debug-macro.S"
......
arch/arm/mach-ux500/include/mach/debug-macro.S → arch/arm/include/debug/ux500.S
View file @ 9bc128e1
......@@ -8,7 +8,7 @@
* published by the Free Software Foundation.
*
*/
#include <mach/hardware.h>
#if CONFIG_UX500_DEBUG_UART > 2
#error Invalid Ux500 debug UART
......@@ -21,19 +21,28 @@
*/
#ifdef CONFIG_UX500_SOC_DB8500
#define __UX500_UART(n) U8500_UART##n##_BASE
#define U8500_UART0_PHYS_BASE (0x80120000)
#define U8500_UART1_PHYS_BASE (0x80121000)
#define U8500_UART2_PHYS_BASE (0x80007000)
#define U8500_UART0_VIRT_BASE (0xa8120000)
#define U8500_UART1_VIRT_BASE (0xa8121000)
#define U8500_UART2_VIRT_BASE (0xa8007000)
#define __UX500_PHYS_UART(n) U8500_UART##n##_PHYS_BASE
#define __UX500_VIRT_UART(n) U8500_UART##n##_VIRT_BASE
#endif
#ifndef __UX500_UART
#if !defined(__UX500_PHYS_UART) || !defined(__UX500_VIRT_UART)
#error Unknown SOC
#endif
#define UX500_UART(n) __UX500_UART(n)
#define UART_BASE UX500_UART(CONFIG_UX500_DEBUG_UART)
#define UX500_PHYS_UART(n) __UX500_PHYS_UART(n)
#define UX500_VIRT_UART(n) __UX500_VIRT_UART(n)
#define UART_PHYS_BASE UX500_PHYS_UART(CONFIG_UX500_DEBUG_UART)
#define UART_VIRT_BASE UX500_VIRT_UART(CONFIG_UX500_DEBUG_UART)
.macro addruart, rp, rv, tmp
ldr \rp, =UART_BASE @ no, physical address
ldr \rv, =IO_ADDRESS(UART_BASE) @ yes, virtual address
ldr \rp, =UART_PHYS_BASE @ no, physical address
ldr \rv, =UART_VIRT_BASE @ yes, virtual address
.endm
#include <asm/hardware/debug-pl01x.S>
arch/arm/mach-ux500/Kconfig
View file @ 9bc128e1
config ARCH_U8500
bool "ST-Ericsson U8500 Series" if ARCH_MULTI_V7
depends on MMU
select ARCH_HAS_CPUFREQ
select ARCH_REQUIRE_GPIOLIB
select ARM_AMBA
select CLKDEV_LOOKUP
select CPU_V7
select GENERIC_CLOCKEVENTS
select HAVE_SMP
select MIGHT_HAVE_CACHE_L2X0
help
Support for ST-Ericsson's Ux500 architecture
if ARCH_U8500
config UX500_SOC_COMMON
......
arch/arm/mach-ux500/Makefile
View file @ 9bc128e1
......@@ -3,7 +3,7 @@
#
obj-y := cpu.o devices.o devices-common.o \
id.o usb.o timer.o
id.o usb.o timer.o pm.o
obj-$(CONFIG_CPU_IDLE) += cpuidle.o
obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o
obj-$(CONFIG_UX500_SOC_DB8500) += cpu-db8500.o devices-db8500.o
......@@ -15,3 +15,5 @@ obj-$(CONFIG_MACH_MOP500) += board-mop500.o board-mop500-sdi.o \
board-mop500-audio.o
obj-$(CONFIG_SMP) += platsmp.o headsmp.o
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
CFLAGS_hotplug.o += -march=armv7-a
arch/arm/mach-ux500/board-mop500-audio.c
View file @ 9bc128e1
......@@ -10,10 +10,9 @@
#include <linux/platform_data/pinctrl-nomadik.h>
#include <linux/platform_data/dma-ste-dma40.h>
#include <mach/devices.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#include <mach/msp.h>
#include "devices.h"
#include "irqs.h"
#include <linux/platform_data/asoc-ux500-msp.h>
#include "ste-dma40-db8500.h"
#include "board-mop500.h"
......
arch/arm/mach-ux500/board-mop500-pins.c
View file @ 9bc128e1
......@@ -13,8 +13,6 @@
#include <asm/mach-types.h>
#include <mach/hardware.h>
#include "pins-db8500.h"
#include "board-mop500.h"
......
arch/arm/mach-ux500/board-mop500-sdi.c
View file @ 9bc128e1
......@@ -14,9 +14,9 @@
#include <linux/platform_data/dma-ste-dma40.h>
#include <asm/mach-types.h>
#include <mach/devices.h>
#include <mach/hardware.h>
#include "devices.h"
#include "db8500-regs.h"
#include "devices-db8500.h"
#include "board-mop500.h"
#include "ste-dma40-db8500.h"
......
arch/arm/mach-ux500/board-mop500-u8500uib.c
View file @ 9bc128e1
......@@ -12,12 +12,15 @@
#include <linux/mfd/tc3589x.h>
#include <linux/input/matrix_keypad.h>
#include <mach/irqs.h>
#include "irqs.h"
#include "board-mop500.h"
/* Dummy data that can be overridden by staging driver */
struct i2c_board_info __initdata __weak mop500_i2c3_devices_u8500[] = {
static struct i2c_board_info __initdata mop500_i2c3_devices_u8500[] = {
{
I2C_BOARD_INFO("synaptics_rmi4_i2c", 0x4B),
.irq = NOMADIK_GPIO_TO_IRQ(84),
},
};
/*
......
arch/arm/mach-ux500/board-mop500-uib.c
View file @ 9bc128e1
......@@ -11,7 +11,6 @@
#include <linux/init.h>
#include <linux/i2c.h>
#include <mach/hardware.h>
#include "board-mop500.h"
#include "id.h"
......
arch/arm/mach-ux500/board-mop500.c
View file @ 9bc128e1
......@@ -41,13 +41,13 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/hardware.h>
#include <mach/setup.h>
#include <mach/devices.h>
#include <mach/irqs.h>
#include "setup.h"
#include "devices.h"
#include "irqs.h"
#include <linux/platform_data/crypto-ux500.h>
#include "ste-dma40-db8500.h"
#include "db8500-regs.h"
#include "devices-db8500.h"
#include "board-mop500.h"
#include "board-mop500-regulators.h"
......@@ -206,63 +206,6 @@ struct ab8500_platform_data ab8500_platdata = {
.codec = &ab8500_codec_pdata,
};
/*
* Thermal Sensor
*/
static struct resource db8500_thsens_resources[] = {
{
.name = "IRQ_HOTMON_LOW",
.start = IRQ_PRCMU_HOTMON_LOW,
.end = IRQ_PRCMU_HOTMON_LOW,
.flags = IORESOURCE_IRQ,
},
{
.name = "IRQ_HOTMON_HIGH",
.start = IRQ_PRCMU_HOTMON_HIGH,
.end = IRQ_PRCMU_HOTMON_HIGH,
.flags = IORESOURCE_IRQ,
},
};
static struct db8500_thsens_platform_data db8500_thsens_data = {
.trip_points[0] = {
.temp = 70000,
.type = THERMAL_TRIP_ACTIVE,
.cdev_name = {
[0] = "thermal-cpufreq-0",
},
},
.trip_points[1] = {
.temp = 75000,
.type = THERMAL_TRIP_ACTIVE,
.cdev_name = {
[0] = "thermal-cpufreq-0",
},
},
.trip_points[2] = {
.temp = 80000,
.type = THERMAL_TRIP_ACTIVE,
.cdev_name = {
[0] = "thermal-cpufreq-0",
},
},
.trip_points[3] = {
.temp = 85000,
.type = THERMAL_TRIP_CRITICAL,
},
.num_trips = 4,
};
static struct platform_device u8500_thsens_device = {
.name = "db8500-thermal",
.resource = db8500_thsens_resources,
.num_resources = ARRAY_SIZE(db8500_thsens_resources),
.dev = {
.platform_data = &db8500_thsens_data,
},
};
static struct platform_device u8500_cpufreq_cooling_device = {
.name = "db8500-cpufreq-cooling",
};
......@@ -622,7 +565,6 @@ static struct platform_device *snowball_platform_devs[] __initdata = {
&snowball_key_dev,
&snowball_sbnet_dev,
&snowball_gpio_en_3v3_regulator_dev,
&u8500_thsens_device,
&u8500_cpufreq_cooling_device,
};
......
arch/arm/mach-ux500/board-mop500.h
View file @ 9bc128e1
......@@ -8,8 +8,8 @@
#define __BOARD_MOP500_H
/* For NOMADIK_NR_GPIO */
#include <mach/irqs.h>
#include <mach/msp.h>
#include "irqs.h"
#include <linux/platform_data/asoc-ux500-msp.h>
#include <linux/amba/mmci.h>
/* Snowball specific GPIO assignments, this board has no GPIO expander */
......
arch/arm/mach-ux500/cache-l2x0.c
View file @ 9bc128e1
......@@ -9,8 +9,8 @@
#include <asm/cacheflush.h>
#include <asm/hardware/cache-l2x0.h>
#include <mach/hardware.h>
#include "db8500-regs.h"
#include "id.h"
static void __iomem *l2x0_base;
......
arch/arm/mach-ux500/cpu-db8500.c
View file @ 9bc128e1
......@@ -28,15 +28,13 @@
#include <asm/mach/map.h>
#include <asm/mach/arch.h>
#include <mach/hardware.h>
#include <mach/setup.h>
#include <mach/devices.h>
#include <mach/db8500-regs.h>
#include <mach/irqs.h>
#include "setup.h"
#include "devices.h"
#include "irqs.h"
#include "devices-db8500.h"
#include "ste-dma40-db8500.h"
#include "db8500-regs.h"
#include "board-mop500.h"
#include "id.h"
......@@ -94,8 +92,6 @@ void __init u8500_map_io(void)
iotable_init(u9540_io_desc, ARRAY_SIZE(u9540_io_desc));
else
iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));
_PRCMU_BASE = __io_address(U8500_PRCMU_BASE);
}
static struct resource db8500_pmu_resources[] = {
......
arch/arm/mach-ux500/cpu.c
View file @ 9bc128e1
......@@ -8,7 +8,7 @@
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/mfd/db8500-prcmu.h>
#include <linux/mfd/dbx500-prcmu.h>
#include <linux/clksrc-dbx500-prcmu.h>
#include <linux/sys_soc.h>
#include <linux/err.h>
......@@ -20,18 +20,17 @@
#include <linux/irqchip.h>
#include <linux/irqchip/arm-gic.h>
#include <linux/platform_data/clk-ux500.h>
#include <linux/platform_data/arm-ux500-pm.h>
#include <asm/mach/map.h>
#include <mach/hardware.h>
#include <mach/setup.h>
#include <mach/devices.h>
#include "setup.h"
#include "devices.h"
#include "board-mop500.h"
#include "db8500-regs.h"
#include "id.h"
void __iomem *_PRCMU_BASE;
/*
* FIXME: Should we set up the GPIO domain here?
*
......@@ -68,13 +67,23 @@ void __init ux500_init_irq(void)
* Init clocks here so that they are available for system timer
* initialization.
*/
if (cpu_is_u8500_family() || cpu_is_u9540())
db8500_prcmu_early_init();
if (cpu_is_u8500_family() || cpu_is_u9540())
u8500_clk_init();
else if (cpu_is_u8540())
if (cpu_is_u8500_family()) {
prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1);
ux500_pm_init(U8500_PRCMU_BASE, SZ_8K - 1);
u8500_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE,
U8500_CLKRST3_BASE, U8500_CLKRST5_BASE,
U8500_CLKRST6_BASE);
} else if (cpu_is_u9540()) {
prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1);
ux500_pm_init(U8500_PRCMU_BASE, SZ_8K - 1);
u8500_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE,
U8500_CLKRST3_BASE, U8500_CLKRST5_BASE,
U8500_CLKRST6_BASE);
} else if (cpu_is_u8540()) {
prcmu_early_init(U8500_PRCMU_BASE, SZ_8K + SZ_4K - 1);
ux500_pm_init(U8500_PRCMU_BASE, SZ_8K + SZ_4K - 1);
u8540_clk_init();
}
}
void __init ux500_init_late(void)
......
arch/arm/mach-ux500/cpuidle.c
View file @ 9bc128e1
......@@ -16,10 +16,13 @@
#include <linux/atomic.h>
#include <linux/smp.h>
#include <linux/mfd/dbx500-prcmu.h>
#include <linux/platform_data/arm-ux500-pm.h>
#include <asm/cpuidle.h>
#include <asm/proc-fns.h>
#include "db8500-regs.h"
static atomic_t master = ATOMIC_INIT(0);
static DEFINE_SPINLOCK(master_lock);
static DEFINE_PER_CPU(struct cpuidle_device, ux500_cpuidle_device);
......
arch/arm/mach-ux500/include/mach/db8500-regs.h → arch/arm/mach-ux500/db8500-regs.h
View file @ 9bc128e1
......@@ -170,4 +170,32 @@
/* SoC identification number information */
#define U8500_BB_UID_BASE (U8500_BACKUPRAM1_BASE + 0xFC0)
/* Offsets to specific addresses in some IP blocks for DMA */
#define MSP_TX_RX_REG_OFFSET 0
#define CRYP1_RX_REG_OFFSET 0x10
#define CRYP1_TX_REG_OFFSET 0x8
#define HASH1_TX_REG_OFFSET 0x4
/*
* Macros to get at IO space when running virtually
* We dont map all the peripherals, let ioremap do
* this for us. We map only very basic peripherals here.
*/
#define U8500_IO_VIRTUAL 0xf0000000
#define U8500_IO_PHYSICAL 0xa0000000
/* This is where we map in the ROM to check ASIC IDs */
#define UX500_VIRT_ROM 0xf0000000
/* This macro is used in assembly, so no cast */
#define IO_ADDRESS(x) \
(((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + U8500_IO_VIRTUAL)
/* typesafe io address */
#define __io_address(n) IOMEM(IO_ADDRESS(n))
/* Used by some plat-nomadik code */
#define io_p2v(n) __io_address(n)
#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x)
#endif
arch/arm/mach-ux500/devices-common.c
View file @ 9bc128e1
......@@ -13,8 +13,7 @@
#include <linux/platform_device.h>
#include <linux/platform_data/pinctrl-nomadik.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#include "irqs.h"
#include "devices-common.h"
......
arch/arm/mach-ux500/devices-db8500.c
View file @ 9bc128e1
......@@ -15,10 +15,10 @@
#include <linux/platform_data/dma-ste-dma40.h>
#include <linux/mfd/dbx500-prcmu.h>
#include <mach/hardware.h>
#include <mach/setup.h>
#include <mach/irqs.h>
#include "setup.h"
#include "irqs.h"
#include "db8500-regs.h"
#include "devices-db8500.h"
#include "ste-dma40-db8500.h"
......@@ -199,6 +199,8 @@ struct platform_device u8500_ske_keypad_device = {
struct prcmu_pdata db8500_prcmu_pdata = {
.ab_platdata = &ab8500_platdata,
.ab_irq = IRQ_DB8500_AB8500,
.irq_base = IRQ_PRCMU_BASE,
.version_offset = DB8500_PRCMU_FW_VERSION_OFFSET,
.legacy_offset = DB8500_PRCMU_LEGACY_OFFSET,
};
......
arch/arm/mach-ux500/devices-db8500.h
View file @ 9bc128e1
......@@ -9,7 +9,8 @@
#define __DEVICES_DB8500_H
#include <linux/platform_data/usb-musb-ux500.h>
#include <mach/irqs.h>
#include "irqs.h"
#include "db8500-regs.h"
#include "devices-common.h"
struct ske_keypad_platform_data;
......
arch/arm/mach-ux500/devices.c
View file @ 9bc128e1
......@@ -11,8 +11,9 @@
#include <linux/io.h>
#include <linux/amba/bus.h>
#include <mach/hardware.h>
#include <mach/setup.h>
#include "setup.h"
#include "db8500-regs.h"
void __init amba_add_devices(struct amba_device *devs[], int num)
{
......
arch/arm/mach-ux500/hotplug.c
View file @ 9bc128e1
......@@ -15,7 +15,7 @@
#include <asm/cacheflush.h>
#include <asm/smp_plat.h>
#include <mach/setup.h>
#include "setup.h"
/*
* platform-specific code to shutdown a CPU
......
arch/arm/mach-ux500/id.c
View file @ 9bc128e1
......@@ -14,9 +14,9 @@
#include <asm/cacheflush.h>
#include <asm/mach/map.h>
#include <mach/hardware.h>
#include <mach/setup.h>
#include "setup.h"
#include "db8500-regs.h"
#include "id.h"
struct dbx500_asic_id dbx500_id;
......
arch/arm/mach-ux500/include/mach/hardware.h deleted 100644 → 0
View file @ 835f9c38
/*
* Copyright (C) 2009 ST-Ericsson.
*
* U8500 hardware definitions
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#ifndef __MACH_HARDWARE_H
#define __MACH_HARDWARE_H
/*
* Macros to get at IO space when running virtually
* We dont map all the peripherals, let ioremap do
* this for us. We map only very basic peripherals here.
*/
#define U8500_IO_VIRTUAL 0xf0000000
#define U8500_IO_PHYSICAL 0xa0000000
/* This is where we map in the ROM to check ASIC IDs */
#define UX500_VIRT_ROM 0xf0000000
/* This macro is used in assembly, so no cast */
#define IO_ADDRESS(x) \
(((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + U8500_IO_VIRTUAL)
/* typesafe io address */
#define __io_address(n) IOMEM(IO_ADDRESS(n))
/* Used by some plat-nomadik code */
#define io_p2v(n) __io_address(n)
#include <mach/db8500-regs.h>
#define MSP_TX_RX_REG_OFFSET 0
#define CRYP1_RX_REG_OFFSET 0x10
#define CRYP1_TX_REG_OFFSET 0x8
#define HASH1_TX_REG_OFFSET 0x4
#ifndef __ASSEMBLY__
extern void __iomem *_PRCMU_BASE;
#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x)
#endif /* __ASSEMBLY__ */
#endif /* __MACH_HARDWARE_H */
arch/arm/mach-ux500/include/mach/timex.h deleted 100644 → 0
View file @ 835f9c38
#ifndef __ASM_ARCH_TIMEX_H
#define __ASM_ARCH_TIMEX_H
#define CLOCK_TICK_RATE 110000000
#endif
arch/arm/mach-ux500/include/mach/uncompress.h deleted 100644 → 0
View file @ 835f9c38
/*
* Copyright (C) 2009 ST-Ericsson
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARCH_UNCOMPRESS_H
#define __ASM_ARCH_UNCOMPRESS_H
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <linux/io.h>
#include <linux/amba/serial.h>
#include <mach/hardware.h>
void __iomem *ux500_uart_base;
static void putc(const char c)
{
/* Do nothing if the UART is not enabled. */
if (!(__raw_readb(ux500_uart_base + UART011_CR) & 0x1))
return;
if (c == '\n')
putc('\r');
while (__raw_readb(ux500_uart_base + UART01x_FR) & (1 << 5))
barrier();
__raw_writeb(c, ux500_uart_base + UART01x_DR);
}
static void flush(void)
{
if (!(__raw_readb(ux500_uart_base + UART011_CR) & 0x1))
return;
while (__raw_readb(ux500_uart_base + UART01x_FR) & (1 << 3))
barrier();
}
static inline void arch_decomp_setup(void)
{
/* Use machine_is_foo() macro if you need to switch base someday */
ux500_uart_base = (void __iomem *)U8500_UART2_BASE;
}
#endif /* __ASM_ARCH_UNCOMPRESS_H */
arch/arm/mach-ux500/include/mach/irqs-db8500.h → arch/arm/mach-ux500/irqs-db8500.h
View file @ 9bc128e1
......@@ -109,31 +109,6 @@
/* Virtual interrupts corresponding to the PRCMU wakeups. */
#define IRQ_PRCMU_BASE IRQ_SOC_START
#define NUM_PRCMU_WAKEUPS (IRQ_PRCMU_END - IRQ_PRCMU_BASE)
#define IRQ_PRCMU_RTC (IRQ_PRCMU_BASE)
#define IRQ_PRCMU_RTT0 (IRQ_PRCMU_BASE + 1)
#define IRQ_PRCMU_RTT1 (IRQ_PRCMU_BASE + 2)
#define IRQ_PRCMU_HSI0 (IRQ_PRCMU_BASE + 3)
#define IRQ_PRCMU_HSI1 (IRQ_PRCMU_BASE + 4)
#define IRQ_PRCMU_CA_WAKE (IRQ_PRCMU_BASE + 5)
#define IRQ_PRCMU_USB (IRQ_PRCMU_BASE + 6)
#define IRQ_PRCMU_ABB (IRQ_PRCMU_BASE + 7)
#define IRQ_PRCMU_ABB_FIFO (IRQ_PRCMU_BASE + 8)
#define IRQ_PRCMU_ARM (IRQ_PRCMU_BASE + 9)
#define IRQ_PRCMU_MODEM_SW_RESET_REQ (IRQ_PRCMU_BASE + 10)
#define IRQ_PRCMU_GPIO0 (IRQ_PRCMU_BASE + 11)
#define IRQ_PRCMU_GPIO1 (IRQ_PRCMU_BASE + 12)
#define IRQ_PRCMU_GPIO2 (IRQ_PRCMU_BASE + 13)
#define IRQ_PRCMU_GPIO3 (IRQ_PRCMU_BASE + 14)
#define IRQ_PRCMU_GPIO4 (IRQ_PRCMU_BASE + 15)
#define IRQ_PRCMU_GPIO5 (IRQ_PRCMU_BASE + 16)
#define IRQ_PRCMU_GPIO6 (IRQ_PRCMU_BASE + 17)
#define IRQ_PRCMU_GPIO7 (IRQ_PRCMU_BASE + 18)
#define IRQ_PRCMU_GPIO8 (IRQ_PRCMU_BASE + 19)
#define IRQ_PRCMU_CA_SLEEP (IRQ_PRCMU_BASE + 20)
#define IRQ_PRCMU_HOTMON_LOW (IRQ_PRCMU_BASE + 21)
#define IRQ_PRCMU_HOTMON_HIGH (IRQ_PRCMU_BASE + 22)
#define IRQ_PRCMU_END (IRQ_PRCMU_BASE + 23)
/*
......
arch/arm/mach-ux500/include/mach/irqs.h → arch/arm/mach-ux500/irqs.h
View file @ 9bc128e1
......@@ -10,8 +10,6 @@
#ifndef ASM_ARCH_IRQS_H
#define ASM_ARCH_IRQS_H
#include <mach/hardware.h>
#define IRQ_LOCALTIMER 29
#define IRQ_LOCALWDOG 30
......@@ -36,14 +34,14 @@
/* This will be overridden by SoC-specific irq headers */
#define IRQ_SOC_END IRQ_SOC_START
#include <mach/irqs-db8500.h>
#include "irqs-db8500.h"
#define IRQ_BOARD_START IRQ_SOC_END
/* This will be overridden by board-specific irq headers */
#define IRQ_BOARD_END IRQ_BOARD_START
#ifdef CONFIG_MACH_MOP500
#include <mach/irqs-board-mop500.h>
#include "irqs-board-mop500.h"
#endif
#define UX500_NR_IRQS IRQ_BOARD_END
......
arch/arm/mach-ux500/platsmp.c
View file @ 9bc128e1
......@@ -22,9 +22,9 @@
#include <asm/smp_plat.h>
#include <asm/smp_scu.h>
#include <mach/hardware.h>
#include <mach/setup.h>
#include "setup.h"
#include "db8500-regs.h"
#include "id.h"
/* This is called from headsmp.S to wakeup the secondary core */
......
arch/arm/mach-ux500/pm.c 0 → 100644
View file @ 9bc128e1
/*
* Copyright (C) ST-Ericsson SA 2010-2013
* Author: Rickard Andersson <rickard.andersson@stericsson.com> for
* ST-Ericsson.
* Author: Daniel Lezcano <daniel.lezcano@linaro.org> for Linaro.
* License terms: GNU General Public License (GPL) version 2
*
*/
#include <linux/kernel.h>
#include <linux/irqchip/arm-gic.h>
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/platform_data/arm-ux500-pm.h>
#include "db8500-regs.h"
/* ARM WFI Standby signal register */
#define PRCM_ARM_WFI_STANDBY (prcmu_base + 0x130)
#define PRCM_ARM_WFI_STANDBY_WFI0 0x08
#define PRCM_ARM_WFI_STANDBY_WFI1 0x10
#define PRCM_IOCR (prcmu_base + 0x310)
#define PRCM_IOCR_IOFORCE 0x1
/* Dual A9 core interrupt management unit registers */
#define PRCM_A9_MASK_REQ (prcmu_base + 0x328)
#define PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ 0x1
#define PRCM_A9_MASK_ACK (prcmu_base + 0x32c)
#define PRCM_ARMITMSK31TO0 (prcmu_base + 0x11c)
#define PRCM_ARMITMSK63TO32 (prcmu_base + 0x120)
#define PRCM_ARMITMSK95TO64 (prcmu_base + 0x124)
#define PRCM_ARMITMSK127TO96 (prcmu_base + 0x128)
#define PRCM_POWER_STATE_VAL (prcmu_base + 0x25C)
#define PRCM_ARMITVAL31TO0 (prcmu_base + 0x260)
#define PRCM_ARMITVAL63TO32 (prcmu_base + 0x264)
#define PRCM_ARMITVAL95TO64 (prcmu_base + 0x268)
#define PRCM_ARMITVAL127TO96 (prcmu_base + 0x26C)
static void __iomem *prcmu_base;
/* This function decouple the gic from the prcmu */
int prcmu_gic_decouple(void)
{
u32 val = readl(PRCM_A9_MASK_REQ);
/* Set bit 0 register value to 1 */
writel(val | PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ,
PRCM_A9_MASK_REQ);
/* Make sure the register is updated */
readl(PRCM_A9_MASK_REQ);
/* Wait a few cycles for the gic mask completion */
udelay(1);
return 0;
}
/* This function recouple the gic with the prcmu */
int prcmu_gic_recouple(void)
{
u32 val = readl(PRCM_A9_MASK_REQ);
/* Set bit 0 register value to 0 */
writel(val & ~PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ, PRCM_A9_MASK_REQ);
return 0;
}
#define PRCMU_GIC_NUMBER_REGS 5
/*
* This function checks if there are pending irq on the gic. It only
* makes sense if the gic has been decoupled before with the
* db8500_prcmu_gic_decouple function. Disabling an interrupt only
* disables the forwarding of the interrupt to any CPU interface. It
* does not prevent the interrupt from changing state, for example
* becoming pending, or active and pending if it is already
* active. Hence, we have to check the interrupt is pending *and* is
* active.
*/
bool prcmu_gic_pending_irq(void)
{
u32 pr; /* Pending register */
u32 er; /* Enable register */
void __iomem *dist_base = __io_address(U8500_GIC_DIST_BASE);
int i;
/* 5 registers. STI & PPI not skipped */
for (i = 0; i < PRCMU_GIC_NUMBER_REGS; i++) {
pr = readl_relaxed(dist_base + GIC_DIST_PENDING_SET + i * 4);
er = readl_relaxed(dist_base + GIC_DIST_ENABLE_SET + i * 4);
if (pr & er)
return true; /* There is a pending interrupt */
}
return false;
}
/*
* This function checks if there are pending interrupt on the
* prcmu which has been delegated to monitor the irqs with the
* db8500_prcmu_copy_gic_settings function.
*/
bool prcmu_pending_irq(void)
{
u32 it, im;
int i;
for (i = 0; i < PRCMU_GIC_NUMBER_REGS - 1; i++) {
it = readl(PRCM_ARMITVAL31TO0 + i * 4);
im = readl(PRCM_ARMITMSK31TO0 + i * 4);
if (it & im)
return true; /* There is a pending interrupt */
}
return false;
}
/*
* This function checks if the specified cpu is in in WFI. It's usage
* makes sense only if the gic is decoupled with the db8500_prcmu_gic_decouple
* function. Of course passing smp_processor_id() to this function will
* always return false...
*/
bool prcmu_is_cpu_in_wfi(int cpu)
{
return readl(PRCM_ARM_WFI_STANDBY) & cpu ? PRCM_ARM_WFI_STANDBY_WFI1 :
PRCM_ARM_WFI_STANDBY_WFI0;
}
/*
* This function copies the gic SPI settings to the prcmu in order to
* monitor them and abort/finish the retention/off sequence or state.
*/
int prcmu_copy_gic_settings(void)
{
u32 er; /* Enable register */
void __iomem *dist_base = __io_address(U8500_GIC_DIST_BASE);
int i;
/* We skip the STI and PPI */
for (i = 0; i < PRCMU_GIC_NUMBER_REGS - 1; i++) {
er = readl_relaxed(dist_base +
GIC_DIST_ENABLE_SET + (i + 1) * 4);
writel(er, PRCM_ARMITMSK31TO0 + i * 4);
}
return 0;
}
void __init ux500_pm_init(u32 phy_base, u32 size)
{
prcmu_base = ioremap(phy_base, size);
if (!prcmu_base) {
pr_err("could not remap PRCMU for PM functions\n");
return;
}
/*
* On watchdog reboot the GIC is in some cases decoupled.
* This will make sure that the GIC is correctly configured.
*/
prcmu_gic_recouple();
}
arch/arm/mach-ux500/timer.c
View file @ 9bc128e1
......@@ -14,10 +14,10 @@
#include <asm/smp_twd.h>
#include <mach/setup.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#include "setup.h"
#include "irqs.h"
#include "db8500-regs.h"
#include "id.h"
#ifdef CONFIG_HAVE_ARM_TWD
......
arch/arm/mach-ux500/usb.c
View file @ 9bc128e1
......@@ -10,7 +10,7 @@
#include <linux/platform_data/usb-musb-ux500.h>
#include <linux/platform_data/dma-ste-dma40.h>
#include <mach/hardware.h>
#include "db8500-regs.h"
#define MUSB_DMA40_RX_CH { \
.mode = STEDMA40_MODE_LOGICAL, \
......
drivers/clk/ux500/clk-prcc.c
View file @ 9bc128e1
......@@ -13,7 +13,6 @@
#include <linux/io.h>
#include <linux/err.h>
#include <linux/types.h>
#include <mach/hardware.h>
#include "clk.h"
......
drivers/clk/ux500/u8500_clk.c
View file @ 9bc128e1
This diff is collapsed.
drivers/clocksource/clksrc-dbx500-prcmu.c
View file @ 9bc128e1
......@@ -17,9 +17,6 @@
#include <asm/sched_clock.h>
#include <mach/setup.h>
#include <mach/hardware.h>
#define RATE_32K 32768
#define TIMER_MODE_CONTINOUS 0x1
......
drivers/crypto/ux500/cryp/cryp.c
View file @ 9bc128e1
......@@ -12,8 +12,6 @@
#include <linux/kernel.h>
#include <linux/types.h>
#include <mach/hardware.h>
#include "cryp_p.h"
#include "cryp.h"
......
drivers/crypto/ux500/cryp/cryp_core.c
View file @ 9bc128e1
......@@ -32,7 +32,6 @@
#include <crypto/scatterwalk.h>
#include <linux/platform_data/crypto-ux500.h>
#include <mach/hardware.h>
#include "cryp_p.h"
#include "cryp.h"
......
drivers/crypto/ux500/hash/hash_core.c
View file @ 9bc128e1
......@@ -32,7 +32,6 @@
#include <crypto/algapi.h>
#include <linux/platform_data/crypto-ux500.h>
#include <mach/hardware.h>
#include "hash_alg.h"
......
drivers/mfd/db8500-prcmu.c
View file @ 9bc128e1
This diff is collapsed.
drivers/mfd/dbx500-prcmu-regs.h
View file @ 9bc128e1
This diff is collapsed.
drivers/staging/ste_rmi4/Makefile
View file @ 9bc128e1
......@@ -2,4 +2,3 @@
# Makefile for the RMI4 touchscreen driver.
#
obj-$(CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4) += synaptics_i2c_rmi4.o
obj-$(CONFIG_MACH_MOP500) += board-mop500-u8500uib-rmi4.o
drivers/staging/ste_rmi4/board-mop500-u8500uib-rmi4.c deleted 100644 → 0
View file @ 835f9c38
/*
* Some platform data for the RMI4 touchscreen that will override the __weak
* platform data in the Ux500 machine if this driver is activated.
*/
#include <linux/i2c.h>
#include <linux/gpio.h>
#include <linux/interrupt.h>
#include <mach/irqs.h>
#include "synaptics_i2c_rmi4.h"
/*
* Synaptics RMI4 touchscreen interface on the U8500 UIB
*/
/*
* Descriptor structure.
* Describes the number of i2c devices on the bus that speak RMI.
*/
static struct synaptics_rmi4_platform_data rmi4_i2c_dev_platformdata = {
.irq_number = NOMADIK_GPIO_TO_IRQ(84),
.irq_type = (IRQF_TRIGGER_FALLING | IRQF_SHARED),
.x_flip = false,
.y_flip = true,
};
struct i2c_board_info __initdata mop500_i2c3_devices_u8500[] = {
{
I2C_BOARD_INFO("synaptics_rmi4_i2c", 0x4B),
.platform_data = &rmi4_i2c_dev_platformdata,
},
};
drivers/staging/ste_rmi4/synaptics_i2c_rmi4.c
View file @ 9bc128e1
......@@ -864,6 +864,16 @@ static int synaptics_rmi4_i2c_query_device(struct synaptics_rmi4_data *pdata)
return 0;
}
/*
* Descriptor structure.
* Describes the number of i2c devices on the bus that speak RMI.
*/
static struct synaptics_rmi4_platform_data synaptics_rmi4_platformdata = {
.irq_type = (IRQF_TRIGGER_FALLING | IRQF_SHARED),
.x_flip = false,
.y_flip = true,
};
/**
* synaptics_rmi4_probe() - Initialze the i2c-client touchscreen driver
* @i2c: i2c client structure pointer
......@@ -890,10 +900,8 @@ static int synaptics_rmi4_probe
return -EIO;
}
if (!platformdata) {
dev_err(&client->dev, "%s: no platform data\n", __func__);
return -EINVAL;
}
if (!platformdata)
platformdata = &synaptics_rmi4_platformdata;
/* Allocate and initialize the instance data for this client */
rmi4_data = kcalloc(2, sizeof(struct synaptics_rmi4_data),
......@@ -977,13 +985,13 @@ static int synaptics_rmi4_probe
synaptics_rmi4_i2c_block_read(rmi4_data,
rmi4_data->fn01_data_base_addr + 1, intr_status,
rmi4_data->number_of_interrupt_register);
retval = request_threaded_irq(platformdata->irq_number, NULL,
retval = request_threaded_irq(client->irq, NULL,
synaptics_rmi4_irq,
platformdata->irq_type,
DRIVER_NAME, rmi4_data);
if (retval) {
dev_err(&client->dev, "%s:Unable to get attn irq %d\n",
__func__, platformdata->irq_number);
__func__, client->irq);
goto err_query_dev;
}
......@@ -996,7 +1004,7 @@ static int synaptics_rmi4_probe
return retval;
err_free_irq:
free_irq(platformdata->irq_number, rmi4_data);
free_irq(client->irq, rmi4_data);
err_query_dev:
regulator_disable(rmi4_data->regulator);
err_regulator_enable:
......@@ -1019,11 +1027,10 @@ static int synaptics_rmi4_probe
static int synaptics_rmi4_remove(struct i2c_client *client)
{
struct synaptics_rmi4_data *rmi4_data = i2c_get_clientdata(client);
const struct synaptics_rmi4_platform_data *pdata = rmi4_data->board;
rmi4_data->touch_stopped = true;
wake_up(&rmi4_data->wait);
free_irq(pdata->irq_number, rmi4_data);
free_irq(client->irq, rmi4_data);
input_unregister_device(rmi4_data->input_dev);
regulator_disable(rmi4_data->regulator);
regulator_put(rmi4_data->regulator);
......@@ -1046,10 +1053,9 @@ static int synaptics_rmi4_suspend(struct device *dev)
int retval;
unsigned char intr_status;
struct synaptics_rmi4_data *rmi4_data = dev_get_drvdata(dev);
const struct synaptics_rmi4_platform_data *pdata = rmi4_data->board;
rmi4_data->touch_stopped = true;
disable_irq(pdata->irq_number);
disable_irq(rmi4_data->i2c_client->irq);
retval = synaptics_rmi4_i2c_block_read(rmi4_data,
rmi4_data->fn01_data_base_addr + 1,
......@@ -1080,11 +1086,10 @@ static int synaptics_rmi4_resume(struct device *dev)
int retval;
unsigned char intr_status;
struct synaptics_rmi4_data *rmi4_data = dev_get_drvdata(dev);
const struct synaptics_rmi4_platform_data *pdata = rmi4_data->board;
regulator_enable(rmi4_data->regulator);
enable_irq(pdata->irq_number);
enable_irq(rmi4_data->i2c_client->irq);
rmi4_data->touch_stopped = false;
retval = synaptics_rmi4_i2c_block_read(rmi4_data,
......
drivers/staging/ste_rmi4/synaptics_i2c_rmi4.h
View file @ 9bc128e1
......@@ -38,7 +38,6 @@
* This structure gives platform data for rmi4.
*/
struct synaptics_rmi4_platform_data {
int irq_number;
int irq_type;
bool x_flip;
bool y_flip;
......
include/linux/mfd/db8500-prcmu.h
View file @ 9bc128e1
......@@ -489,7 +489,7 @@ struct prcmu_auto_pm_config {
#ifdef CONFIG_MFD_DB8500_PRCMU
void db8500_prcmu_early_init(void);
void db8500_prcmu_early_init(u32 phy_base, u32 size);
int prcmu_set_rc_a2p(enum romcode_write);
enum romcode_read prcmu_get_rc_p2a(void);
enum ap_pwrst prcmu_get_xp70_current_state(void);
......@@ -522,12 +522,6 @@ int db8500_prcmu_load_a9wdog(u8 id, u32 val);
void db8500_prcmu_system_reset(u16 reset_code);
int db8500_prcmu_set_power_state(u8 state, bool keep_ulp_clk, bool keep_ap_pll);
u8 db8500_prcmu_get_power_state_result(void);
int db8500_prcmu_gic_decouple(void);
int db8500_prcmu_gic_recouple(void);
int db8500_prcmu_copy_gic_settings(void);
bool db8500_prcmu_gic_pending_irq(void);
bool db8500_prcmu_pending_irq(void);
bool db8500_prcmu_is_cpu_in_wfi(int cpu);
void db8500_prcmu_enable_wakeups(u32 wakeups);
int db8500_prcmu_set_epod(u16 epod_id, u8 epod_state);
int db8500_prcmu_request_clock(u8 clock, bool enable);
......@@ -553,7 +547,7 @@ void db8500_prcmu_write_masked(unsigned int reg, u32 mask, u32 value);
#else /* !CONFIG_MFD_DB8500_PRCMU */
static inline void db8500_prcmu_early_init(void) {}
static inline void db8500_prcmu_early_init(u32 phy_base, u32 size) {}
static inline int prcmu_set_rc_a2p(enum romcode_write code)
{
......
include/linux/mfd/dbx500-prcmu.h
View file @ 9bc128e1
......@@ -237,6 +237,8 @@ struct prcmu_pdata
bool enable_set_ddr_opp;
bool enable_ape_opp_100_voltage;
struct ab8500_platform_data *ab_platdata;
int ab_irq;
int irq_base;
u32 version_offset;
u32 legacy_offset;
u32 adt_offset;
......@@ -276,9 +278,9 @@ struct prcmu_fw_version {
#if defined(CONFIG_UX500_SOC_DB8500)
static inline void __init prcmu_early_init(void)
static inline void prcmu_early_init(u32 phy_base, u32 size)
{
return db8500_prcmu_early_init();
return db8500_prcmu_early_init(phy_base, size);
}
static inline int prcmu_set_power_state(u8 state, bool keep_ulp_clk,
......@@ -293,36 +295,6 @@ static inline u8 prcmu_get_power_state_result(void)
return db8500_prcmu_get_power_state_result();
}
static inline int prcmu_gic_decouple(void)
{
return db8500_prcmu_gic_decouple();
}
static inline int prcmu_gic_recouple(void)
{
return db8500_prcmu_gic_recouple();
}
static inline bool prcmu_gic_pending_irq(void)
{
return db8500_prcmu_gic_pending_irq();
}
static inline bool prcmu_is_cpu_in_wfi(int cpu)
{
return db8500_prcmu_is_cpu_in_wfi(cpu);
}
static inline int prcmu_copy_gic_settings(void)
{
return db8500_prcmu_copy_gic_settings();
}
static inline bool prcmu_pending_irq(void)
{
return db8500_prcmu_pending_irq();
}
static inline int prcmu_set_epod(u16 epod_id, u8 epod_state)
{
return db8500_prcmu_set_epod(epod_id, epod_state);
......@@ -500,7 +472,7 @@ static inline int prcmu_config_a9wdog(u8 num, bool sleep_auto_off)
}
#else
static inline void __init prcmu_early_init(void) {}
static inline void prcmu_early_init(u32 phy_base, u32 size) {}
static inline int prcmu_set_power_state(u8 state, bool keep_ulp_clk,
bool keep_ap_pll)
......
include/linux/platform_data/arm-ux500-pm.h 0 → 100644
View file @ 9bc128e1
/*
* Copyright (C) ST-Ericsson SA 2010-2013
* Author: Rickard Andersson <rickard.andersson@stericsson.com> for
* ST-Ericsson.
* Author: Daniel Lezcano <daniel.lezcano@linaro.org> for Linaro.
* License terms: GNU General Public License (GPL) version 2
*
*/
#ifndef ARM_UX500_PM_H
#define ARM_UX500_PM_H
int prcmu_gic_decouple(void);
int prcmu_gic_recouple(void);
bool prcmu_gic_pending_irq(void);
bool prcmu_pending_irq(void);
bool prcmu_is_cpu_in_wfi(int cpu);
int prcmu_copy_gic_settings(void);
void ux500_pm_init(u32 phy_base, u32 size);
#endif /* ARM_UX500_PM_H */
include/linux/platform_data/clk-ux500.h
View file @ 9bc128e1
......@@ -10,7 +10,8 @@
#ifndef __CLK_UX500_H
#define __CLK_UX500_H
void u8500_clk_init(void);
void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
u32 clkrst5_base, u32 clkrst6_base);
void u9540_clk_init(void);
void u8540_clk_init(void);
......
sound/soc/ux500/mop500_ab8500.c
View file @ 9bc128e1
......@@ -17,8 +17,6 @@
#include <linux/io.h>
#include <linux/clk.h>
#include <mach/hardware.h>
#include <sound/soc.h>
#include <sound/soc-dapm.h>
#include <sound/pcm.h>
......
sound/soc/ux500/ux500_msp_dai.c
View file @ 9bc128e1
......@@ -19,9 +19,7 @@
#include <linux/clk.h>
#include <linux/regulator/consumer.h>
#include <linux/mfd/dbx500-prcmu.h>
#include <mach/hardware.h>
#include <mach/msp.h>
#include <linux/platform_data/asoc-ux500-msp.h>
#include <sound/soc.h>
#include <sound/soc-dai.h>
......
sound/soc/ux500/ux500_msp_i2s.c
View file @ 9bc128e1
......@@ -20,9 +20,7 @@
#include <linux/slab.h>
#include <linux/io.h>
#include <linux/of.h>
#include <mach/hardware.h>
#include <mach/msp.h>
#include <linux/platform_data/asoc-ux500-msp.h>
#include <sound/soc.h>
......
sound/soc/ux500/ux500_msp_i2s.h
View file @ 9bc128e1
......@@ -17,8 +17,6 @@
#include <linux/platform_device.h>
#include <mach/msp.h>
#define MSP_INPUT_FREQ_APB 48000000
/*** Stereo mode. Used for APB data accesses as 16 bits accesses (mono),
......
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