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nexedi
linux
Commits
9ccdc760
Commit
9ccdc760
authored
Aug 20, 2015
by
Ben Skeggs
Browse files
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Plain Diff
drm/nouveau/xtensa: remove object accessor functions
Signed-off-by:
Ben Skeggs
<
bskeggs@redhat.com
>
parent
63902181
Changes
4
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Showing
4 changed files
with
24 additions
and
40 deletions
+24
-40
drivers/gpu/drm/nouveau/include/nvkm/engine/xtensa.h
drivers/gpu/drm/nouveau/include/nvkm/engine/xtensa.h
+0
-2
drivers/gpu/drm/nouveau/nvkm/engine/bsp/g84.c
drivers/gpu/drm/nouveau/nvkm/engine/bsp/g84.c
+0
-2
drivers/gpu/drm/nouveau/nvkm/engine/vp/g84.c
drivers/gpu/drm/nouveau/nvkm/engine/vp/g84.c
+0
-2
drivers/gpu/drm/nouveau/nvkm/engine/xtensa.c
drivers/gpu/drm/nouveau/nvkm/engine/xtensa.c
+24
-34
No files found.
drivers/gpu/drm/nouveau/include/nvkm/engine/xtensa.h
View file @
9ccdc760
...
@@ -30,6 +30,4 @@ int nvkm_xtensa_create_(struct nvkm_object *,
...
@@ -30,6 +30,4 @@ int nvkm_xtensa_create_(struct nvkm_object *,
#define _nvkm_xtensa_dtor _nvkm_engine_dtor
#define _nvkm_xtensa_dtor _nvkm_engine_dtor
int
_nvkm_xtensa_init
(
struct
nvkm_object
*
);
int
_nvkm_xtensa_init
(
struct
nvkm_object
*
);
int
_nvkm_xtensa_fini
(
struct
nvkm_object
*
,
bool
);
int
_nvkm_xtensa_fini
(
struct
nvkm_object
*
,
bool
);
u32
_nvkm_xtensa_rd32
(
struct
nvkm_object
*
,
u64
);
void
_nvkm_xtensa_wr32
(
struct
nvkm_object
*
,
u64
,
u32
);
#endif
#endif
drivers/gpu/drm/nouveau/nvkm/engine/bsp/g84.c
View file @
9ccdc760
...
@@ -87,7 +87,5 @@ g84_bsp_oclass = {
...
@@ -87,7 +87,5 @@ g84_bsp_oclass = {
.
dtor
=
_nvkm_xtensa_dtor
,
.
dtor
=
_nvkm_xtensa_dtor
,
.
init
=
_nvkm_xtensa_init
,
.
init
=
_nvkm_xtensa_init
,
.
fini
=
_nvkm_xtensa_fini
,
.
fini
=
_nvkm_xtensa_fini
,
.
rd32
=
_nvkm_xtensa_rd32
,
.
wr32
=
_nvkm_xtensa_wr32
,
},
},
};
};
drivers/gpu/drm/nouveau/nvkm/engine/vp/g84.c
View file @
9ccdc760
...
@@ -87,7 +87,5 @@ g84_vp_oclass = {
...
@@ -87,7 +87,5 @@ g84_vp_oclass = {
.
dtor
=
_nvkm_xtensa_dtor
,
.
dtor
=
_nvkm_xtensa_dtor
,
.
init
=
_nvkm_xtensa_init
,
.
init
=
_nvkm_xtensa_init
,
.
fini
=
_nvkm_xtensa_fini
,
.
fini
=
_nvkm_xtensa_fini
,
.
rd32
=
_nvkm_xtensa_rd32
,
.
wr32
=
_nvkm_xtensa_wr32
,
},
},
};
};
drivers/gpu/drm/nouveau/nvkm/engine/xtensa.c
View file @
9ccdc760
...
@@ -23,20 +23,6 @@
...
@@ -23,20 +23,6 @@
#include <core/engctx.h>
#include <core/engctx.h>
u32
_nvkm_xtensa_rd32
(
struct
nvkm_object
*
object
,
u64
addr
)
{
struct
nvkm_xtensa
*
xtensa
=
(
void
*
)
object
;
return
nvkm_rd32
(
xtensa
->
engine
.
subdev
.
device
,
xtensa
->
addr
+
addr
);
}
void
_nvkm_xtensa_wr32
(
struct
nvkm_object
*
object
,
u64
addr
,
u32
data
)
{
struct
nvkm_xtensa
*
xtensa
=
(
void
*
)
object
;
nvkm_wr32
(
xtensa
->
engine
.
subdev
.
device
,
xtensa
->
addr
+
addr
,
data
);
}
int
int
_nvkm_xtensa_engctx_ctor
(
struct
nvkm_object
*
parent
,
struct
nvkm_object
*
engine
,
_nvkm_xtensa_engctx_ctor
(
struct
nvkm_object
*
parent
,
struct
nvkm_object
*
engine
,
struct
nvkm_oclass
*
oclass
,
void
*
data
,
u32
size
,
struct
nvkm_oclass
*
oclass
,
void
*
data
,
u32
size
,
...
@@ -56,15 +42,16 @@ _nvkm_xtensa_intr(struct nvkm_subdev *subdev)
...
@@ -56,15 +42,16 @@ _nvkm_xtensa_intr(struct nvkm_subdev *subdev)
{
{
struct
nvkm_xtensa
*
xtensa
=
(
void
*
)
subdev
;
struct
nvkm_xtensa
*
xtensa
=
(
void
*
)
subdev
;
struct
nvkm_device
*
device
=
xtensa
->
engine
.
subdev
.
device
;
struct
nvkm_device
*
device
=
xtensa
->
engine
.
subdev
.
device
;
u32
unk104
=
nv_ro32
(
xtensa
,
0xd04
);
const
u32
base
=
xtensa
->
addr
;
u32
intr
=
nv_ro32
(
xtensa
,
0xc20
);
u32
unk104
=
nvkm_rd32
(
device
,
base
+
0xd04
);
u32
chan
=
nv_ro32
(
xtensa
,
0xc28
);
u32
intr
=
nvkm_rd32
(
device
,
base
+
0xc20
);
u32
unk10c
=
nv_ro32
(
xtensa
,
0xd0c
);
u32
chan
=
nvkm_rd32
(
device
,
base
+
0xc28
);
u32
unk10c
=
nvkm_rd32
(
device
,
base
+
0xd0c
);
if
(
intr
&
0x10
)
if
(
intr
&
0x10
)
nvkm_warn
(
subdev
,
"Watchdog interrupt, engine hung.
\n
"
);
nvkm_warn
(
subdev
,
"Watchdog interrupt, engine hung.
\n
"
);
nv
_wo32
(
xtensa
,
0xc20
,
intr
);
nv
km_wr32
(
device
,
base
+
0xc20
,
intr
);
intr
=
nv
_ro32
(
xtensa
,
0xc20
);
intr
=
nv
km_rd32
(
device
,
base
+
0xc20
);
if
(
unk104
==
0x10001
&&
unk10c
==
0x200
&&
chan
&&
!
intr
)
{
if
(
unk104
==
0x10001
&&
unk10c
==
0x200
&&
chan
&&
!
intr
)
{
nvkm_debug
(
subdev
,
"Enabling FIFO_CTRL
\n
"
);
nvkm_debug
(
subdev
,
"Enabling FIFO_CTRL
\n
"
);
nvkm_mask
(
device
,
xtensa
->
addr
+
0xd94
,
0
,
xtensa
->
fifo_val
);
nvkm_mask
(
device
,
xtensa
->
addr
+
0xd94
,
0
,
xtensa
->
fifo_val
);
...
@@ -97,6 +84,7 @@ _nvkm_xtensa_init(struct nvkm_object *object)
...
@@ -97,6 +84,7 @@ _nvkm_xtensa_init(struct nvkm_object *object)
struct
nvkm_xtensa
*
xtensa
=
(
void
*
)
object
;
struct
nvkm_xtensa
*
xtensa
=
(
void
*
)
object
;
struct
nvkm_subdev
*
subdev
=
&
xtensa
->
engine
.
subdev
;
struct
nvkm_subdev
*
subdev
=
&
xtensa
->
engine
.
subdev
;
struct
nvkm_device
*
device
=
subdev
->
device
;
struct
nvkm_device
*
device
=
subdev
->
device
;
const
u32
base
=
xtensa
->
addr
;
const
struct
firmware
*
fw
;
const
struct
firmware
*
fw
;
char
name
[
32
];
char
name
[
32
];
int
i
,
ret
;
int
i
,
ret
;
...
@@ -137,24 +125,24 @@ _nvkm_xtensa_init(struct nvkm_object *object)
...
@@ -137,24 +125,24 @@ _nvkm_xtensa_init(struct nvkm_object *object)
release_firmware
(
fw
);
release_firmware
(
fw
);
}
}
nv
_wo32
(
xtensa
,
0xd10
,
0x1fffffff
);
/* ?? */
nv
km_wr32
(
device
,
base
+
0xd10
,
0x1fffffff
);
/* ?? */
nv
_wo32
(
xtensa
,
0xd08
,
0x0fffffff
);
/* ?? */
nv
km_wr32
(
device
,
base
+
0xd08
,
0x0fffffff
);
/* ?? */
nv
_wo32
(
xtensa
,
0xd28
,
xtensa
->
unkd28
);
/* ?? */
nv
km_wr32
(
device
,
base
+
0xd28
,
xtensa
->
unkd28
);
/* ?? */
nv
_wo32
(
xtensa
,
0xc20
,
0x3f
);
/* INTR */
nv
km_wr32
(
device
,
base
+
0xc20
,
0x3f
);
/* INTR */
nv
_wo32
(
xtensa
,
0xd84
,
0x3f
);
/* INTR_EN */
nv
km_wr32
(
device
,
base
+
0xd84
,
0x3f
);
/* INTR_EN */
nv
_wo32
(
xtensa
,
0xcc0
,
xtensa
->
gpu_fw
->
addr
>>
8
);
/* XT_REGION_BASE */
nv
km_wr32
(
device
,
base
+
0xcc0
,
xtensa
->
gpu_fw
->
addr
>>
8
);
/* XT_REGION_BASE */
nv
_wo32
(
xtensa
,
0xcc4
,
0x1c
);
/* XT_REGION_SETUP */
nv
km_wr32
(
device
,
base
+
0xcc4
,
0x1c
);
/* XT_REGION_SETUP */
nv
_wo32
(
xtensa
,
0xcc8
,
xtensa
->
gpu_fw
->
size
>>
8
);
/* XT_REGION_LIMIT */
nv
km_wr32
(
device
,
base
+
0xcc8
,
xtensa
->
gpu_fw
->
size
>>
8
);
/* XT_REGION_LIMIT */
tmp
=
nvkm_rd32
(
device
,
0x0
);
tmp
=
nvkm_rd32
(
device
,
0x0
);
nv
_wo32
(
xtensa
,
0xde0
,
tmp
);
/* SCRATCH_H2X */
nv
km_wr32
(
device
,
base
+
0xde0
,
tmp
);
/* SCRATCH_H2X */
nv
_wo32
(
xtensa
,
0xce8
,
0xf
);
/* XT_REGION_SETUP */
nv
km_wr32
(
device
,
base
+
0xce8
,
0xf
);
/* XT_REGION_SETUP */
nv
_wo32
(
xtensa
,
0xc20
,
0x3f
);
/* INTR */
nv
km_wr32
(
device
,
base
+
0xc20
,
0x3f
);
/* INTR */
nv
_wo32
(
xtensa
,
0xd84
,
0x3f
);
/* INTR_EN */
nv
km_wr32
(
device
,
base
+
0xd84
,
0x3f
);
/* INTR_EN */
return
0
;
return
0
;
}
}
...
@@ -162,9 +150,11 @@ int
...
@@ -162,9 +150,11 @@ int
_nvkm_xtensa_fini
(
struct
nvkm_object
*
object
,
bool
suspend
)
_nvkm_xtensa_fini
(
struct
nvkm_object
*
object
,
bool
suspend
)
{
{
struct
nvkm_xtensa
*
xtensa
=
(
void
*
)
object
;
struct
nvkm_xtensa
*
xtensa
=
(
void
*
)
object
;
struct
nvkm_device
*
device
=
xtensa
->
engine
.
subdev
.
device
;
const
u32
base
=
xtensa
->
addr
;
nv
_wo32
(
xtensa
,
0xd84
,
0
);
/* INTR_EN */
nv
km_wr32
(
device
,
base
+
0xd84
,
0
);
/* INTR_EN */
nv
_wo32
(
xtensa
,
0xd94
,
0
);
/* FIFO_CTRL */
nv
km_wr32
(
device
,
base
+
0xd94
,
0
);
/* FIFO_CTRL */
if
(
!
suspend
)
if
(
!
suspend
)
nvkm_gpuobj_ref
(
NULL
,
&
xtensa
->
gpu_fw
);
nvkm_gpuobj_ref
(
NULL
,
&
xtensa
->
gpu_fw
);
...
...
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