Commit 9d19c73f authored by Yongqiang Sun's avatar Yongqiang Sun Committed by Alex Deucher

drm/amd/display: Add DFS reference clock field

Add to clk_mgr_internal struct, for future use.
Signed-off-by: default avatarYongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: default avatarYongqiang Sun <yongqiang.sun@amd.com>
Acked-by: default avatarLeo Li <sunpeng.li@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 99a42341
...@@ -216,6 +216,8 @@ struct clk_mgr_internal { ...@@ -216,6 +216,8 @@ struct clk_mgr_internal {
bool dfs_bypass_enabled; bool dfs_bypass_enabled;
/* True if the DFS-bypass feature is enabled and active. */ /* True if the DFS-bypass feature is enabled and active. */
bool dfs_bypass_active; bool dfs_bypass_active;
uint32_t dfs_ref_freq_khz;
/* /*
* Cache the display clock returned by VBIOS if DFS-bypass is enabled. * Cache the display clock returned by VBIOS if DFS-bypass is enabled.
* This is basically "Crystal Frequency In KHz" (XTALIN) frequency * This is basically "Crystal Frequency In KHz" (XTALIN) frequency
......
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